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180 lines
9.3 KiB
XML
180 lines
9.3 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
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<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<instructionsection id="CCMN_reg" title="CCMN (register) -- A64" type="instruction">
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<docvars>
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="CCMN" />
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</docvars>
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<heading>CCMN (register)</heading>
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<desc>
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<brief>
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<para>Conditional Compare Negative (register)</para>
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</brief>
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<authored>
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<para>Conditional Compare Negative (register) sets the value of the condition flags to the result of the comparison of a register value and the inverse of another register value if the condition is TRUE, and an immediate value otherwise.</para>
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</authored>
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</desc>
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<operationalnotes>
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<para>If PSTATE.DIT is 1:</para>
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<list type="unordered">
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<listitem><content>The execution time of this instruction is independent of:<list type="unordered"><listitem><content>The values of the data supplied in any of its registers.</content></listitem><listitem><content>The values of the NZCV flags.</content></listitem></list></content></listitem>
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<listitem><content>The response of this instruction to asynchronous exceptions does not vary based on:<list type="unordered"><listitem><content>The values of the data supplied in any of its registers.</content></listitem><listitem><content>The values of the NZCV flags.</content></listitem></list></content></listitem>
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</list>
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</operationalnotes>
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<alias_list howmany="0"></alias_list>
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<classes>
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<iclass name="Integer" oneof="1" id="iclass_general" no_encodings="2" isa="A64">
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<docvars>
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="CCMN" />
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</docvars>
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<iclassintro count="2"></iclassintro>
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<regdiagram form="32" psname="aarch64/instrs/integer/conditional/compare/register" tworows="1">
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<box hibit="31" name="sf" usename="1">
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<c></c>
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</box>
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<box hibit="30" name="op" usename="1" settings="1" psbits="x">
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<c>0</c>
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</box>
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<box hibit="29" name="S" settings="1">
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<c>1</c>
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</box>
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<box hibit="28" width="8" settings="8">
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="20" width="5" name="Rm" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="15" width="4" name="cond" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="11" settings="1">
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<c>0</c>
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</box>
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<box hibit="10" name="o2" settings="1">
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<c>0</c>
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</box>
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<box hibit="9" width="5" name="Rn" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="4" name="o3" settings="1">
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<c>0</c>
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</box>
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<box hibit="3" width="4" name="nzcv" usename="1">
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<c colspan="4"></c>
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</box>
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</regdiagram>
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<encoding name="CCMN_32_condcmp_reg" oneofinclass="2" oneof="2" label="32-bit" bitdiffs="sf == 0">
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<docvars>
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<docvar key="datatype" value="32" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="CCMN" />
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</docvars>
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<box hibit="31" width="1" name="sf">
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<c>0</c>
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</box>
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<asmtemplate><text>CCMN </text><a link="sa_wn" hover="First 32-bit general-purpose source register (field "Rn")"><Wn></a><text>, </text><a link="sa_wm" hover="Second 32-bit general-purpose source register (field "Rm")"><Wm></a><text>, #</text><a link="sa_nzcv" hover="Flag bit specifier, an immediate [0-15], giving the alternative state for 4-bit NZCV condition flags (field "nzcv")"><nzcv></a><text>, </text><a link="sa_cond" hover="Standard condition (field "cond")"><cond></a></asmtemplate>
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</encoding>
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<encoding name="CCMN_64_condcmp_reg" oneofinclass="2" oneof="2" label="64-bit" bitdiffs="sf == 1">
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<docvars>
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<docvar key="datatype" value="64" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="CCMN" />
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</docvars>
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<box hibit="31" width="1" name="sf">
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<c>1</c>
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</box>
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<asmtemplate><text>CCMN </text><a link="sa_xn" hover="First 64-bit general-purpose source register (field "Rn")"><Xn></a><text>, </text><a link="sa_xm" hover="Second 64-bit general-purpose source register (field "Rm")"><Xm></a><text>, #</text><a link="sa_nzcv" hover="Flag bit specifier, an immediate [0-15], giving the alternative state for 4-bit NZCV condition flags (field "nzcv")"><nzcv></a><text>, </text><a link="sa_cond" hover="Standard condition (field "cond")"><cond></a></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="aarch64/instrs/integer/conditional/compare/register" mylink="aarch64.instrs.integer.conditional.compare.register" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rn);
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integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rm);
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integer datasize = if sf == '1' then 64 else 32;
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boolean sub_op = (op == '1');
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bits(4) condition = cond;
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bits(4) flags = nzcv;</pstext>
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</ps>
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</ps_section>
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</iclass>
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</classes>
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<explanations scope="all">
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<explanation enclist="CCMN_32_condcmp_reg" symboldefcount="1">
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<symbol link="sa_wn"><Wn></symbol>
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<account encodedin="Rn">
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<intro>
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<para>Is the 32-bit name of the first general-purpose source register, encoded in the "Rn" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="CCMN_32_condcmp_reg" symboldefcount="1">
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<symbol link="sa_wm"><Wm></symbol>
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<account encodedin="Rm">
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<intro>
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<para>Is the 32-bit name of the second general-purpose source register, encoded in the "Rm" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="CCMN_64_condcmp_reg" symboldefcount="1">
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<symbol link="sa_xn"><Xn></symbol>
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<account encodedin="Rn">
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<intro>
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<para>Is the 64-bit name of the first general-purpose source register, encoded in the "Rn" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="CCMN_64_condcmp_reg" symboldefcount="1">
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<symbol link="sa_xm"><Xm></symbol>
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<account encodedin="Rm">
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<intro>
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<para>Is the 64-bit name of the second general-purpose source register, encoded in the "Rm" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="CCMN_32_condcmp_reg, CCMN_64_condcmp_reg" symboldefcount="1">
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<symbol link="sa_nzcv"><nzcv></symbol>
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<account encodedin="nzcv">
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<intro>
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<para>Is the flag bit specifier, an immediate in the range 0 to 15, giving the alternative state for the 4-bit NZCV condition flags, encoded in the "nzcv" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="CCMN_32_condcmp_reg, CCMN_64_condcmp_reg" symboldefcount="1">
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<symbol link="sa_cond"><cond></symbol>
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<account encodedin="cond">
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<intro>
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<para>Is one of the standard conditions, encoded in the "cond" field in the standard way.</para>
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</intro>
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</account>
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</explanation>
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</explanations>
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<ps_section howmany="1">
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<ps name="aarch64/instrs/integer/conditional/compare/register" mylink="execute" enclabels="" sections="1" secttype="Operation">
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<pstext mayhavelinks="1" section="Execute" rep_section="execute">if <a link="impl-shared.ConditionHolds.1" file="shared_pseudocode.xml" hover="function: boolean ConditionHolds(bits(4) cond)">ConditionHolds</a>(condition) then
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bits(datasize) operand1 = <a link="impl-aarch64.X.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) X[integer n, integer width]">X</a>[n, datasize];
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bits(datasize) operand2 = <a link="impl-aarch64.X.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) X[integer n, integer width]">X</a>[m, datasize];
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bit carry_in = '0';
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if sub_op then
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operand2 = NOT(operand2);
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carry_in = '1';
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(-, flags) = <a link="impl-shared.AddWithCarry.3" file="shared_pseudocode.xml" hover="function: (bits(N), bits(4)) AddWithCarry(bits(N) x, bits(N) y, bit carry_in)">AddWithCarry</a>(operand1, operand2, carry_in);
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PSTATE.<N,Z,C,V> = flags;</pstext>
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</ps>
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</ps_section>
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</instructionsection>
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