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Ronald Caesar 26a677f8b4 decoder: Add ARM specification docs
Signed-off-by: Ronald Caesar <github43132@proton.me>
2025-12-12 18:11:36 -04:00

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<?xml version="1.0" encoding="utf-8"?>
<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
<instructionsection id="CFINV" title="CFINV -- A64" type="instruction">
<docvars>
<docvar key="instr-class" value="system" />
<docvar key="isa" value="A64" />
<docvar key="mnemonic" value="CFINV" />
</docvars>
<heading>CFINV</heading>
<desc>
<brief>
<para>Invert Carry Flag</para>
</brief>
<authored>
<para>Invert Carry Flag. This instruction inverts the value of the PSTATE.C flag.</para>
</authored>
</desc>
<operationalnotes>
<para>If PSTATE.DIT is 1:</para>
<list type="unordered">
<listitem><content>The execution time of this instruction is independent of:<list type="unordered"><listitem><content>The values of the data supplied in any of its registers.</content></listitem><listitem><content>The values of the NZCV flags.</content></listitem></list></content></listitem>
<listitem><content>The response of this instruction to asynchronous exceptions does not vary based on:<list type="unordered"><listitem><content>The values of the data supplied in any of its registers.</content></listitem><listitem><content>The values of the NZCV flags.</content></listitem></list></content></listitem>
</list>
</operationalnotes>
<alias_list howmany="0"></alias_list>
<classes>
<iclass name="System" oneof="1" id="iclass_system" no_encodings="1" isa="A64">
<docvars>
<docvar key="instr-class" value="system" />
<docvar key="isa" value="A64" />
<docvar key="mnemonic" value="CFINV" />
</docvars>
<iclassintro count="1"></iclassintro>
<arch_variants>
<arch_variant name="ARMv8.4" feature="FEAT_FlagM" />
</arch_variants>
<regdiagram form="32" psname="aarch64/instrs/integer/flags/cfinv" tworows="1">
<box hibit="31" width="10" settings="10">
<c>1</c>
<c>1</c>
<c>0</c>
<c>1</c>
<c>0</c>
<c>1</c>
<c>0</c>
<c>1</c>
<c>0</c>
<c>0</c>
</box>
<box hibit="21" name="L" settings="1">
<c>0</c>
</box>
<box hibit="20" name="op0[1]" settings="1">
<c>0</c>
</box>
<box hibit="19" name="op0[0]" settings="1">
<c>0</c>
</box>
<box hibit="18" width="3" name="op1" settings="3">
<c>0</c>
<c>0</c>
<c>0</c>
</box>
<box hibit="15" width="4" name="CRn" settings="4">
<c>0</c>
<c>1</c>
<c>0</c>
<c>0</c>
</box>
<box hibit="11" width="4" name="CRm" usename="1" settings="4" psbits="xxxx">
<c>(0)</c>
<c>(0)</c>
<c>(0)</c>
<c>(0)</c>
</box>
<box hibit="7" width="3" name="op2" settings="3">
<c>0</c>
<c>0</c>
<c>0</c>
</box>
<box hibit="4" width="5" name="Rt" settings="5">
<c>1</c>
<c>1</c>
<c>1</c>
<c>1</c>
<c>1</c>
</box>
</regdiagram>
<encoding name="CFINV_M_pstate" oneofinclass="1" oneof="1" label="">
<docvars>
<docvar key="instr-class" value="system" />
<docvar key="isa" value="A64" />
<docvar key="mnemonic" value="CFINV" />
</docvars>
<asmtemplate><text>CFINV</text></asmtemplate>
</encoding>
<ps_section howmany="1">
<ps name="aarch64/instrs/integer/flags/cfinv" mylink="aarch64.instrs.integer.flags.cfinv" enclabels="" sections="1" secttype="noheading">
<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-shared.HaveFlagManipulateExt.0" file="shared_pseudocode.xml" hover="function: boolean HaveFlagManipulateExt()">HaveFlagManipulateExt</a>() then UNDEFINED;</pstext>
</ps>
</ps_section>
</iclass>
</classes>
<explanations scope="all"></explanations>
<ps_section howmany="1">
<ps name="aarch64/instrs/integer/flags/cfinv" mylink="execute" enclabels="" sections="1" secttype="Operation">
<pstext mayhavelinks="1" section="Execute" rep_section="execute">PSTATE.C = NOT(PSTATE.C);</pstext>
</ps>
</ps_section>
</instructionsection>