mirror of
https://github.com/pound-emu/ballistic.git
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460 lines
20 KiB
XML
460 lines
20 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
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<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<instructionsection id="cntb_r_s" title="CNTB, CNTD, CNTH, CNTW" type="instruction">
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<docvars>
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<docvar key="instr-class" value="sve" />
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<docvar key="isa" value="A64" />
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</docvars>
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<heading>CNTB, CNTD, CNTH, CNTW</heading>
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<desc>
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<brief>Set scalar to multiple of predicate constraint element count</brief>
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<description>
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<para>Determines the number of active elements implied by the named predicate constraint, multiplies that by an immediate in the range 1 to 16 inclusive, and then places the result in the scalar destination.</para>
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<para>The named predicate constraint limits the number of active elements in a single predicate to:</para>
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<list type="unordered">
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<listitem>
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<content>A fixed number (<value>VL1</value> to <value>VL256</value>)</content>
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</listitem>
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<listitem>
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<content>The largest power of two (<value>POW2</value>)</content>
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</listitem>
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<listitem>
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<content>The largest multiple of three or four (<value>MUL3</value> or <value>MUL4</value>)</content>
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</listitem>
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<listitem>
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<content>All available, implicitly a multiple of two (<value>ALL</value>).</content>
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</listitem>
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</list>
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<para>Unspecified or out of range constraint encodings generate an empty predicate or zero element count rather than Undefined Instruction exception.</para>
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</description>
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<status>Green</status>
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<predicated>False</predicated>
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<uses_dit condition="FEAT_SVE2 is implemented or FEAT_SME is implemented">True</uses_dit>
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</desc>
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<alias_list howmany="0"></alias_list>
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<classes>
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<classesintro count="4">
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<txt>It has encodings from 4 classes:</txt>
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<a href="#iclass_esize_byte">Byte</a>
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<txt>, </txt>
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<a href="#iclass_esize_doubleword">Doubleword</a>
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<txt>, </txt>
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<a href="#iclass_esize_halfword">Halfword</a>
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<txt> and </txt>
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<a href="#iclass_esize_word">Word</a>
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</classesintro>
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<iclass name="Byte" oneof="4" id="iclass_esize_byte" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="instr-class" value="sve" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="CNTB" />
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<docvar key="sve-esize" value="esize-byte" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<regdiagram form="32" psname="CNTB-R.S-_" tworows="1">
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<box hibit="31" width="8" settings="8">
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="23" name="size<1>" usename="1" settings="1">
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<c>0</c>
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</box>
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<box hibit="22" name="size<0>" usename="1" settings="1">
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<c>0</c>
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</box>
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<box hibit="21" width="2" settings="2">
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="19" width="4" name="imm4" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="15" width="5" settings="5">
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="10" name="op" settings="1">
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<c>0</c>
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</box>
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<box hibit="9" width="5" name="pattern" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="4" width="5" name="Rd" usename="1">
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<c colspan="5"></c>
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</box>
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</regdiagram>
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<encoding name="cntb_r_s_" oneofinclass="1" oneof="4" label="">
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<docvars>
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<docvar key="instr-class" value="sve" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="CNTB" />
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<docvar key="sve-esize" value="esize-byte" />
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</docvars>
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<asmtemplate><text>CNTB </text><a link="sa_xd" hover="64-bit destination general-purpose register (field "Rd")"><Xd></a><text>{</text><text>, </text><a link="sa_pattern" hover="Optional pattern specifier, default ALL (field "pattern") [#uimm5,ALL,MUL3,MUL4,POW2,VL1,VL2,VL3,VL4,VL5,VL6,VL7,VL8,VL16,VL32,VL64,VL128,VL256]"><pattern></a><text>{</text><text>, MUL #</text><a link="sa_imm" hover="Immediate multiplier [1-16], default 1 (field "imm4")"><imm></a><text>}</text><text>}</text></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="CNTB-R.S-_" mylink="CNTB-R.S-_" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSVE.0" file="shared_pseudocode.xml" hover="function: boolean HaveSVE()">HaveSVE</a>() && !<a link="impl-aarch64.HaveSME.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME()">HaveSME</a>() then UNDEFINED;
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constant integer esize = 8;
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integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rd);
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bits(5) pat = pattern;
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integer imm = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(imm4) + 1;</pstext>
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</ps>
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</ps_section>
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</iclass>
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<iclass name="Doubleword" oneof="4" id="iclass_esize_doubleword" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="instr-class" value="sve" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="CNTD" />
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<docvar key="sve-esize" value="esize-doubleword" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<regdiagram form="32" psname="CNTD-R.S-_" tworows="1">
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<box hibit="31" width="8" settings="8">
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="23" name="size<1>" usename="1" settings="1">
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<c>1</c>
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</box>
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<box hibit="22" name="size<0>" usename="1" settings="1">
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<c>1</c>
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</box>
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<box hibit="21" width="2" settings="2">
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="19" width="4" name="imm4" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="15" width="5" settings="5">
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="10" name="op" settings="1">
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<c>0</c>
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</box>
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<box hibit="9" width="5" name="pattern" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="4" width="5" name="Rd" usename="1">
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<c colspan="5"></c>
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</box>
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</regdiagram>
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<encoding name="cntd_r_s_" oneofinclass="1" oneof="4" label="">
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<docvars>
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<docvar key="instr-class" value="sve" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="CNTD" />
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<docvar key="sve-esize" value="esize-doubleword" />
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</docvars>
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<asmtemplate><text>CNTD </text><a link="sa_xd" hover="64-bit destination general-purpose register (field "Rd")"><Xd></a><text>{</text><text>, </text><a link="sa_pattern" hover="Optional pattern specifier, default ALL (field "pattern") [#uimm5,ALL,MUL3,MUL4,POW2,VL1,VL2,VL3,VL4,VL5,VL6,VL7,VL8,VL16,VL32,VL64,VL128,VL256]"><pattern></a><text>{</text><text>, MUL #</text><a link="sa_imm" hover="Immediate multiplier [1-16], default 1 (field "imm4")"><imm></a><text>}</text><text>}</text></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="CNTD-R.S-_" mylink="CNTD-R.S-_" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSVE.0" file="shared_pseudocode.xml" hover="function: boolean HaveSVE()">HaveSVE</a>() && !<a link="impl-aarch64.HaveSME.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME()">HaveSME</a>() then UNDEFINED;
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constant integer esize = 64;
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integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rd);
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bits(5) pat = pattern;
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integer imm = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(imm4) + 1;</pstext>
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</ps>
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</ps_section>
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</iclass>
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<iclass name="Halfword" oneof="4" id="iclass_esize_halfword" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="instr-class" value="sve" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="CNTH" />
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<docvar key="sve-esize" value="esize-halfword" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<regdiagram form="32" psname="CNTH-R.S-_" tworows="1">
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<box hibit="31" width="8" settings="8">
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="23" name="size<1>" usename="1" settings="1">
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<c>0</c>
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</box>
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<box hibit="22" name="size<0>" usename="1" settings="1">
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<c>1</c>
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</box>
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<box hibit="21" width="2" settings="2">
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="19" width="4" name="imm4" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="15" width="5" settings="5">
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="10" name="op" settings="1">
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<c>0</c>
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</box>
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<box hibit="9" width="5" name="pattern" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="4" width="5" name="Rd" usename="1">
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<c colspan="5"></c>
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</box>
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</regdiagram>
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<encoding name="cnth_r_s_" oneofinclass="1" oneof="4" label="">
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<docvars>
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<docvar key="instr-class" value="sve" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="CNTH" />
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<docvar key="sve-esize" value="esize-halfword" />
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</docvars>
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<asmtemplate><text>CNTH </text><a link="sa_xd" hover="64-bit destination general-purpose register (field "Rd")"><Xd></a><text>{</text><text>, </text><a link="sa_pattern" hover="Optional pattern specifier, default ALL (field "pattern") [#uimm5,ALL,MUL3,MUL4,POW2,VL1,VL2,VL3,VL4,VL5,VL6,VL7,VL8,VL16,VL32,VL64,VL128,VL256]"><pattern></a><text>{</text><text>, MUL #</text><a link="sa_imm" hover="Immediate multiplier [1-16], default 1 (field "imm4")"><imm></a><text>}</text><text>}</text></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="CNTH-R.S-_" mylink="CNTH-R.S-_" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSVE.0" file="shared_pseudocode.xml" hover="function: boolean HaveSVE()">HaveSVE</a>() && !<a link="impl-aarch64.HaveSME.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME()">HaveSME</a>() then UNDEFINED;
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constant integer esize = 16;
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integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rd);
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bits(5) pat = pattern;
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integer imm = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(imm4) + 1;</pstext>
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</ps>
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</ps_section>
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</iclass>
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<iclass name="Word" oneof="4" id="iclass_esize_word" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="instr-class" value="sve" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="CNTW" />
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<docvar key="sve-esize" value="esize-word" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<regdiagram form="32" psname="CNTW-R.S-_" tworows="1">
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<box hibit="31" width="8" settings="8">
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="23" name="size<1>" usename="1" settings="1">
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<c>1</c>
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</box>
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<box hibit="22" name="size<0>" usename="1" settings="1">
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<c>0</c>
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</box>
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<box hibit="21" width="2" settings="2">
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="19" width="4" name="imm4" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="15" width="5" settings="5">
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="10" name="op" settings="1">
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<c>0</c>
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</box>
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<box hibit="9" width="5" name="pattern" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="4" width="5" name="Rd" usename="1">
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<c colspan="5"></c>
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</box>
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</regdiagram>
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<encoding name="cntw_r_s_" oneofinclass="1" oneof="4" label="">
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<docvars>
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<docvar key="instr-class" value="sve" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="CNTW" />
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<docvar key="sve-esize" value="esize-word" />
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</docvars>
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<asmtemplate><text>CNTW </text><a link="sa_xd" hover="64-bit destination general-purpose register (field "Rd")"><Xd></a><text>{</text><text>, </text><a link="sa_pattern" hover="Optional pattern specifier, default ALL (field "pattern") [#uimm5,ALL,MUL3,MUL4,POW2,VL1,VL2,VL3,VL4,VL5,VL6,VL7,VL8,VL16,VL32,VL64,VL128,VL256]"><pattern></a><text>{</text><text>, MUL #</text><a link="sa_imm" hover="Immediate multiplier [1-16], default 1 (field "imm4")"><imm></a><text>}</text><text>}</text></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="CNTW-R.S-_" mylink="CNTW-R.S-_" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSVE.0" file="shared_pseudocode.xml" hover="function: boolean HaveSVE()">HaveSVE</a>() && !<a link="impl-aarch64.HaveSME.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME()">HaveSME</a>() then UNDEFINED;
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constant integer esize = 32;
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integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rd);
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bits(5) pat = pattern;
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integer imm = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(imm4) + 1;</pstext>
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</ps>
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</ps_section>
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</iclass>
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</classes>
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<explanations scope="all">
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<explanation enclist="cntb_r_s_, cntd_r_s_, cnth_r_s_, cntw_r_s_" symboldefcount="1">
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<symbol link="sa_xd"><Xd></symbol>
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<account encodedin="Rd">
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<intro>
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<para>Is the 64-bit name of the destination general-purpose register, encoded in the "Rd" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="cntb_r_s_, cntd_r_s_, cnth_r_s_, cntw_r_s_" symboldefcount="1">
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<symbol link="sa_pattern"><pattern></symbol>
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<definition encodedin="pattern">
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<intro>Is the optional pattern specifier, defaulting to ALL, </intro>
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<table class="valuetable">
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<tgroup cols="2">
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<thead>
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<row>
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<entry class="bitfield">pattern</entry>
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<entry class="symbol"><pattern></entry>
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</row>
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</thead>
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<tbody>
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<row>
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<entry class="bitfield">00000</entry>
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<entry class="symbol">POW2</entry>
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</row>
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<row>
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<entry class="bitfield">00001</entry>
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<entry class="symbol">VL1</entry>
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</row>
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<row>
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<entry class="bitfield">00010</entry>
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<entry class="symbol">VL2</entry>
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</row>
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<row>
|
|
<entry class="bitfield">00011</entry>
|
|
<entry class="symbol">VL3</entry>
|
|
</row>
|
|
<row>
|
|
<entry class="bitfield">00100</entry>
|
|
<entry class="symbol">VL4</entry>
|
|
</row>
|
|
<row>
|
|
<entry class="bitfield">00101</entry>
|
|
<entry class="symbol">VL5</entry>
|
|
</row>
|
|
<row>
|
|
<entry class="bitfield">00110</entry>
|
|
<entry class="symbol">VL6</entry>
|
|
</row>
|
|
<row>
|
|
<entry class="bitfield">00111</entry>
|
|
<entry class="symbol">VL7</entry>
|
|
</row>
|
|
<row>
|
|
<entry class="bitfield">01000</entry>
|
|
<entry class="symbol">VL8</entry>
|
|
</row>
|
|
<row>
|
|
<entry class="bitfield">01001</entry>
|
|
<entry class="symbol">VL16</entry>
|
|
</row>
|
|
<row>
|
|
<entry class="bitfield">01010</entry>
|
|
<entry class="symbol">VL32</entry>
|
|
</row>
|
|
<row>
|
|
<entry class="bitfield">01011</entry>
|
|
<entry class="symbol">VL64</entry>
|
|
</row>
|
|
<row>
|
|
<entry class="bitfield">01100</entry>
|
|
<entry class="symbol">VL128</entry>
|
|
</row>
|
|
<row>
|
|
<entry class="bitfield">01101</entry>
|
|
<entry class="symbol">VL256</entry>
|
|
</row>
|
|
<row>
|
|
<entry class="bitfield">0111x</entry>
|
|
<entry class="symbol">#uimm5</entry>
|
|
</row>
|
|
<row>
|
|
<entry class="bitfield">101x1</entry>
|
|
<entry class="symbol">#uimm5</entry>
|
|
</row>
|
|
<row>
|
|
<entry class="bitfield">10110</entry>
|
|
<entry class="symbol">#uimm5</entry>
|
|
</row>
|
|
<row>
|
|
<entry class="bitfield">1x0x1</entry>
|
|
<entry class="symbol">#uimm5</entry>
|
|
</row>
|
|
<row>
|
|
<entry class="bitfield">1x010</entry>
|
|
<entry class="symbol">#uimm5</entry>
|
|
</row>
|
|
<row>
|
|
<entry class="bitfield">1xx00</entry>
|
|
<entry class="symbol">#uimm5</entry>
|
|
</row>
|
|
<row>
|
|
<entry class="bitfield">11101</entry>
|
|
<entry class="symbol">MUL4</entry>
|
|
</row>
|
|
<row>
|
|
<entry class="bitfield">11110</entry>
|
|
<entry class="symbol">MUL3</entry>
|
|
</row>
|
|
<row>
|
|
<entry class="bitfield">11111</entry>
|
|
<entry class="symbol">ALL</entry>
|
|
</row>
|
|
</tbody>
|
|
</tgroup>
|
|
</table>
|
|
</definition>
|
|
</explanation>
|
|
<explanation enclist="cntb_r_s_, cntd_r_s_, cnth_r_s_, cntw_r_s_" symboldefcount="1">
|
|
<symbol link="sa_imm"><imm></symbol>
|
|
<account encodedin="imm4">
|
|
<intro>
|
|
<para>Is the immediate multiplier, in the range 1 to 16, defaulting to 1, encoded in the "imm4" field.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
</explanations>
|
|
<ps_section howmany="1">
|
|
<ps name="CNTB-R.S-_" mylink="execute" enclabels="" sections="1" secttype="Operation">
|
|
<pstext mayhavelinks="1" section="Execute" rep_section="execute"><a link="impl-aarch64.CheckSVEEnabled.0" file="shared_pseudocode.xml" hover="function: CheckSVEEnabled()">CheckSVEEnabled</a>();
|
|
integer count = <a link="impl-aarch64.DecodePredCount.2" file="shared_pseudocode.xml" hover="function: integer DecodePredCount(bits(5) pattern, integer esize)">DecodePredCount</a>(pat, esize);
|
|
|
|
<a link="impl-aarch64.X.write.2" file="shared_pseudocode.xml" hover="accessor: X[integer n, integer width] = bits(width) value">X</a>[d, 64] = (count * imm)<63:0>;</pstext>
|
|
</ps>
|
|
</ps_section>
|
|
</instructionsection>
|