mirror of
https://github.com/pound-emu/ballistic.git
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216 lines
12 KiB
XML
216 lines
12 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
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<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<instructionsection id="CRC32" title="CRC32B, CRC32H, CRC32W, CRC32X -- A64" type="instruction">
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<docvars>
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<docvar key="feature" value="crc" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A64" />
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</docvars>
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<heading>CRC32B, CRC32H, CRC32W, CRC32X</heading>
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<desc>
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<brief>
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<para>CRC32 checksum</para>
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</brief>
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<authored>
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<para><instruction>CRC32</instruction> checksum performs a cyclic redundancy check (CRC) calculation on a value held in a general-purpose register. It takes an input CRC value in the first source operand, performs a CRC on the input value in the second source operand, and returns the output CRC value. The second source operand can be 8, 16, 32, or 64 bits. To align with common usage, the bit order of the values is reversed as part of the operation, and the polynomial <hexnumber>0x04C11DB7</hexnumber> is used for the CRC calculation.</para>
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<para>In an Armv8.0 implementation, this is an <arm-defined-word>optional</arm-defined-word> instruction. From Armv8.1, it is mandatory for all implementations to implement this instruction.</para>
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<note>
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<para><xref linkend="AArch64.id_aa64isar0_el1">ID_AA64ISAR0_EL1</xref>.CRC32 indicates whether this instruction is supported.</para>
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</note>
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</authored>
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</desc>
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<operationalnotes>
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<para>If PSTATE.DIT is 1:</para>
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<list type="unordered">
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<listitem><content>The execution time of this instruction is independent of:<list type="unordered"><listitem><content>The values of the data supplied in any of its registers.</content></listitem><listitem><content>The values of the NZCV flags.</content></listitem></list></content></listitem>
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<listitem><content>The response of this instruction to asynchronous exceptions does not vary based on:<list type="unordered"><listitem><content>The values of the data supplied in any of its registers.</content></listitem><listitem><content>The values of the NZCV flags.</content></listitem></list></content></listitem>
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</list>
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</operationalnotes>
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<alias_list howmany="0"></alias_list>
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<classes>
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<iclass name="CRC" oneof="1" id="iclass_crc" no_encodings="4" isa="A64">
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<docvars>
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<docvar key="feature" value="crc" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A64" />
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</docvars>
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<iclassintro count="4"></iclassintro>
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<arch_variants>
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<arch_variant name="ARMv8.0" feature="FEAT_CRC32" />
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</arch_variants>
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<regdiagram form="32" psname="aarch64/instrs/integer/crc" tworows="1">
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<box hibit="31" name="sf" usename="1">
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<c></c>
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</box>
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<box hibit="30" name="op" settings="1">
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<c>0</c>
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</box>
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<box hibit="29" name="S" settings="1">
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<c>0</c>
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</box>
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<box hibit="28" width="8" settings="8">
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="20" width="5" name="Rm" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="15" width="3" name="opcode2[5:3]" settings="3">
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<c>0</c>
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="12" name="C" usename="1" settings="1" psbits="x">
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<c>0</c>
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</box>
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<box hibit="11" width="2" name="sz" usename="1">
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<c colspan="2"></c>
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</box>
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<box hibit="9" width="5" name="Rn" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="4" width="5" name="Rd" usename="1">
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<c colspan="5"></c>
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</box>
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</regdiagram>
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<encoding name="CRC32B_32C_dp_2src" oneofinclass="4" oneof="4" label="CRC32B" bitdiffs="sf == 0 && sz == 00">
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<docvars>
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<docvar key="datatype" value="32" />
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<docvar key="feature" value="crc" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="CRC32B" />
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</docvars>
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<box hibit="31" width="1" name="sf">
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<c>0</c>
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</box>
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<box hibit="11" width="2" name="sz">
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<c>0</c>
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<c>0</c>
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</box>
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<asmtemplate><text>CRC32B </text><a link="sa_wd" hover="32-bit general-purpose accumulator output register (field "Rd")"><Wd></a><text>, </text><a link="sa_wn" hover="32-bit general-purpose accumulator input register (field "Rn")"><Wn></a><text>, </text><a link="sa_wm" hover="32-bit general-purpose data source register (field "Rm")"><Wm></a></asmtemplate>
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</encoding>
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<encoding name="CRC32H_32C_dp_2src" oneofinclass="4" oneof="4" label="CRC32H" bitdiffs="sf == 0 && sz == 01">
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<docvars>
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<docvar key="datatype" value="32" />
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<docvar key="feature" value="crc" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="CRC32H" />
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</docvars>
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<box hibit="31" width="1" name="sf">
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<c>0</c>
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</box>
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<box hibit="11" width="2" name="sz">
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<c>0</c>
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<c>1</c>
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</box>
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<asmtemplate><text>CRC32H </text><a link="sa_wd" hover="32-bit general-purpose accumulator output register (field "Rd")"><Wd></a><text>, </text><a link="sa_wn" hover="32-bit general-purpose accumulator input register (field "Rn")"><Wn></a><text>, </text><a link="sa_wm" hover="32-bit general-purpose data source register (field "Rm")"><Wm></a></asmtemplate>
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</encoding>
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<encoding name="CRC32W_32C_dp_2src" oneofinclass="4" oneof="4" label="CRC32W" bitdiffs="sf == 0 && sz == 10">
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<docvars>
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<docvar key="datatype" value="32" />
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<docvar key="feature" value="crc" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="CRC32W" />
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</docvars>
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<box hibit="31" width="1" name="sf">
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<c>0</c>
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</box>
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<box hibit="11" width="2" name="sz">
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<c>1</c>
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<c>0</c>
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</box>
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<asmtemplate><text>CRC32W </text><a link="sa_wd" hover="32-bit general-purpose accumulator output register (field "Rd")"><Wd></a><text>, </text><a link="sa_wn" hover="32-bit general-purpose accumulator input register (field "Rn")"><Wn></a><text>, </text><a link="sa_wm" hover="32-bit general-purpose data source register (field "Rm")"><Wm></a></asmtemplate>
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</encoding>
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<encoding name="CRC32X_64C_dp_2src" oneofinclass="4" oneof="4" label="CRC32X" bitdiffs="sf == 1 && sz == 11">
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<docvars>
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<docvar key="datatype" value="64" />
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<docvar key="feature" value="crc" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="CRC32X" />
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</docvars>
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<box hibit="31" width="1" name="sf">
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<c>1</c>
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</box>
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<box hibit="11" width="2" name="sz">
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<c>1</c>
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<c>1</c>
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</box>
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<asmtemplate><text>CRC32X </text><a link="sa_wd" hover="32-bit general-purpose accumulator output register (field "Rd")"><Wd></a><text>, </text><a link="sa_wn" hover="32-bit general-purpose accumulator input register (field "Rn")"><Wn></a><text>, </text><a link="sa_xm" hover="64-bit general-purpose data source register (field "Rm")"><Xm></a></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="aarch64/instrs/integer/crc" mylink="aarch64.instrs.integer.crc" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-shared.HaveCRCExt.0" file="shared_pseudocode.xml" hover="function: boolean HaveCRCExt()">HaveCRCExt</a>() then UNDEFINED;
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integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rd);
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integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rn);
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integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rm);
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if sf == '1' && sz != '11' then UNDEFINED;
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if sf == '0' && sz == '11' then UNDEFINED;
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integer size = 8 << <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(sz); // 2-bit size field -> 8, 16, 32, 64
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boolean crc32c = (C == '1');</pstext>
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</ps>
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</ps_section>
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</iclass>
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</classes>
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<explanations scope="all">
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<explanation enclist="CRC32B_32C_dp_2src, CRC32H_32C_dp_2src, CRC32W_32C_dp_2src, CRC32X_64C_dp_2src" symboldefcount="1">
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<symbol link="sa_wd"><Wd></symbol>
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<account encodedin="Rd">
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<intro>
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<para>Is the 32-bit name of the general-purpose accumulator output register, encoded in the "Rd" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="CRC32B_32C_dp_2src, CRC32H_32C_dp_2src, CRC32W_32C_dp_2src, CRC32X_64C_dp_2src" symboldefcount="1">
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<symbol link="sa_wn"><Wn></symbol>
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<account encodedin="Rn">
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<intro>
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<para>Is the 32-bit name of the general-purpose accumulator input register, encoded in the "Rn" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="CRC32X_64C_dp_2src" symboldefcount="1">
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<symbol link="sa_xm"><Xm></symbol>
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<account encodedin="Rm">
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<intro>
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<para>Is the 64-bit name of the general-purpose data source register, encoded in the "Rm" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="CRC32B_32C_dp_2src, CRC32H_32C_dp_2src, CRC32W_32C_dp_2src" symboldefcount="1">
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<symbol link="sa_wm"><Wm></symbol>
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<account encodedin="Rm">
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<intro>
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<para>Is the 32-bit name of the general-purpose data source register, encoded in the "Rm" field.</para>
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</intro>
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</account>
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</explanation>
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</explanations>
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<ps_section howmany="1">
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<ps name="aarch64/instrs/integer/crc" mylink="execute" enclabels="" sections="1" secttype="Operation">
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<pstext mayhavelinks="1" section="Execute" rep_section="execute">bits(32) acc = <a link="impl-aarch64.X.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) X[integer n, integer width]">X</a>[n, 32]; // accumulator
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bits(size) val = <a link="impl-aarch64.X.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) X[integer n, integer width]">X</a>[m, size]; // input value
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bits(32) poly = (if crc32c then 0x1EDC6F41 else 0x04C11DB7)<31:0>;
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bits(32+size) tempacc = <a link="impl-shared.BitReverse.1" file="shared_pseudocode.xml" hover="function: bits(N) BitReverse(bits(N) data)">BitReverse</a>(acc) : <a link="impl-shared.Zeros.1" file="shared_pseudocode.xml" hover="function: bits(N) Zeros(integer N)">Zeros</a>(size);
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bits(size+32) tempval = <a link="impl-shared.BitReverse.1" file="shared_pseudocode.xml" hover="function: bits(N) BitReverse(bits(N) data)">BitReverse</a>(val) : <a link="impl-shared.Zeros.1" file="shared_pseudocode.xml" hover="function: bits(N) Zeros(integer N)">Zeros</a>(32);
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// Poly32Mod2 on a bitstring does a polynomial Modulus over {0,1} operation
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<a link="impl-aarch64.X.write.2" file="shared_pseudocode.xml" hover="accessor: X[integer n, integer width] = bits(width) value">X</a>[d, 32] = <a link="impl-shared.BitReverse.1" file="shared_pseudocode.xml" hover="function: bits(N) BitReverse(bits(N) data)">BitReverse</a>(<a link="impl-shared.Poly32Mod2.2" file="shared_pseudocode.xml" hover="function: bits(32) Poly32Mod2(bits(N) data_in, bits(32) poly)">Poly32Mod2</a>(tempacc EOR tempval, poly));</pstext>
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</ps>
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</ps_section>
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</instructionsection>
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