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https://github.com/pound-emu/ballistic.git
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281 lines
15 KiB
XML
281 lines
15 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
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<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<instructionsection id="fclamp_mz_zz" title="FCLAMP" type="instruction">
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<docvars>
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<docvar key="instr-class" value="mortlach2" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="FCLAMP" />
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</docvars>
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<heading>FCLAMP</heading>
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<desc>
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<brief>Multi-vector floating-point clamp to minimum/maximum number</brief>
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<description>
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<para>Clamp each floating-point element in the two or four destination vectors to between the floating-point minimum value in the corresponding element of the first source vector and the floating-point maximum value in the corresponding element of the second source vector and destructively place the clamped results in the corresponding elements of the two or four destination vectors. If at least one element value contributing to a result is numeric and the other is either numeric or a quiet NaN, then the result is the numeric value.</para>
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<para>This instruction follows SME2 floating-point numerical behaviors corresponding to instructions that place their results in one or more SVE Z vectors.</para>
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<para>This instruction is unpredicated.</para>
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</description>
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<status>Green</status>
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<predicated>False</predicated>
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<sm_policy>SM_1_only</sm_policy>
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</desc>
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<alias_list howmany="0"></alias_list>
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<classes>
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<classesintro count="2">
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<txt>It has encodings from 2 classes:</txt>
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<a href="#iclass_to_2reg">Two registers</a>
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<txt> and </txt>
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<a href="#iclass_to_4reg">Four registers</a>
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</classesintro>
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<iclass name="Two registers" oneof="2" id="iclass_to_2reg" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="instr-class" value="mortlach2" />
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<docvar key="isa" value="A64" />
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<docvar key="ldstruct-regcount" value="to-2reg" />
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<docvar key="mnemonic" value="FCLAMP" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<arch_variants>
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<arch_variant name="FEAT_SME2" feature="FEAT_SME2" />
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</arch_variants>
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<regdiagram form="32" psname="FCLAMP-MZ.ZZ-2" tworows="1">
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<box hibit="31" width="8" settings="8">
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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</box>
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<box hibit="23" width="2" name="size" usename="1" settings="2" constraint="!= 00">
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<c colspan="2">!= 00</c>
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</box>
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<box hibit="21" settings="1">
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<c>1</c>
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</box>
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<box hibit="20" width="5" name="Zm" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="15" width="6" settings="6">
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="9" width="5" name="Zn" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="4" width="4" name="Zd" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="0" settings="1">
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<c>0</c>
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</box>
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</regdiagram>
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<encoding name="fclamp_mz_zz_2" oneofinclass="1" oneof="2" label="">
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<docvars>
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<docvar key="instr-class" value="mortlach2" />
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<docvar key="isa" value="A64" />
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<docvar key="ldstruct-regcount" value="to-2reg" />
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<docvar key="mnemonic" value="FCLAMP" />
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</docvars>
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<asmtemplate><text>FCLAMP </text><text>{</text><text> </text><a link="sa_zd1" hover="First destination scalable vector register of a multi-vector sequence (field Zd)"><Zd1></a><text>.</text><a link="sa_t" hover="Size specifier (field "size") [D,H,S]"><T></a><text>-</text><a link="sa_zd2" hover="Second destination scalable vector register of a multi-vector sequence (field Zd)"><Zd2></a><text>.</text><a link="sa_t" hover="Size specifier (field "size") [D,H,S]"><T></a><text> </text><text>}</text><text>, </text><a link="sa_zn" hover="First source scalable vector register (field "Zn")"><Zn></a><text>.</text><a link="sa_t" hover="Size specifier (field "size") [D,H,S]"><T></a><text>, </text><a link="sa_zm" hover="Second source scalable vector register (field "Zm")"><Zm></a><text>.</text><a link="sa_t" hover="Size specifier (field "size") [D,H,S]"><T></a></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="FCLAMP-MZ.ZZ-2" mylink="FCLAMP-MZ.ZZ-2" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSME2.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME2()">HaveSME2</a>() then UNDEFINED;
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constant integer esize = 8 << <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(size);
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integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zn);
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integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zm);
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integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zd:'0');
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constant integer nreg = 2;</pstext>
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</ps>
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</ps_section>
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</iclass>
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<iclass name="Four registers" oneof="2" id="iclass_to_4reg" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="instr-class" value="mortlach2" />
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<docvar key="isa" value="A64" />
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<docvar key="ldstruct-regcount" value="to-4reg" />
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<docvar key="mnemonic" value="FCLAMP" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<arch_variants>
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<arch_variant name="FEAT_SME2" feature="FEAT_SME2" />
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</arch_variants>
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<regdiagram form="32" psname="FCLAMP-MZ.ZZ-4" tworows="1">
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<box hibit="31" width="8" settings="8">
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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</box>
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<box hibit="23" width="2" name="size" usename="1" settings="2" constraint="!= 00">
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<c colspan="2">!= 00</c>
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</box>
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<box hibit="21" settings="1">
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<c>1</c>
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</box>
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<box hibit="20" width="5" name="Zm" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="15" width="6" settings="6">
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="9" width="5" name="Zn" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="4" width="3" name="Zd" usename="1">
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<c colspan="3"></c>
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</box>
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<box hibit="1" width="2" settings="2">
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<c>0</c>
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<c>0</c>
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</box>
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</regdiagram>
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<encoding name="fclamp_mz_zz_4" oneofinclass="1" oneof="2" label="">
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<docvars>
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<docvar key="instr-class" value="mortlach2" />
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<docvar key="isa" value="A64" />
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<docvar key="ldstruct-regcount" value="to-4reg" />
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<docvar key="mnemonic" value="FCLAMP" />
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</docvars>
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<asmtemplate><text>FCLAMP </text><text>{</text><text> </text><a link="sa_zd1_1" hover="First destination scalable vector register of a multi-vector sequence (field Zd)"><Zd1></a><text>.</text><a link="sa_t" hover="Size specifier (field "size") [D,H,S]"><T></a><text>-</text><a link="sa_zd4" hover="Fourth destination scalable vector register of a multi-vector sequence (field Zd)"><Zd4></a><text>.</text><a link="sa_t" hover="Size specifier (field "size") [D,H,S]"><T></a><text> </text><text>}</text><text>, </text><a link="sa_zn" hover="First source scalable vector register (field "Zn")"><Zn></a><text>.</text><a link="sa_t" hover="Size specifier (field "size") [D,H,S]"><T></a><text>, </text><a link="sa_zm" hover="Second source scalable vector register (field "Zm")"><Zm></a><text>.</text><a link="sa_t" hover="Size specifier (field "size") [D,H,S]"><T></a></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="FCLAMP-MZ.ZZ-4" mylink="FCLAMP-MZ.ZZ-4" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSME2.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME2()">HaveSME2</a>() then UNDEFINED;
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constant integer esize = 8 << <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(size);
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integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zn);
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integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zm);
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integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zd:'00');
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constant integer nreg = 4;</pstext>
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</ps>
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</ps_section>
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</iclass>
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</classes>
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<explanations scope="all">
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<explanation enclist="fclamp_mz_zz_2" symboldefcount="1">
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<symbol link="sa_zd1"><Zd1></symbol>
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<account encodedin="Zd">
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<docvars>
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<docvar key="ldstruct-regcount" value="to-2reg" />
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</docvars>
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<intro>
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<para>For the two registers variant: is the name of the first destination scalable vector register of a multi-vector sequence, encoded as "Zd" times 2.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="fclamp_mz_zz_4" symboldefcount="2">
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<symbol link="sa_zd1_1"><Zd1></symbol>
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<account encodedin="Zd">
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<docvars>
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<docvar key="ldstruct-regcount" value="to-4reg" />
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</docvars>
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<intro>
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<para>For the four registers variant: is the name of the first destination scalable vector register of a multi-vector sequence, encoded as "Zd" times 4.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="fclamp_mz_zz_2, fclamp_mz_zz_4" symboldefcount="1">
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<symbol link="sa_t"><T></symbol>
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<definition encodedin="size">
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<intro>Is the size specifier, </intro>
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<table class="valuetable">
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<tgroup cols="2">
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<thead>
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<row>
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<entry class="bitfield">size</entry>
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<entry class="symbol"><T></entry>
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</row>
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</thead>
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<tbody>
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<row>
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<entry class="bitfield">01</entry>
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<entry class="symbol">H</entry>
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</row>
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<row>
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<entry class="bitfield">10</entry>
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<entry class="symbol">S</entry>
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</row>
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<row>
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<entry class="bitfield">11</entry>
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<entry class="symbol">D</entry>
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</row>
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</tbody>
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</tgroup>
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</table>
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</definition>
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</explanation>
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<explanation enclist="fclamp_mz_zz_4" symboldefcount="1">
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<symbol link="sa_zd4"><Zd4></symbol>
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<account encodedin="Zd">
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<intro>
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<para>Is the name of the fourth destination scalable vector register of a multi-vector sequence, encoded as "Zd" times 4 plus 3.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="fclamp_mz_zz_2" symboldefcount="1">
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<symbol link="sa_zd2"><Zd2></symbol>
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<account encodedin="Zd">
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<intro>
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<para>Is the name of the second destination scalable vector register of a multi-vector sequence, encoded as "Zd" times 2 plus 1.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="fclamp_mz_zz_2, fclamp_mz_zz_4" symboldefcount="1">
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<symbol link="sa_zn"><Zn></symbol>
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<account encodedin="Zn">
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<intro>
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<para>Is the name of the first source scalable vector register, encoded in the "Zn" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="fclamp_mz_zz_2, fclamp_mz_zz_4" symboldefcount="1">
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<symbol link="sa_zm"><Zm></symbol>
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<account encodedin="Zm">
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<intro>
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<para>Is the name of the second source scalable vector register, encoded in the "Zm" field.</para>
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</intro>
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</account>
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</explanation>
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</explanations>
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<ps_section howmany="1">
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<ps name="FCLAMP-MZ.ZZ-2" mylink="execute" enclabels="" sections="1" secttype="Operation">
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<pstext mayhavelinks="1" section="Execute" rep_section="execute"><a link="impl-aarch64.CheckStreamingSVEEnabled.0" file="shared_pseudocode.xml" hover="function: CheckStreamingSVEEnabled()">CheckStreamingSVEEnabled</a>();
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constant integer VL = <a link="impl-aarch64.CurrentVL.read.none" file="shared_pseudocode.xml" hover="accessor: integer CurrentVL">CurrentVL</a>;
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constant integer elements = VL DIV esize;
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array [0..3] of bits(VL) results;
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for r = 0 to nreg-1
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bits(VL) operand1 = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[n, VL];
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bits(VL) operand2 = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[m, VL];
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bits(VL) operand3 = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[d+r, VL];
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for e = 0 to elements-1
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bits(esize) element1 = <a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[operand1, e, esize];
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bits(esize) element2 = <a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[operand2, e, esize];
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bits(esize) element3 = <a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[operand3, e, esize];
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<a link="impl-shared.Elem.write.3" file="shared_pseudocode.xml" hover="accessor: Elem[bits(N) &vector, integer e, integer size] = bits(size) value">Elem</a>[results[r], e, esize] = <a link="impl-shared.FPMinNum.3" file="shared_pseudocode.xml" hover="function: bits(N) FPMinNum(bits(N) op1_in, bits(N) op2_in, FPCRType fpcr)">FPMinNum</a>(<a link="impl-shared.FPMaxNum.3" file="shared_pseudocode.xml" hover="function: bits(N) FPMaxNum(bits(N) op1_in, bits(N) op2_in, FPCRType fpcr)">FPMaxNum</a>(element1, element3, FPCR[]), element2, FPCR[]);
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for r = 0 to nreg-1
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<a link="impl-aarch64.Z.write.2" file="shared_pseudocode.xml" hover="accessor: Z[integer n, integer width] = bits(width) value">Z</a>[d+r, VL] = results[r];</pstext>
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</ps>
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</ps_section>
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</instructionsection>
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