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https://github.com/pound-emu/ballistic.git
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218 lines
11 KiB
XML
218 lines
11 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
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<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<instructionsection id="fminqv_z_p_z" title="FMINQV" type="instruction">
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<docvars>
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<docvar key="instr-class" value="sve2" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="FMINQV" />
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</docvars>
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<heading>FMINQV</heading>
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<desc>
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<brief>Floating-point minimum recursive reduction of quadword vector segments</brief>
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<description>
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<para>Floating-point minimum of the same element numbers from each 128-bit source vector segment using a recursive pairwise reduction, placing each result into the corresponding element number of the 128-bit SIMD&FP destination register. Inactive elements in the source vector are treated as +Infinity.</para>
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</description>
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<status>Green</status>
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<predicated>True</predicated>
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</desc>
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<alias_list howmany="0"></alias_list>
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<classes>
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<iclass name="SVE2" oneof="1" id="iclass_sve2" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="instr-class" value="sve2" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="FMINQV" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<arch_variants>
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<arch_variant name="FEAT_SVE2p1" feature="FEAT_SVE2p1" />
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</arch_variants>
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<regdiagram form="32" psname="FMINQV-Z.P.Z-_">
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<box hibit="31" width="8" settings="8">
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<c>0</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="23" width="2" name="size" usename="1">
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<c colspan="2"></c>
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</box>
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<box hibit="21" width="3" settings="3">
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<c>0</c>
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="18" width="2" name="opc<2:1>" settings="2">
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<c>1</c>
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<c>1</c>
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</box>
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<box hibit="16" name="opc<0>" settings="1">
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<c>1</c>
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</box>
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<box hibit="15" width="3" settings="3">
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<c>1</c>
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<c>0</c>
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<c>1</c>
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</box>
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<box hibit="12" width="3" name="Pg" usename="1">
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<c colspan="3"></c>
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</box>
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<box hibit="9" width="5" name="Zn" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="4" width="5" name="Vd" usename="1">
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<c colspan="5"></c>
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</box>
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</regdiagram>
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<encoding name="fminqv_z_p_z_" oneofinclass="1" oneof="1" label="">
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<docvars>
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<docvar key="instr-class" value="sve2" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="FMINQV" />
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</docvars>
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<asmtemplate><text>FMINQV </text><a link="sa_vd" hover="Destination SIMD&FP register (field "Vd")"><Vd></a><text>.</text><a link="sa_t" hover="Arrangement specifier (field "size") [2D,4S,8H]"><T></a><text>, </text><a link="sa_pg" hover="Governing scalable predicate register P0-P7 (field "Pg")"><Pg></a><text>, </text><a link="sa_zn" hover="Source scalable vector register (field "Zn")"><Zn></a><text>.</text><a link="sa_tb" hover="Size specifier (field "size") [D,H,S]"><Tb></a></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="FMINQV-Z.P.Z-_" mylink="FMINQV-Z.P.Z-_" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSVE2p1.0" file="shared_pseudocode.xml" hover="function: boolean HaveSVE2p1()">HaveSVE2p1</a>() && !<a link="impl-aarch64.HaveSME2p1.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME2p1()">HaveSME2p1</a>() then UNDEFINED;
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if size == '00' then UNDEFINED;
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constant integer esize = 8 << <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(size);
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integer g = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Pg);
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integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zn);
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integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Vd);</pstext>
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</ps>
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</ps_section>
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</iclass>
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</classes>
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<explanations scope="all">
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<explanation enclist="fminqv_z_p_z_" symboldefcount="1">
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<symbol link="sa_vd"><Vd></symbol>
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<account encodedin="Vd">
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<intro>
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<para>Is the name of the destination SIMD&FP register, encoded in the "Vd" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="fminqv_z_p_z_" symboldefcount="1">
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<symbol link="sa_t"><T></symbol>
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<definition encodedin="size">
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<intro>Is an arrangement specifier, </intro>
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<table class="valuetable">
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<tgroup cols="2">
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<thead>
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<row>
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<entry class="bitfield">size</entry>
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<entry class="symbol"><T></entry>
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</row>
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</thead>
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<tbody>
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<row>
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<entry class="bitfield">00</entry>
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<entry class="symbol">RESERVED</entry>
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</row>
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<row>
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<entry class="bitfield">01</entry>
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<entry class="symbol">8H</entry>
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</row>
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<row>
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<entry class="bitfield">10</entry>
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<entry class="symbol">4S</entry>
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</row>
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<row>
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<entry class="bitfield">11</entry>
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<entry class="symbol">2D</entry>
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</row>
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</tbody>
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</tgroup>
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</table>
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</definition>
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</explanation>
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<explanation enclist="fminqv_z_p_z_" symboldefcount="1">
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<symbol link="sa_pg"><Pg></symbol>
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<account encodedin="Pg">
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<intro>
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<para>Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="fminqv_z_p_z_" symboldefcount="1">
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<symbol link="sa_zn"><Zn></symbol>
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<account encodedin="Zn">
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<intro>
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<para>Is the name of the source scalable vector register, encoded in the "Zn" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="fminqv_z_p_z_" symboldefcount="1">
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<symbol link="sa_tb"><Tb></symbol>
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<definition encodedin="size">
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<intro>Is the size specifier, </intro>
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<table class="valuetable">
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<tgroup cols="2">
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<thead>
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<row>
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<entry class="bitfield">size</entry>
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<entry class="symbol"><Tb></entry>
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</row>
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</thead>
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<tbody>
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<row>
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<entry class="bitfield">00</entry>
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<entry class="symbol">RESERVED</entry>
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</row>
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<row>
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<entry class="bitfield">01</entry>
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<entry class="symbol">H</entry>
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</row>
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<row>
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<entry class="bitfield">10</entry>
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<entry class="symbol">S</entry>
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</row>
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<row>
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<entry class="bitfield">11</entry>
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<entry class="symbol">D</entry>
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</row>
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</tbody>
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</tgroup>
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</table>
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</definition>
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</explanation>
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</explanations>
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<ps_section howmany="1">
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<ps name="FMINQV-Z.P.Z-_" mylink="execute" enclabels="" sections="1" secttype="Operation">
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<pstext mayhavelinks="1" section="Execute" rep_section="execute"><a link="impl-aarch64.CheckSVEEnabled.0" file="shared_pseudocode.xml" hover="function: CheckSVEEnabled()">CheckSVEEnabled</a>();
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constant integer VL = <a link="impl-aarch64.CurrentVL.read.none" file="shared_pseudocode.xml" hover="accessor: integer CurrentVL">CurrentVL</a>;
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constant integer PL = VL DIV 8;
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constant integer segments = VL DIV 128;
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constant integer elempersegment = 128 DIV esize;
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bits(PL) mask = <a link="impl-aarch64.P.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) P[integer n, integer width]">P</a>[g, PL];
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bits(VL) operand = if <a link="impl-aarch64.AnyActiveElement.2" file="shared_pseudocode.xml" hover="function: boolean AnyActiveElement(bits(N) mask, integer esize)">AnyActiveElement</a>(mask, esize) then <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[n, VL] else <a link="impl-shared.Zeros.1" file="shared_pseudocode.xml" hover="function: bits(N) Zeros(integer N)">Zeros</a>(VL);
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bits(esize) identity = <a link="impl-shared.FPInfinity.2" file="shared_pseudocode.xml" hover="function: bits(N) FPInfinity(bit sign, integer N)">FPInfinity</a>('0', esize);
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bits(128) result = <a link="impl-shared.Zeros.1" file="shared_pseudocode.xml" hover="function: bits(N) Zeros(integer N)">Zeros</a>(128);
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constant integer p2bits = <a link="impl-aarch64.CeilPow2.1" file="shared_pseudocode.xml" hover="function: integer CeilPow2(integer x)">CeilPow2</a>(segments*esize);
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constant integer p2elems = p2bits DIV esize;
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for e = 0 to elempersegment-1
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bits(p2bits) stmp;
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bits(esize) dtmp;
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for s = 0 to p2elems-1
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if s < segments && <a link="impl-aarch64.ActivePredicateElement.3" file="shared_pseudocode.xml" hover="function: boolean ActivePredicateElement(bits(N) pred, integer e, integer esize)">ActivePredicateElement</a>(mask, s * elempersegment + e, esize) then
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<a link="impl-shared.Elem.write.3" file="shared_pseudocode.xml" hover="accessor: Elem[bits(N) &vector, integer e, integer size] = bits(size) value">Elem</a>[stmp, s, esize] = <a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[operand, s * elempersegment + e, esize];
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else
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<a link="impl-shared.Elem.write.3" file="shared_pseudocode.xml" hover="accessor: Elem[bits(N) &vector, integer e, integer size] = bits(size) value">Elem</a>[stmp, s, esize] = identity;
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dtmp = <a link="impl-aarch64.Reduce.3" file="shared_pseudocode.xml" hover="function: bits(esize) Reduce(ReduceOp op, bits(N) input, integer esize)">Reduce</a>(<a link="ReduceOp_FMIN" file="shared_pseudocode.xml" hover="enumeration ReduceOp {ReduceOp_FMINNUM, ReduceOp_FMAXNUM, ReduceOp_FMIN, ReduceOp_FMAX, ReduceOp_FADD, ReduceOp_ADD}">ReduceOp_FMIN</a>, stmp, esize);
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<a link="impl-shared.Elem.write.3" file="shared_pseudocode.xml" hover="accessor: Elem[bits(N) &vector, integer e, integer size] = bits(size) value">Elem</a>[result, e, esize] = dtmp;
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<a link="impl-aarch64.V.write.2" file="shared_pseudocode.xml" hover="accessor: V[integer n, integer width] = bits(width) value">V</a>[d, 128] = result;</pstext>
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</ps>
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</ps_section>
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</instructionsection>
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