Files
archived-ballistic/spec/arm64_xml/frintn_mz_z.xml
Ronald Caesar 26a677f8b4 decoder: Add ARM specification docs
Signed-off-by: Ronald Caesar <github43132@proton.me>
2025-12-12 18:11:36 -04:00

294 lines
14 KiB
XML

<?xml version="1.0" encoding="utf-8"?>
<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
<instructionsection id="frintn_mz_z" title="FRINTN" type="instruction">
<docvars>
<docvar key="instr-class" value="mortlach2" />
<docvar key="isa" value="A64" />
<docvar key="mnemonic" value="FRINTN" />
</docvars>
<heading>FRINTN</heading>
<desc>
<brief>Multi-vector floating-point round to integral value, to nearest with ties to even</brief>
<description>
<para>Round to the nearest integral floating-point value, with ties rounding to an even value, each element of the two or four source vectors, and place the results in the corresponding elements of the two or four destination vectors.</para>
<para>This instruction follows SME2 floating-point numerical behaviors corresponding to instructions that place their results in one or more SVE Z vectors.</para>
<para>This instruction is unpredicated.</para>
</description>
<status>Green</status>
<predicated>False</predicated>
<sm_policy>SM_1_only</sm_policy>
</desc>
<alias_list howmany="0"></alias_list>
<classes>
<classesintro count="2">
<txt>It has encodings from 2 classes:</txt>
<a href="#iclass_to_2reg">Two registers</a>
<txt> and </txt>
<a href="#iclass_to_4reg">Four registers</a>
</classesintro>
<iclass name="Two registers" oneof="2" id="iclass_to_2reg" no_encodings="1" isa="A64">
<docvars>
<docvar key="instr-class" value="mortlach2" />
<docvar key="isa" value="A64" />
<docvar key="ldstruct-regcount" value="to-2reg" />
<docvar key="mnemonic" value="FRINTN" />
</docvars>
<iclassintro count="1"></iclassintro>
<arch_variants>
<arch_variant name="FEAT_SME2" feature="FEAT_SME2" />
</arch_variants>
<regdiagram form="32" psname="FRINTN-MZ.Z-2" tworows="1">
<box hibit="31" width="8" settings="8">
<c>1</c>
<c>1</c>
<c>0</c>
<c>0</c>
<c>0</c>
<c>0</c>
<c>0</c>
<c>1</c>
</box>
<box hibit="23" name="size&lt;1&gt;" usename="1" settings="1">
<c>1</c>
</box>
<box hibit="22" name="size&lt;0&gt;" usename="1" settings="1">
<c>0</c>
</box>
<box hibit="21" width="3" settings="3">
<c>1</c>
<c>0</c>
<c>1</c>
</box>
<box hibit="18" width="2" name="opc&lt;2:1&gt;" settings="2">
<c>0</c>
<c>0</c>
</box>
<box hibit="16" name="opc&lt;0&gt;" settings="1">
<c>0</c>
</box>
<box hibit="15" width="6" settings="6">
<c>1</c>
<c>1</c>
<c>1</c>
<c>0</c>
<c>0</c>
<c>0</c>
</box>
<box hibit="9" width="4" name="Zn" usename="1">
<c colspan="4"></c>
</box>
<box hibit="5" settings="1">
<c>0</c>
</box>
<box hibit="4" width="4" name="Zd" usename="1">
<c colspan="4"></c>
</box>
<box hibit="0" settings="1">
<c>0</c>
</box>
</regdiagram>
<encoding name="frintn_mz_z_2" oneofinclass="1" oneof="2" label="">
<docvars>
<docvar key="instr-class" value="mortlach2" />
<docvar key="isa" value="A64" />
<docvar key="ldstruct-regcount" value="to-2reg" />
<docvar key="mnemonic" value="FRINTN" />
</docvars>
<asmtemplate><text>FRINTN </text><text>{</text><text> </text><a link="sa_zd1" hover="First destination scalable vector register of a multi-vector sequence (field Zd)">&lt;Zd1&gt;</a><text>.S-</text><a link="sa_zd2" hover="Second destination scalable vector register of a multi-vector sequence (field Zd)">&lt;Zd2&gt;</a><text>.S </text><text>}</text><text>, </text><text>{</text><text> </text><a link="sa_zn1" hover="First scalable vector register of a multi-vector sequence (field Zn)">&lt;Zn1&gt;</a><text>.S-</text><a link="sa_zn2" hover="Second scalable vector register of a multi-vector sequence (field Zn)">&lt;Zn2&gt;</a><text>.S </text><text>}</text></asmtemplate>
</encoding>
<ps_section howmany="1">
<ps name="FRINTN-MZ.Z-2" mylink="FRINTN-MZ.Z-2" enclabels="" sections="1" secttype="noheading">
<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSME2.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME2()">HaveSME2</a>() then UNDEFINED;
integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zn:'0');
integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zd:'0');
constant integer nreg = 2;
boolean exact = FALSE;
<a link="FPRounding" file="shared_pseudocode.xml" hover="enumeration FPRounding {FPRounding_TIEEVEN, FPRounding_POSINF, FPRounding_NEGINF, FPRounding_ZERO, FPRounding_TIEAWAY, FPRounding_ODD}">FPRounding</a> rounding = <a link="FPRounding_TIEEVEN" file="shared_pseudocode.xml" hover="enumeration FPRounding {FPRounding_TIEEVEN, FPRounding_POSINF, FPRounding_NEGINF, FPRounding_ZERO, FPRounding_TIEAWAY, FPRounding_ODD}">FPRounding_TIEEVEN</a>;</pstext>
</ps>
</ps_section>
</iclass>
<iclass name="Four registers" oneof="2" id="iclass_to_4reg" no_encodings="1" isa="A64">
<docvars>
<docvar key="instr-class" value="mortlach2" />
<docvar key="isa" value="A64" />
<docvar key="ldstruct-regcount" value="to-4reg" />
<docvar key="mnemonic" value="FRINTN" />
</docvars>
<iclassintro count="1"></iclassintro>
<arch_variants>
<arch_variant name="FEAT_SME2" feature="FEAT_SME2" />
</arch_variants>
<regdiagram form="32" psname="FRINTN-MZ.Z-4" tworows="1">
<box hibit="31" width="8" settings="8">
<c>1</c>
<c>1</c>
<c>0</c>
<c>0</c>
<c>0</c>
<c>0</c>
<c>0</c>
<c>1</c>
</box>
<box hibit="23" name="size&lt;1&gt;" usename="1" settings="1">
<c>1</c>
</box>
<box hibit="22" name="size&lt;0&gt;" usename="1" settings="1">
<c>0</c>
</box>
<box hibit="21" width="3" settings="3">
<c>1</c>
<c>1</c>
<c>1</c>
</box>
<box hibit="18" width="2" name="opc&lt;2:1&gt;" settings="2">
<c>0</c>
<c>0</c>
</box>
<box hibit="16" name="opc&lt;0&gt;" settings="1">
<c>0</c>
</box>
<box hibit="15" width="6" settings="6">
<c>1</c>
<c>1</c>
<c>1</c>
<c>0</c>
<c>0</c>
<c>0</c>
</box>
<box hibit="9" width="3" name="Zn" usename="1">
<c colspan="3"></c>
</box>
<box hibit="6" width="2" settings="2">
<c>0</c>
<c>0</c>
</box>
<box hibit="4" width="3" name="Zd" usename="1">
<c colspan="3"></c>
</box>
<box hibit="1" width="2" settings="2">
<c>0</c>
<c>0</c>
</box>
</regdiagram>
<encoding name="frintn_mz_z_4" oneofinclass="1" oneof="2" label="">
<docvars>
<docvar key="instr-class" value="mortlach2" />
<docvar key="isa" value="A64" />
<docvar key="ldstruct-regcount" value="to-4reg" />
<docvar key="mnemonic" value="FRINTN" />
</docvars>
<asmtemplate><text>FRINTN </text><text>{</text><text> </text><a link="sa_zd1_1" hover="First destination scalable vector register of a multi-vector sequence (field Zd)">&lt;Zd1&gt;</a><text>.S-</text><a link="sa_zd4" hover="Fourth destination scalable vector register of a multi-vector sequence (field Zd)">&lt;Zd4&gt;</a><text>.S </text><text>}</text><text>, </text><text>{</text><text> </text><a link="sa_zn1_1" hover="First scalable vector register of a multi-vector sequence (field Zn)">&lt;Zn1&gt;</a><text>.S-</text><a link="sa_zn4" hover="Fourth scalable vector register of a multi-vector sequence (field Zn)">&lt;Zn4&gt;</a><text>.S </text><text>}</text></asmtemplate>
</encoding>
<ps_section howmany="1">
<ps name="FRINTN-MZ.Z-4" mylink="FRINTN-MZ.Z-4" enclabels="" sections="1" secttype="noheading">
<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSME2.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME2()">HaveSME2</a>() then UNDEFINED;
integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zn:'00');
integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zd:'00');
constant integer nreg = 4;
boolean exact = FALSE;
<a link="FPRounding" file="shared_pseudocode.xml" hover="enumeration FPRounding {FPRounding_TIEEVEN, FPRounding_POSINF, FPRounding_NEGINF, FPRounding_ZERO, FPRounding_TIEAWAY, FPRounding_ODD}">FPRounding</a> rounding = <a link="FPRounding_TIEEVEN" file="shared_pseudocode.xml" hover="enumeration FPRounding {FPRounding_TIEEVEN, FPRounding_POSINF, FPRounding_NEGINF, FPRounding_ZERO, FPRounding_TIEAWAY, FPRounding_ODD}">FPRounding_TIEEVEN</a>;</pstext>
</ps>
</ps_section>
</iclass>
</classes>
<explanations scope="all">
<explanation enclist="frintn_mz_z_2" symboldefcount="1">
<symbol link="sa_zd1">&lt;Zd1&gt;</symbol>
<account encodedin="Zd">
<docvars>
<docvar key="ldstruct-regcount" value="to-2reg" />
</docvars>
<intro>
<para>For the two registers variant: is the name of the first destination scalable vector register of a multi-vector sequence, encoded as "Zd" times 2.</para>
</intro>
</account>
</explanation>
<explanation enclist="frintn_mz_z_4" symboldefcount="2">
<symbol link="sa_zd1_1">&lt;Zd1&gt;</symbol>
<account encodedin="Zd">
<docvars>
<docvar key="ldstruct-regcount" value="to-4reg" />
</docvars>
<intro>
<para>For the four registers variant: is the name of the first destination scalable vector register of a multi-vector sequence, encoded as "Zd" times 4.</para>
</intro>
</account>
</explanation>
<explanation enclist="frintn_mz_z_4" symboldefcount="1">
<symbol link="sa_zd4">&lt;Zd4&gt;</symbol>
<account encodedin="Zd">
<intro>
<para>Is the name of the fourth destination scalable vector register of a multi-vector sequence, encoded as "Zd" times 4 plus 3.</para>
</intro>
</account>
</explanation>
<explanation enclist="frintn_mz_z_2" symboldefcount="1">
<symbol link="sa_zd2">&lt;Zd2&gt;</symbol>
<account encodedin="Zd">
<intro>
<para>Is the name of the second destination scalable vector register of a multi-vector sequence, encoded as "Zd" times 2 plus 1.</para>
</intro>
</account>
</explanation>
<explanation enclist="frintn_mz_z_2" symboldefcount="1">
<symbol link="sa_zn1">&lt;Zn1&gt;</symbol>
<account encodedin="Zn">
<docvars>
<docvar key="ldstruct-regcount" value="to-2reg" />
</docvars>
<intro>
<para>For the two registers variant: is the name of the first scalable vector register of a multi-vector sequence, encoded as "Zn" times 2.</para>
</intro>
</account>
</explanation>
<explanation enclist="frintn_mz_z_4" symboldefcount="2">
<symbol link="sa_zn1_1">&lt;Zn1&gt;</symbol>
<account encodedin="Zn">
<docvars>
<docvar key="ldstruct-regcount" value="to-4reg" />
</docvars>
<intro>
<para>For the four registers variant: is the name of the first scalable vector register of a multi-vector sequence, encoded as "Zn" times 4.</para>
</intro>
</account>
</explanation>
<explanation enclist="frintn_mz_z_4" symboldefcount="1">
<symbol link="sa_zn4">&lt;Zn4&gt;</symbol>
<account encodedin="Zn">
<intro>
<para>Is the name of the fourth scalable vector register of a multi-vector sequence, encoded as "Zn" times 4 plus 3.</para>
</intro>
</account>
</explanation>
<explanation enclist="frintn_mz_z_2" symboldefcount="1">
<symbol link="sa_zn2">&lt;Zn2&gt;</symbol>
<account encodedin="Zn">
<intro>
<para>Is the name of the second scalable vector register of a multi-vector sequence, encoded as "Zn" times 2 plus 1.</para>
</intro>
</account>
</explanation>
</explanations>
<ps_section howmany="1">
<ps name="FRINTN-MZ.Z-2" mylink="execute" enclabels="" sections="1" secttype="Operation">
<pstext mayhavelinks="1" section="Execute" rep_section="execute"><a link="impl-aarch64.CheckStreamingSVEEnabled.0" file="shared_pseudocode.xml" hover="function: CheckStreamingSVEEnabled()">CheckStreamingSVEEnabled</a>();
constant integer VL = <a link="impl-aarch64.CurrentVL.read.none" file="shared_pseudocode.xml" hover="accessor: integer CurrentVL">CurrentVL</a>;
constant integer elements = VL DIV 32;
array [0..3] of bits(VL) results;
for r = 0 to nreg-1
bits(VL) operand = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[n+r, VL];
for e = 0 to elements-1
bits(32) element = <a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[operand, e, 32];
<a link="impl-shared.Elem.write.3" file="shared_pseudocode.xml" hover="accessor: Elem[bits(N) &amp;vector, integer e, integer size] = bits(size) value">Elem</a>[results[r], e, 32] = <a link="impl-shared.FPRoundInt.4" file="shared_pseudocode.xml" hover="function: bits(N) FPRoundInt(bits(N) op, FPCRType fpcr, FPRounding rounding, boolean exact)">FPRoundInt</a>(element, FPCR[], rounding, exact);
for r = 0 to nreg-1
<a link="impl-aarch64.Z.write.2" file="shared_pseudocode.xml" hover="accessor: Z[integer n, integer width] = bits(width) value">Z</a>[d+r, VL] = results[r];</pstext>
</ps>
</ps_section>
</instructionsection>