archived-ballistic/spec/arm64_xml/ic_sys.xml

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<instructionsection id="IC_SYS" title="IC -- A64" type="alias">
  <docvars>
    <docvar key="alias_mnemonic" value="IC" />
    <docvar key="instr-class" value="system" />
    <docvar key="isa" value="A64" />
    <docvar key="mnemonic" value="SYS" />
  </docvars>
  <heading>IC</heading>
  <desc>
    <brief>
      <para>Instruction Cache operation</para>
    </brief>
    <authored>
      <para>Instruction Cache operation. For more information, see <xref linkend="BABEJJJE">op0==0b01, cache maintenance, TLB maintenance, and address translation instructions</xref>.</para>
    </authored>
  </desc>
  <aliasto refiform="sys.xml" iformid="SYS">SYS</aliasto>
  <classes>
    <iclass name="System" oneof="1" id="iclass_system" no_encodings="1" isa="A64">
      <docvars>
        <docvar key="instr-class" value="system" />
        <docvar key="isa" value="A64" />
        <docvar key="mnemonic" value="SYS" />
      </docvars>
      <iclassintro count="1"></iclassintro>
      <regdiagram form="32" psname="aarch64/instrs/system/sysops" tworows="1">
        <box hibit="31" width="10" settings="10">
          <c>1</c>
          <c>1</c>
          <c>0</c>
          <c>1</c>
          <c>0</c>
          <c>1</c>
          <c>0</c>
          <c>1</c>
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="21" name="L" usename="1" settings="1" psbits="x">
          <c>0</c>
        </box>
        <box hibit="20" width="2" name="op0" settings="2">
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="18" width="3" name="op1" usename="1">
          <c colspan="3"></c>
        </box>
        <box hibit="15" width="4" name="CRn" usename="1" settings="4" psbits="xxxx">
          <c>0</c>
          <c>1</c>
          <c>1</c>
          <c>1</c>
        </box>
        <box hibit="11" width="4" name="CRm" usename="1">
          <c colspan="4"></c>
        </box>
        <box hibit="7" width="3" name="op2" usename="1">
          <c colspan="3"></c>
        </box>
        <box hibit="4" width="5" name="Rt" usename="1">
          <c colspan="5"></c>
        </box>
      </regdiagram>
      <encoding name="IC_SYS_CR_systeminstrs" oneofinclass="1" oneof="1" label="">
        <docvars>
          <docvar key="alias_mnemonic" value="IC" />
          <docvar key="instr-class" value="system" />
          <docvar key="isa" value="A64" />
          <docvar key="mnemonic" value="SYS" />
        </docvars>
        <asmtemplate><text>IC  </text><a link="sa_ic_op" hover="IC instruction name, as listed for IC system instruction pages (field &quot;op1:CRm:op2&quot;) [IALLU,IALLUIS,IVAU]">&lt;ic_op&gt;</a><text>{</text><text>, </text><a link="sa_xt" hover="64-bit optional general-purpose source register, default '11111' (field &quot;Rt&quot;)">&lt;Xt&gt;</a><text>}</text></asmtemplate>
        <equivalent_to>
          <asmtemplate><a href="sys.xml#SYS_CR_systeminstrs">SYS</a><text> #</text><a link="sa_op1" hover="3-bit unsigned immediate [0-7] (field &quot;op1&quot;)">&lt;op1&gt;</a><text>, C7, </text><a link="sa_cm" hover="Name 'Cm', with 'm' [0-15] (field &quot;CRm&quot;)">&lt;Cm&gt;</a><text>, #</text><a link="sa_op2" hover="3-bit unsigned immediate [0-7] (field &quot;op2&quot;)">&lt;op2&gt;</a><text>{</text><text>, </text><a link="sa_xt" hover="64-bit optional general-purpose source register, default '11111' (field &quot;Rt&quot;)">&lt;Xt&gt;</a><text>}</text></asmtemplate>
          <aliascond><a link="impl-aarch64.SysOp.4" file="shared_pseudocode.xml" hover="function: SystemOp SysOp(bits(3) op1, bits(4) CRn, bits(4) CRm, bits(3) op2)">SysOp</a>(op1,'0111',CRm,op2) == <a link="Sys_IC" file="shared_pseudocode.xml" hover="enumeration SystemOp {Sys_AT, Sys_BRB, Sys_DC, Sys_IC, Sys_TLBI, Sys_SYS}">Sys_IC</a></aliascond>
        </equivalent_to>
      </encoding>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="IC_SYS_CR_systeminstrs" symboldefcount="1">
      <symbol link="sa_ic_op">&lt;ic_op&gt;</symbol>
      <definition encodedin="op1:CRm:op2">
        <intro>Is an IC instruction name, as listed for the IC system instruction pages, </intro>
        <table class="valuetable">
          <tgroup cols="4">
            <thead>
              <row>
                <entry class="bitfield">op1</entry>
                <entry class="bitfield">CRm</entry>
                <entry class="bitfield">op2</entry>
                <entry class="symbol">&lt;ic_op&gt;</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">0001</entry>
                <entry class="bitfield">000</entry>
                <entry class="symbol">IALLUIS</entry>
              </row>
              <row>
                <entry class="bitfield">000</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">000</entry>
                <entry class="symbol">IALLU</entry>
              </row>
              <row>
                <entry class="bitfield">011</entry>
                <entry class="bitfield">0101</entry>
                <entry class="bitfield">001</entry>
                <entry class="symbol">IVAU</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </definition>
    </explanation>
    <explanation enclist="IC_SYS_CR_systeminstrs" symboldefcount="1">
      <symbol link="sa_op1">&lt;op1&gt;</symbol>
      <account encodedin="op1">
        <intro>
          <para>Is a 3-bit unsigned immediate, in the range 0 to 7, encoded in the "op1" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="IC_SYS_CR_systeminstrs" symboldefcount="1">
      <symbol link="sa_cm">&lt;Cm&gt;</symbol>
      <account encodedin="CRm">
        <intro>
          <para>Is a name 'Cm', with 'm' in the range 0 to 15, encoded in the "CRm" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="IC_SYS_CR_systeminstrs" symboldefcount="1">
      <symbol link="sa_op2">&lt;op2&gt;</symbol>
      <account encodedin="op2">
        <intro>
          <para>Is a 3-bit unsigned immediate, in the range 0 to 7, encoded in the "op2" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="IC_SYS_CR_systeminstrs" symboldefcount="1">
      <symbol link="sa_xt">&lt;Xt&gt;</symbol>
      <account encodedin="Rt">
        <intro>
          <para>Is the 64-bit name of the optional general-purpose source register, defaulting to '11111', encoded in the "Rt" field.</para>
        </intro>
      </account>
    </explanation>
  </explanations>
</instructionsection>