mirror of
https://github.com/pound-emu/ballistic.git
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158 lines
8.1 KiB
XML
158 lines
8.1 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
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<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<instructionsection id="IRG" title="IRG -- A64" type="instruction">
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<docvars>
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="IRG" />
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</docvars>
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<heading>IRG</heading>
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<desc>
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<brief>
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<para>Insert Random Tag</para>
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</brief>
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<authored>
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<para>Insert Random Tag inserts a random Logical Address Tag into the address in the first source register, and writes the result to the destination register. Any tags specified in the optional second source register or in GCR_EL1.Exclude are excluded from the selection of the random Logical Address Tag.</para>
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</authored>
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</desc>
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<alias_list howmany="0"></alias_list>
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<classes>
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<iclass name="Integer" oneof="1" id="iclass_general" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="IRG" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<arch_variants>
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<arch_variant name="ARMv8.5" feature="FEAT_MTE" />
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</arch_variants>
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<regdiagram form="32" psname="aarch64/instrs/integer/tags/mcinsertrandomtag">
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<box hibit="31" name="sf" settings="1">
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<c>1</c>
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</box>
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<box hibit="30" settings="1">
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<c>0</c>
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</box>
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<box hibit="29" name="S" settings="1">
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<c>0</c>
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</box>
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<box hibit="28" width="8" settings="8">
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="20" width="5" name="Xm" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="15" name="opcode<5>" settings="1">
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<c>0</c>
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</box>
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<box hibit="14" name="opcode<4>" settings="1">
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<c>0</c>
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</box>
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<box hibit="13" name="opcode<3>" settings="1">
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<c>0</c>
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</box>
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<box hibit="12" name="opcode<2>" settings="1">
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<c>1</c>
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</box>
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<box hibit="11" name="opcode<1>" settings="1">
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<c>0</c>
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</box>
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<box hibit="10" name="opcode<0>" settings="1">
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<c>0</c>
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</box>
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<box hibit="9" width="5" name="Xn" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="4" width="5" name="Xd" usename="1">
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<c colspan="5"></c>
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</box>
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</regdiagram>
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<encoding name="IRG_64I_dp_2src" oneofinclass="1" oneof="1" label="">
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<docvars>
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="IRG" />
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</docvars>
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<asmtemplate><text>IRG </text><a link="sa_xd_sp" hover="64-bit destination general-purpose register or SP (field "Xd")"><Xd|SP></a><text>, </text><a link="sa_xn_sp" hover="First 64-bit source general-purpose register or SP (field "Xn")"><Xn|SP></a><text>{</text><text>, </text><a link="sa_xm" hover="Second 64-bit general-purpose source register (field "Xm")"><Xm></a><text>}</text></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="aarch64/instrs/integer/tags/mcinsertrandomtag" mylink="aarch64.instrs.integer.tags.mcinsertrandomtag" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-shared.HaveMTEExt.0" file="shared_pseudocode.xml" hover="function: boolean HaveMTEExt()">HaveMTEExt</a>() then UNDEFINED;
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integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Xd);
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integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Xn);
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integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Xm);</pstext>
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</ps>
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</ps_section>
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</iclass>
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</classes>
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<explanations scope="all">
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<explanation enclist="IRG_64I_dp_2src" symboldefcount="1">
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<symbol link="sa_xd_sp"><Xd|SP></symbol>
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<account encodedin="Xd">
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<intro>
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<para>Is the 64-bit name of the destination general-purpose register or stack pointer, encoded in the "Xd" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="IRG_64I_dp_2src" symboldefcount="1">
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<symbol link="sa_xn_sp"><Xn|SP></symbol>
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<account encodedin="Xn">
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<intro>
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<para>Is the 64-bit name of the first source general-purpose register or stack pointer, encoded in the "Xn" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="IRG_64I_dp_2src" symboldefcount="1">
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<symbol link="sa_xm"><Xm></symbol>
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<account encodedin="Xm">
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<intro>
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<para>Is the 64-bit name of the second general-purpose source register, encoded in the "Xm" field. Defaults to XZR if absent.</para>
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</intro>
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</account>
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</explanation>
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</explanations>
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<ps_section howmany="1">
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<ps name="aarch64/instrs/integer/tags/mcinsertrandomtag" mylink="execute" enclabels="" sections="1" secttype="Operation">
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<pstext mayhavelinks="1" section="Execute" rep_section="execute">bits(64) operand = if n == 31 then <a link="impl-aarch64.SP.read.0" file="shared_pseudocode.xml" hover="accessor: bits(64) SP[]">SP</a>[] else <a link="impl-aarch64.X.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) X[integer n, integer width]">X</a>[n, 64];
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bits(64) exclude_reg = <a link="impl-aarch64.X.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) X[integer n, integer width]">X</a>[m, 64];
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bits(16) exclude = exclude_reg<15:0> OR GCR_EL1.Exclude;
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bits(4) rtag;
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if <a link="AArch64.AllocationTagAccessIsEnabled.1" file="shared_pseudocode.xml" hover="function: boolean AArch64.AllocationTagAccessIsEnabled(bits(2) el)">AArch64.AllocationTagAccessIsEnabled</a>(PSTATE.EL) then
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if GCR_EL1.RRND == '1' then
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if <a link="impl-shared.IsOnes.1" file="shared_pseudocode.xml" hover="function: boolean IsOnes(bits(N) x)">IsOnes</a>(exclude) then
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rtag = '0000';
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else
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rtag = <a link="impl-aarch64.ChooseRandomNonExcludedTag.1" file="shared_pseudocode.xml" hover="function: bits(4) ChooseRandomNonExcludedTag(bits(16) exclude_in)">ChooseRandomNonExcludedTag</a>(exclude);
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else
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bits(4) start = RGSR_EL1.TAG;
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bits(4) offset = <a link="AArch64.RandomTag.0" file="shared_pseudocode.xml" hover="function: bits(4) AArch64.RandomTag()">AArch64.RandomTag</a>();
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rtag = <a link="AArch64.ChooseNonExcludedTag.3" file="shared_pseudocode.xml" hover="function: bits(4) AArch64.ChooseNonExcludedTag(bits(4) tag_in, bits(4) offset_in, bits(16) exclude)">AArch64.ChooseNonExcludedTag</a>(start, offset, exclude);
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RGSR_EL1.TAG = rtag;
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else
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rtag = '0000';
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bits(64) result = <a link="AArch64.AddressWithAllocationTag.2" file="shared_pseudocode.xml" hover="function: bits(64) AArch64.AddressWithAllocationTag(bits(64) address, bits(4) allocation_tag)">AArch64.AddressWithAllocationTag</a>(operand, rtag);
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if d == 31 then
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<a link="impl-aarch64.SP.write.0" file="shared_pseudocode.xml" hover="accessor: SP[] = bits(64) value">SP</a>[] = result;
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else
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<a link="impl-aarch64.X.write.2" file="shared_pseudocode.xml" hover="accessor: X[integer n, integer width] = bits(width) value">X</a>[d, 64] = result;</pstext>
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</ps>
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</ps_section>
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</instructionsection>
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