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https://github.com/pound-emu/ballistic.git
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207 lines
12 KiB
XML
207 lines
12 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
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<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<instructionsection id="movprfx_z_p_z" title="MOVPRFX (predicated)" type="instruction">
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<docvars>
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<docvar key="instr-class" value="sve" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="MOVPRFX" />
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</docvars>
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<heading>MOVPRFX (predicated)</heading>
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<desc>
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<brief>Move prefix (predicated)</brief>
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<description>
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<para>The predicated <instruction>MOVPRFX</instruction> instruction is a hint to hardware that the instruction may be combined with the destructive instruction which follows it in program order to create a single constructive operation. Since it is a hint it is also permitted to be implemented as a discrete vector copy, and the result of executing the pair of instructions with or without combining is identical. The choice of combined versus discrete operation may vary dynamically.</para>
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<para>Unless the combination of a constructive operation with merging predication is specifically required, it is strongly recommended that for performance reasons software should prefer to use the zeroing form of predicated <instruction>MOVPRFX</instruction> or the unpredicated <instruction>MOVPRFX</instruction> instruction.</para>
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<para>Although the operation of the instruction is defined as a simple predicated vector copy, it is required that the prefixed instruction at PC+4 must be an SVE destructive binary or ternary instruction encoding, or a unary operation with merging predication, but excluding other <instruction>MOVPRFX</instruction> instructions. The prefixed instruction must specify the same predicate register, and have the same maximum element size (ignoring a fixed 64-bit "wide vector" operand), and the same destination vector as the <instruction>MOVPRFX</instruction> instruction. The prefixed instruction must not use the destination register in any other operand position, even if they have different names but refer to the same architectural register state. Any other use is UNPREDICTABLE.</para>
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</description>
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<status>Green</status>
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<predicated>True</predicated>
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<uses_dit condition="FEAT_SVE2 is implemented or FEAT_SME is implemented">True</uses_dit>
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</desc>
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<alias_list howmany="0"></alias_list>
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<classes>
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<iclass name="SVE" oneof="1" id="iclass_sve" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="instr-class" value="sve" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="MOVPRFX" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<regdiagram form="32" psname="MOVPRFX-Z.P.Z-_">
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<box hibit="31" width="8" settings="8">
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="23" width="2" name="size" usename="1">
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<c colspan="2"></c>
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</box>
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<box hibit="21" width="3" settings="3">
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<c>0</c>
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="18" name="opc<1>" settings="1">
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<c>0</c>
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</box>
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<box hibit="17" name="opc<0>" settings="1">
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<c>0</c>
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</box>
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<box hibit="16" name="M" usename="1">
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<c></c>
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</box>
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<box hibit="15" width="3" settings="3">
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<c>0</c>
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<c>0</c>
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<c>1</c>
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</box>
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<box hibit="12" width="3" name="Pg" usename="1">
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<c colspan="3"></c>
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</box>
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<box hibit="9" width="5" name="Zn" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="4" width="5" name="Zd" usename="1">
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<c colspan="5"></c>
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</box>
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</regdiagram>
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<encoding name="movprfx_z_p_z_" oneofinclass="1" oneof="1" label="">
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<docvars>
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<docvar key="instr-class" value="sve" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="MOVPRFX" />
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</docvars>
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<asmtemplate><text>MOVPRFX </text><a link="sa_zd" hover="Destination scalable vector register (field "Zd")"><Zd></a><text>.</text><a link="sa_t" hover="Size specifier (field "size") [B,D,H,S]"><T></a><text>, </text><a link="sa_pg" hover="Governing scalable predicate register P0-P7 (field "Pg")"><Pg></a><text>/</text><a link="sa_zm" hover="Predication qualifier (field "M") [M,Z]"><ZM></a><text>, </text><a link="sa_zn" hover="Source scalable vector register (field "Zn")"><Zn></a><text>.</text><a link="sa_t" hover="Size specifier (field "size") [B,D,H,S]"><T></a></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="MOVPRFX-Z.P.Z-_" mylink="MOVPRFX-Z.P.Z-_" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSVE.0" file="shared_pseudocode.xml" hover="function: boolean HaveSVE()">HaveSVE</a>() && !<a link="impl-aarch64.HaveSME.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME()">HaveSME</a>() then UNDEFINED;
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constant integer esize = 8 << <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(size);
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integer g = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Pg);
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integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zn);
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integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zd);
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boolean merging = (M == '1');</pstext>
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</ps>
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</ps_section>
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</iclass>
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</classes>
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<explanations scope="all">
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<explanation enclist="movprfx_z_p_z_" symboldefcount="1">
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<symbol link="sa_zd"><Zd></symbol>
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<account encodedin="Zd">
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<intro>
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<para>Is the name of the destination scalable vector register, encoded in the "Zd" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="movprfx_z_p_z_" symboldefcount="1">
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<symbol link="sa_t"><T></symbol>
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<definition encodedin="size">
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<intro>Is the size specifier, </intro>
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<table class="valuetable">
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<tgroup cols="2">
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<thead>
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<row>
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<entry class="bitfield">size</entry>
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<entry class="symbol"><T></entry>
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</row>
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</thead>
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<tbody>
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<row>
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<entry class="bitfield">00</entry>
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<entry class="symbol">B</entry>
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</row>
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<row>
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<entry class="bitfield">01</entry>
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<entry class="symbol">H</entry>
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</row>
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<row>
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<entry class="bitfield">10</entry>
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<entry class="symbol">S</entry>
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</row>
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<row>
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<entry class="bitfield">11</entry>
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<entry class="symbol">D</entry>
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</row>
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</tbody>
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</tgroup>
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</table>
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</definition>
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</explanation>
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<explanation enclist="movprfx_z_p_z_" symboldefcount="1">
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<symbol link="sa_pg"><Pg></symbol>
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<account encodedin="Pg">
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<intro>
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<para>Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="movprfx_z_p_z_" symboldefcount="1">
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<symbol link="sa_zm"><ZM></symbol>
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<definition encodedin="M">
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<intro>Is the predication qualifier, </intro>
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<table class="valuetable">
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<tgroup cols="2">
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<thead>
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<row>
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<entry class="bitfield">M</entry>
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<entry class="symbol"><ZM></entry>
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</row>
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</thead>
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<tbody>
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<row>
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<entry class="bitfield">0</entry>
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<entry class="symbol">Z</entry>
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</row>
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<row>
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<entry class="bitfield">1</entry>
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<entry class="symbol">M</entry>
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</row>
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</tbody>
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</tgroup>
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</table>
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</definition>
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</explanation>
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<explanation enclist="movprfx_z_p_z_" symboldefcount="1">
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<symbol link="sa_zn"><Zn></symbol>
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<account encodedin="Zn">
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<intro>
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<para>Is the name of the source scalable vector register, encoded in the "Zn" field.</para>
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</intro>
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</account>
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</explanation>
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</explanations>
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<ps_section howmany="1">
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<ps name="MOVPRFX-Z.P.Z-_" mylink="execute" enclabels="" sections="1" secttype="Operation">
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<pstext mayhavelinks="1" section="Execute" rep_section="execute"><a link="impl-aarch64.CheckSVEEnabled.0" file="shared_pseudocode.xml" hover="function: CheckSVEEnabled()">CheckSVEEnabled</a>();
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constant integer VL = <a link="impl-aarch64.CurrentVL.read.none" file="shared_pseudocode.xml" hover="accessor: integer CurrentVL">CurrentVL</a>;
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constant integer PL = VL DIV 8;
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constant integer elements = VL DIV esize;
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bits(PL) mask = <a link="impl-aarch64.P.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) P[integer n, integer width]">P</a>[g, PL];
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bits(VL) operand1 = if <a link="impl-aarch64.AnyActiveElement.2" file="shared_pseudocode.xml" hover="function: boolean AnyActiveElement(bits(N) mask, integer esize)">AnyActiveElement</a>(mask, esize) then <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[n, VL] else <a link="impl-shared.Zeros.1" file="shared_pseudocode.xml" hover="function: bits(N) Zeros(integer N)">Zeros</a>(VL);
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bits(VL) dest = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[d, VL];
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bits(VL) result;
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for e = 0 to elements-1
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if <a link="impl-aarch64.ActivePredicateElement.3" file="shared_pseudocode.xml" hover="function: boolean ActivePredicateElement(bits(N) pred, integer e, integer esize)">ActivePredicateElement</a>(mask, e, esize) then
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bits(esize) element = <a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[operand1, e, esize];
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<a link="impl-shared.Elem.write.3" file="shared_pseudocode.xml" hover="accessor: Elem[bits(N) &vector, integer e, integer size] = bits(size) value">Elem</a>[result, e, esize] = element;
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elsif merging then
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<a link="impl-shared.Elem.write.3" file="shared_pseudocode.xml" hover="accessor: Elem[bits(N) &vector, integer e, integer size] = bits(size) value">Elem</a>[result, e, esize] = <a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[dest, e, esize];
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else
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<a link="impl-shared.Elem.write.3" file="shared_pseudocode.xml" hover="accessor: Elem[bits(N) &vector, integer e, integer size] = bits(size) value">Elem</a>[result, e, esize] = <a link="impl-shared.Zeros.1" file="shared_pseudocode.xml" hover="function: bits(N) Zeros(integer N)">Zeros</a>(esize);
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<a link="impl-aarch64.Z.write.2" file="shared_pseudocode.xml" hover="accessor: Z[integer n, integer width] = bits(width) value">Z</a>[d, VL] = result;</pstext>
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</ps>
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</ps_section>
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</instructionsection>
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