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https://github.com/pound-emu/ballistic.git
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217 lines
11 KiB
XML
217 lines
11 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
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<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<instructionsection id="psel_p_ppi" title="PSEL" type="instruction">
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<docvars>
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<docvar key="instr-class" value="sve2" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="PSEL" />
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</docvars>
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<heading>PSEL</heading>
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<desc>
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<brief>Predicate select between predicate register or all-false</brief>
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<description>
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<para>If the indexed element of the second source predicate is true, place the contents of the first source predicate register into the destination predicate register, otherwise set the destination predicate to all-false. The indexed element is determined by the sum of a general-purpose index register and an immediate, modulo the number of elements. Does not set the condition flags.</para>
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<para>For programmer convenience, an assembler must also accept predicate-as-counter register names for the destination predicate register and the first source predicate register.</para>
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</description>
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<status>Green</status>
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<predicated>False</predicated>
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<uses_dit condition="FEAT_SVE2 is implemented or FEAT_SME is implemented">True</uses_dit>
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</desc>
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<alias_list howmany="0"></alias_list>
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<classes>
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<iclass name="SVE2" oneof="1" id="iclass_sve2" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="instr-class" value="sve2" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="PSEL" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<arch_variants>
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<arch_variant name="FEAT_SVE2p1" feature="FEAT_SVE2p1" />
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</arch_variants>
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<regdiagram form="32" psname="PSEL-P.PPi-_" tworows="1">
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<box hibit="31" width="8" settings="8">
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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</box>
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<box hibit="23" name="i1" usename="1">
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<c></c>
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</box>
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<box hibit="22" name="tszh" usename="1">
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<c></c>
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</box>
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<box hibit="21" settings="1">
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<c>1</c>
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</box>
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<box hibit="20" width="3" name="tszl" usename="1">
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<c colspan="3"></c>
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</box>
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<box hibit="17" width="2" name="Rv" usename="1">
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<c colspan="2"></c>
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</box>
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<box hibit="15" width="2" settings="2">
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<c>0</c>
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<c>1</c>
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</box>
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<box hibit="13" width="4" name="Pn" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="9" name="S" usename="1" settings="1">
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<c>0</c>
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</box>
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<box hibit="8" width="4" name="Pm" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="4" settings="1">
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<c>0</c>
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</box>
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<box hibit="3" width="4" name="Pd" usename="1">
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<c colspan="4"></c>
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</box>
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</regdiagram>
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<encoding name="psel_p_ppi_" oneofinclass="1" oneof="1" label="">
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<docvars>
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<docvar key="instr-class" value="sve2" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="PSEL" />
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</docvars>
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<asmtemplate><text>PSEL </text><a link="sa_pd" hover="Destination scalable predicate register (field "Pd")"><Pd></a><text>, </text><a link="sa_pn" hover="First source scalable predicate register (field "Pn")"><Pn></a><text>, </text><a link="sa_pm" hover="Second source scalable predicate register (field "Pm")"><Pm></a><text>.</text><a link="sa_t" hover="Size specifier (field "tszh:tszl") [B,D,H,S]"><T></a><text>[</text><a link="sa_wv" hover="32-bit vector select register W12-W15 (field "Rv")"><Wv></a><text>, </text><a link="sa_imm" hover="Element index [0-one less than the vector elements in a 128-bit vector register number] (field "i1:tszh:tszl")"><imm></a><text>]</text></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="PSEL-P.PPi-_" mylink="PSEL-P.PPi-_" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSME.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME()">HaveSME</a>() && !<a link="impl-aarch64.HaveSVE2p1.0" file="shared_pseudocode.xml" hover="function: boolean HaveSVE2p1()">HaveSVE2p1</a>() then UNDEFINED;
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bits(5) imm5 = i1:tszh:tszl;
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integer esize;
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integer imm;
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case tszh:tszl of
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when '0000' UNDEFINED;
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when '1000' esize = 64; imm = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(imm5<4>);
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when 'x100' esize = 32; imm = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(imm5<4:3>);
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when 'xx10' esize = 16; imm = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(imm5<4:2>);
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when 'xxx1' esize = 8; imm = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(imm5<4:1>);
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integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Pn);
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integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Pm);
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integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Pd);
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integer v = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>('011':Rv);</pstext>
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</ps>
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</ps_section>
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</iclass>
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</classes>
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<explanations scope="all">
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<explanation enclist="psel_p_ppi_" symboldefcount="1">
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<symbol link="sa_pd"><Pd></symbol>
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<account encodedin="Pd">
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<intro>
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<para>Is the name of the destination scalable predicate register, encoded in the "Pd" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="psel_p_ppi_" symboldefcount="1">
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<symbol link="sa_pn"><Pn></symbol>
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<account encodedin="Pn">
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<intro>
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<para>Is the name of the first source scalable predicate register, encoded in the "Pn" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="psel_p_ppi_" symboldefcount="1">
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<symbol link="sa_pm"><Pm></symbol>
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<account encodedin="Pm">
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<intro>
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<para>Is the name of the second source scalable predicate register, encoded in the "Pm" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="psel_p_ppi_" symboldefcount="1">
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<symbol link="sa_t"><T></symbol>
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<definition encodedin="tszh:tszl">
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<intro>Is the size specifier, </intro>
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<table class="valuetable">
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<tgroup cols="3">
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<thead>
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<row>
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<entry class="bitfield">tszh</entry>
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<entry class="bitfield">tszl</entry>
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<entry class="symbol"><T></entry>
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</row>
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</thead>
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<tbody>
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<row>
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<entry class="bitfield">0</entry>
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<entry class="bitfield">000</entry>
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<entry class="symbol">RESERVED</entry>
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</row>
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<row>
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<entry class="bitfield">x</entry>
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<entry class="bitfield">xx1</entry>
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<entry class="symbol">B</entry>
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</row>
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<row>
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<entry class="bitfield">x</entry>
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<entry class="bitfield">x10</entry>
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<entry class="symbol">H</entry>
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</row>
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<row>
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<entry class="bitfield">x</entry>
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<entry class="bitfield">100</entry>
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<entry class="symbol">S</entry>
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</row>
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<row>
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<entry class="bitfield">1</entry>
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<entry class="bitfield">000</entry>
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<entry class="symbol">D</entry>
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</row>
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</tbody>
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</tgroup>
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</table>
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</definition>
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</explanation>
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<explanation enclist="psel_p_ppi_" symboldefcount="1">
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<symbol link="sa_wv"><Wv></symbol>
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<account encodedin="Rv">
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<intro>
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<para>Is the 32-bit name of the vector select register W12-W15, encoded in the "Rv" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="psel_p_ppi_" symboldefcount="1">
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<symbol link="sa_imm"><imm></symbol>
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<account encodedin="i1:tszh:tszl">
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<intro>
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<para>Is the element index, in the range 0 to one less than the number of vector elements in a 128-bit vector register, encoded in "i1:tszh:tszl".</para>
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</intro>
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</account>
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</explanation>
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</explanations>
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<ps_section howmany="1">
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<ps name="PSEL-P.PPi-_" mylink="execute" enclabels="" sections="1" secttype="Operation">
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<pstext mayhavelinks="1" section="Execute" rep_section="execute"><a link="impl-aarch64.CheckSVEEnabled.0" file="shared_pseudocode.xml" hover="function: CheckSVEEnabled()">CheckSVEEnabled</a>();
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constant integer VL = <a link="impl-aarch64.CurrentVL.read.none" file="shared_pseudocode.xml" hover="accessor: integer CurrentVL">CurrentVL</a>;
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constant integer PL = VL DIV 8;
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constant integer elements = VL DIV esize;
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bits(PL) operand1 = <a link="impl-aarch64.P.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) P[integer n, integer width]">P</a>[n, PL];
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bits(PL) operand2 = <a link="impl-aarch64.P.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) P[integer n, integer width]">P</a>[m, PL];
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bits(32) idx = <a link="impl-aarch64.X.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) X[integer n, integer width]">X</a>[v, 32];
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integer element = (<a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(idx) + imm) MOD elements;
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bits(PL) result;
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if <a link="impl-aarch64.ActivePredicateElement.3" file="shared_pseudocode.xml" hover="function: boolean ActivePredicateElement(bits(N) pred, integer e, integer esize)">ActivePredicateElement</a>(operand2, element, esize) then
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result = operand1;
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else
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result = <a link="impl-shared.Zeros.1" file="shared_pseudocode.xml" hover="function: bits(N) Zeros(integer N)">Zeros</a>(PL);
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<a link="impl-aarch64.P.write.2" file="shared_pseudocode.xml" hover="accessor: P[integer n, integer width] = bits(width) value">P</a>[d, PL] = result;</pstext>
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</ps>
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</ps_section>
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</instructionsection>
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