mirror of
https://github.com/pound-emu/ballistic.git
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141 lines
6.4 KiB
XML
141 lines
6.4 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
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<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<instructionsection id="SETF" title="SETF8, SETF16 -- A64" type="instruction">
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<docvars>
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A64" />
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</docvars>
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<heading>SETF8, SETF16</heading>
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<desc>
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<brief>
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<para>Evaluation of 8 or 16 bit flag values</para>
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</brief>
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<authored>
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<para>Set the PSTATE.NZV flags based on the value in the specified general-purpose register. <instruction>SETF8</instruction> treats the value as an 8 bit value, and <instruction>SETF16</instruction> treats the value as an 16 bit value.</para>
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<para>The PSTATE.C flag is not affected by these instructions.</para>
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</authored>
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</desc>
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<operationalnotes>
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<para>If PSTATE.DIT is 1:</para>
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<list type="unordered">
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<listitem><content>The execution time of this instruction is independent of:<list type="unordered"><listitem><content>The values of the data supplied in any of its registers.</content></listitem><listitem><content>The values of the NZCV flags.</content></listitem></list></content></listitem>
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<listitem><content>The response of this instruction to asynchronous exceptions does not vary based on:<list type="unordered"><listitem><content>The values of the data supplied in any of its registers.</content></listitem><listitem><content>The values of the NZCV flags.</content></listitem></list></content></listitem>
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</list>
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</operationalnotes>
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<alias_list howmany="0"></alias_list>
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<classes>
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<iclass name="Integer" oneof="1" id="iclass_general" no_encodings="2" isa="A64">
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<docvars>
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A64" />
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</docvars>
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<iclassintro count="2"></iclassintro>
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<arch_variants>
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<arch_variant name="ARMv8.4" feature="FEAT_FlagM" />
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</arch_variants>
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<regdiagram form="32" psname="aarch64/instrs/integer/flags/setf" tworows="1">
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<box hibit="31" name="sf" usename="1" settings="1" psbits="x">
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<c>0</c>
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</box>
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<box hibit="30" name="op" settings="1">
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<c>0</c>
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</box>
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<box hibit="29" name="S" settings="1">
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<c>1</c>
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</box>
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<box hibit="28" width="8" settings="8">
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="20" width="6" name="opcode2" settings="6">
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="14" name="sz" usename="1">
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<c></c>
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</box>
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<box hibit="13" width="4" settings="4">
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="9" width="5" name="Rn" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="4" name="o3" settings="1">
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<c>0</c>
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</box>
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<box hibit="3" width="4" name="mask" settings="4">
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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</box>
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</regdiagram>
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<encoding name="SETF8_only_setf" oneofinclass="2" oneof="2" label="SETF8" bitdiffs="sz == 0">
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<docvars>
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="SETF8" />
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</docvars>
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<box hibit="14" width="1" name="sz">
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<c>0</c>
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</box>
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<asmtemplate><text>SETF8 </text><a link="sa_wn" hover="32-bit general-purpose source register (field "Rn")"><Wn></a></asmtemplate>
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</encoding>
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<encoding name="SETF16_only_setf" oneofinclass="2" oneof="2" label="SETF16" bitdiffs="sz == 1">
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<docvars>
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="SETF16" />
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</docvars>
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<box hibit="14" width="1" name="sz">
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<c>1</c>
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</box>
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<asmtemplate><text>SETF16 </text><a link="sa_wn" hover="32-bit general-purpose source register (field "Rn")"><Wn></a></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="aarch64/instrs/integer/flags/setf" mylink="aarch64.instrs.integer.flags.setf" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-shared.HaveFlagManipulateExt.0" file="shared_pseudocode.xml" hover="function: boolean HaveFlagManipulateExt()">HaveFlagManipulateExt</a>() || sf != '0' then UNDEFINED;
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integer msb = if sz=='1' then 15 else 7;
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integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rn);</pstext>
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</ps>
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</ps_section>
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</iclass>
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</classes>
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<explanations scope="all">
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<explanation enclist="SETF8_only_setf, SETF16_only_setf" symboldefcount="1">
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<symbol link="sa_wn"><Wn></symbol>
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<account encodedin="Rn">
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<intro>
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<para>Is the 32-bit name of the general-purpose source register, encoded in the "Rn" field.</para>
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</intro>
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</account>
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</explanation>
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</explanations>
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<ps_section howmany="1">
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<ps name="aarch64/instrs/integer/flags/setf" mylink="execute" enclabels="" sections="1" secttype="Operation">
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<pstext mayhavelinks="1" section="Execute" rep_section="execute">bits(32) tmpreg = <a link="impl-aarch64.X.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) X[integer n, integer width]">X</a>[n, 32];
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PSTATE.N = tmpreg<msb>;
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PSTATE.Z = if (tmpreg<msb:0> == <a link="impl-shared.Zeros.1" file="shared_pseudocode.xml" hover="function: bits(N) Zeros(integer N)">Zeros</a>(msb+1)) then '1' else '0';
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PSTATE.V = tmpreg<msb+1> EOR tmpreg<msb>;
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//PSTATE.C unchanged;</pstext>
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</ps>
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</ps_section>
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</instructionsection>
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