mirror of
https://github.com/pound-emu/ballistic.git
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141 lines
6.6 KiB
XML
141 lines
6.6 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
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<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<instructionsection id="SHA256H2_advsimd" title="SHA256H2 -- A64" type="instruction">
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<docvars>
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<docvar key="instr-class" value="advsimd" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="SHA256H2" />
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</docvars>
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<heading>SHA256H2</heading>
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<desc>
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<brief>
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<para>SHA256 hash update (part 2)</para>
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</brief>
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<authored>
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<para>SHA256 hash update (part 2).</para>
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</authored>
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</desc>
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<operationalnotes>
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<para>If PSTATE.DIT is 1:</para>
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<list type="unordered">
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<listitem><content>The execution time of this instruction is independent of:<list type="unordered"><listitem><content>The values of the data supplied in any of its registers.</content></listitem><listitem><content>The values of the NZCV flags.</content></listitem></list></content></listitem>
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<listitem><content>The response of this instruction to asynchronous exceptions does not vary based on:<list type="unordered"><listitem><content>The values of the data supplied in any of its registers.</content></listitem><listitem><content>The values of the NZCV flags.</content></listitem></list></content></listitem>
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</list>
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</operationalnotes>
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<alias_list howmany="0"></alias_list>
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<classes>
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<iclass name="Advanced SIMD" oneof="1" id="iclass_advsimd" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="instr-class" value="advsimd" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="SHA256H2" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<arch_variants>
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<arch_variant name="ARMv8.0" feature="FEAT_SHA256" />
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</arch_variants>
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<regdiagram form="32" psname="aarch64/instrs/vector/crypto/sha3op/sha256-hash" tworows="1">
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<box hibit="31" width="8" settings="8">
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="23" width="2" name="size" settings="2">
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="21" settings="1">
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<c>0</c>
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</box>
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<box hibit="20" width="5" name="Rm" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="15" settings="1">
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<c>0</c>
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</box>
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<box hibit="14" width="2" name="opcode[2:1]" settings="2">
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="12" name="P" usename="1" settings="1" psbits="x">
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<c>1</c>
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</box>
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<box hibit="11" width="2" settings="2">
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="9" width="5" name="Rn" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="4" width="5" name="Rd" usename="1">
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<c colspan="5"></c>
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</box>
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</regdiagram>
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<encoding name="SHA256H2_QQV_cryptosha3" oneofinclass="1" oneof="1" label="">
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<docvars>
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<docvar key="instr-class" value="advsimd" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="SHA256H2" />
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</docvars>
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<asmtemplate><text>SHA256H2 </text><a link="sa_qd" hover="128-bit SIMD&FP source and destination (field "Rd")"><Qd></a><text>, </text><a link="sa_qn" hover="Second 128-bit SIMD&FP source register (field "Rn")"><Qn></a><text>, </text><a link="sa_vm" hover="Third SIMD&FP source register (field "Rm")"><Vm></a><text>.4S</text></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="aarch64/instrs/vector/crypto/sha3op/sha256-hash" mylink="aarch64.instrs.vector.crypto.sha3op.sha256-hash" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rd);
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integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rn);
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integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rm);
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if !<a link="impl-shared.HaveSHA256Ext.0" file="shared_pseudocode.xml" hover="function: boolean HaveSHA256Ext()">HaveSHA256Ext</a>() then UNDEFINED;
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boolean part1 = (P == '0');</pstext>
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</ps>
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</ps_section>
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</iclass>
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</classes>
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<explanations scope="all">
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<explanation enclist="SHA256H2_QQV_cryptosha3" symboldefcount="1">
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<symbol link="sa_qd"><Qd></symbol>
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<account encodedin="Rd">
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<intro>
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<para>Is the 128-bit name of the SIMD&FP source and destination, encoded in the "Rd" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="SHA256H2_QQV_cryptosha3" symboldefcount="1">
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<symbol link="sa_qn"><Qn></symbol>
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<account encodedin="Rn">
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<intro>
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<para>Is the 128-bit name of the second SIMD&FP source register, encoded in the "Rn" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="SHA256H2_QQV_cryptosha3" symboldefcount="1">
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<symbol link="sa_vm"><Vm></symbol>
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<account encodedin="Rm">
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<intro>
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<para>Is the name of the third SIMD&FP source register, encoded in the "Rm" field.</para>
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</intro>
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</account>
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</explanation>
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</explanations>
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<ps_section howmany="1">
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<ps name="aarch64/instrs/vector/crypto/sha3op/sha256-hash" mylink="execute" enclabels="" sections="1" secttype="Operation">
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<pstext mayhavelinks="1" section="Execute" rep_section="execute"><a link="AArch64.CheckFPAdvSIMDEnabled.0" file="shared_pseudocode.xml" hover="function: AArch64.CheckFPAdvSIMDEnabled()">AArch64.CheckFPAdvSIMDEnabled</a>();
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bits(128) result;
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if part1 then
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result = SHA256hash(V[d, 128], V[n, 128], V[m, 128], TRUE);
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else
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result = SHA256hash(V[n, 128], V[d, 128], V[m, 128], FALSE);
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<a link="impl-aarch64.V.write.2" file="shared_pseudocode.xml" hover="accessor: V[integer n, integer width] = bits(width) value">V</a>[d, 128] = result;</pstext>
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</ps>
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</ps_section>
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</instructionsection>
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