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341 lines
18 KiB
XML
341 lines
18 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
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<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<instructionsection id="sqrdmulh_z_zzi" title="SQRDMULH (indexed)" type="instruction">
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<docvars>
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<docvar key="instr-class" value="sve2" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="SQRDMULH" />
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</docvars>
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<heading>SQRDMULH (indexed)</heading>
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<desc>
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<brief>Signed saturating rounding doubling multiply high (indexed)</brief>
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<description>
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<para>Multiply all signed elements within each 128-bit segment of the first source vector by the specified signed element in the corresponding second source vector segment, double and place the most significant rounded half of the result in the corresponding elements of the destination vector register. Each result element is saturated to the N-bit element's signed integer range -2<sup>(N-1) </sup> to (2<sup>(N-1) </sup>)-1.</para>
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<para>The elements within the second source vector are specified using an immediate index which selects the same element position within each 128-bit vector segment. The index range is from 0 to one less than the number of elements per 128-bit segment, encoded in 1 to 3 bits depending on the size of the element.</para>
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</description>
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<status>Green</status>
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<predicated>False</predicated>
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<uses_dit condition="FEAT_SVE2 is implemented or FEAT_SME is implemented">True</uses_dit>
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</desc>
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<alias_list howmany="0"></alias_list>
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<classes>
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<classesintro count="3">
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<txt>It has encodings from 3 classes:</txt>
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<a href="#iclass_of_halfwords">16-bit</a>
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<txt>, </txt>
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<a href="#iclass_of_words">32-bit</a>
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<txt> and </txt>
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<a href="#iclass_of_doublewords">64-bit</a>
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</classesintro>
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<iclass name="16-bit" oneof="3" id="iclass_of_halfwords" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="as-structure-org" value="of-halfwords" />
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<docvar key="instr-class" value="sve2" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="SQRDMULH" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<regdiagram form="32" psname="SQRDMULH-Z.ZZi-H" tworows="1">
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<box hibit="31" width="8" settings="8">
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="23" settings="1">
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<c>0</c>
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</box>
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<box hibit="22" name="i3h" usename="1">
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<c></c>
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</box>
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<box hibit="21" settings="1">
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<c>1</c>
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</box>
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<box hibit="20" width="2" name="i3l" usename="1">
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<c colspan="2"></c>
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</box>
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<box hibit="18" width="3" name="Zm" usename="1">
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<c colspan="3"></c>
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</box>
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<box hibit="15" width="5" settings="5">
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="10" name="R" usename="1" settings="1">
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<c>1</c>
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</box>
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<box hibit="9" width="5" name="Zn" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="4" width="5" name="Zd" usename="1">
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<c colspan="5"></c>
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</box>
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</regdiagram>
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<encoding name="sqrdmulh_z_zzi_h" oneofinclass="1" oneof="3" label="">
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<docvars>
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<docvar key="as-structure-org" value="of-halfwords" />
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<docvar key="instr-class" value="sve2" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="SQRDMULH" />
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</docvars>
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<asmtemplate><text>SQRDMULH </text><a link="sa_zd" hover="Destination scalable vector register (field "Zd")"><Zd></a><text>.H, </text><a link="sa_zn" hover="First source scalable vector register (field "Zn")"><Zn></a><text>.H, </text><a link="sa_zm_1" hover="Second source scalable vector register Z0-Z7 (field "Zm")"><Zm></a><text>.H[</text><a link="sa_imm_1" hover="Element index [0-7] (field "i3h:i3l")"><imm></a><text>]</text></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="SQRDMULH-Z.ZZi-H" mylink="SQRDMULH-Z.ZZi-H" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSVE2.0" file="shared_pseudocode.xml" hover="function: boolean HaveSVE2()">HaveSVE2</a>() && !<a link="impl-aarch64.HaveSME.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME()">HaveSME</a>() then UNDEFINED;
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constant integer esize = 16;
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integer index = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(i3h:i3l);
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integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zn);
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integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zm);
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integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zd);</pstext>
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</ps>
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</ps_section>
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</iclass>
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<iclass name="32-bit" oneof="3" id="iclass_of_words" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="as-structure-org" value="of-words" />
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<docvar key="instr-class" value="sve2" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="SQRDMULH" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<regdiagram form="32" psname="SQRDMULH-Z.ZZi-S" tworows="1">
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<box hibit="31" width="8" settings="8">
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="23" name="size<1>" usename="1" settings="1">
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<c>1</c>
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</box>
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<box hibit="22" name="size<0>" usename="1" settings="1">
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<c>0</c>
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</box>
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<box hibit="21" settings="1">
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<c>1</c>
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</box>
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<box hibit="20" width="2" name="i2" usename="1">
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<c colspan="2"></c>
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</box>
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<box hibit="18" width="3" name="Zm" usename="1">
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<c colspan="3"></c>
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</box>
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<box hibit="15" width="5" settings="5">
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="10" name="R" usename="1" settings="1">
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<c>1</c>
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</box>
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<box hibit="9" width="5" name="Zn" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="4" width="5" name="Zd" usename="1">
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<c colspan="5"></c>
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</box>
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</regdiagram>
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<encoding name="sqrdmulh_z_zzi_s" oneofinclass="1" oneof="3" label="">
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<docvars>
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<docvar key="as-structure-org" value="of-words" />
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<docvar key="instr-class" value="sve2" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="SQRDMULH" />
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</docvars>
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<asmtemplate><text>SQRDMULH </text><a link="sa_zd" hover="Destination scalable vector register (field "Zd")"><Zd></a><text>.S, </text><a link="sa_zn" hover="First source scalable vector register (field "Zn")"><Zn></a><text>.S, </text><a link="sa_zm_1" hover="Second source scalable vector register Z0-Z7 (field "Zm")"><Zm></a><text>.S[</text><a link="sa_imm_2" hover="Element index [0-3] (field "i2")"><imm></a><text>]</text></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="SQRDMULH-Z.ZZi-S" mylink="SQRDMULH-Z.ZZi-S" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSVE2.0" file="shared_pseudocode.xml" hover="function: boolean HaveSVE2()">HaveSVE2</a>() && !<a link="impl-aarch64.HaveSME.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME()">HaveSME</a>() then UNDEFINED;
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constant integer esize = 32;
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integer index = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(i2);
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integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zn);
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integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zm);
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integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zd);</pstext>
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</ps>
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</ps_section>
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</iclass>
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<iclass name="64-bit" oneof="3" id="iclass_of_doublewords" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="as-structure-org" value="of-doublewords" />
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<docvar key="instr-class" value="sve2" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="SQRDMULH" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<regdiagram form="32" psname="SQRDMULH-Z.ZZi-D" tworows="1">
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<box hibit="31" width="8" settings="8">
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="23" name="size<1>" usename="1" settings="1">
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<c>1</c>
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</box>
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<box hibit="22" name="size<0>" usename="1" settings="1">
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<c>1</c>
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</box>
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<box hibit="21" settings="1">
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<c>1</c>
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</box>
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<box hibit="20" name="i1" usename="1">
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<c></c>
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</box>
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<box hibit="19" width="4" name="Zm" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="15" width="5" settings="5">
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="10" name="R" usename="1" settings="1">
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<c>1</c>
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</box>
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<box hibit="9" width="5" name="Zn" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="4" width="5" name="Zd" usename="1">
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<c colspan="5"></c>
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</box>
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</regdiagram>
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<encoding name="sqrdmulh_z_zzi_d" oneofinclass="1" oneof="3" label="">
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<docvars>
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<docvar key="as-structure-org" value="of-doublewords" />
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<docvar key="instr-class" value="sve2" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="SQRDMULH" />
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</docvars>
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<asmtemplate><text>SQRDMULH </text><a link="sa_zd" hover="Destination scalable vector register (field "Zd")"><Zd></a><text>.D, </text><a link="sa_zn" hover="First source scalable vector register (field "Zn")"><Zn></a><text>.D, </text><a link="sa_zm" hover="Second source scalable vector register Z0-Z15 (field "Zm")"><Zm></a><text>.D[</text><a link="sa_imm" hover="Element index [0-1] (field "i1")"><imm></a><text>]</text></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="SQRDMULH-Z.ZZi-D" mylink="SQRDMULH-Z.ZZi-D" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSVE2.0" file="shared_pseudocode.xml" hover="function: boolean HaveSVE2()">HaveSVE2</a>() && !<a link="impl-aarch64.HaveSME.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME()">HaveSME</a>() then UNDEFINED;
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constant integer esize = 64;
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integer index = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(i1);
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integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zn);
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integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zm);
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integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zd);</pstext>
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</ps>
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</ps_section>
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</iclass>
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</classes>
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<explanations scope="all">
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<explanation enclist="sqrdmulh_z_zzi_d, sqrdmulh_z_zzi_h, sqrdmulh_z_zzi_s" symboldefcount="1">
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<symbol link="sa_zd"><Zd></symbol>
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<account encodedin="Zd">
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<intro>
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<para>Is the name of the destination scalable vector register, encoded in the "Zd" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="sqrdmulh_z_zzi_d, sqrdmulh_z_zzi_h, sqrdmulh_z_zzi_s" symboldefcount="1">
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<symbol link="sa_zn"><Zn></symbol>
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<account encodedin="Zn">
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<intro>
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<para>Is the name of the first source scalable vector register, encoded in the "Zn" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="sqrdmulh_z_zzi_h, sqrdmulh_z_zzi_s" symboldefcount="1">
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<symbol link="sa_zm_1"><Zm></symbol>
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<account encodedin="Zm">
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<intro>
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<para>For the 16-bit and 32-bit variant: is the name of the second source scalable vector register Z0-Z7, encoded in the "Zm" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="sqrdmulh_z_zzi_d" symboldefcount="2">
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<symbol link="sa_zm"><Zm></symbol>
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<account encodedin="Zm">
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<docvars>
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<docvar key="as-structure-org" value="of-doublewords" />
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</docvars>
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<intro>
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<para>For the 64-bit variant: is the name of the second source scalable vector register Z0-Z15, encoded in the "Zm" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="sqrdmulh_z_zzi_h" symboldefcount="1">
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<symbol link="sa_imm_1"><imm></symbol>
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<account encodedin="i3h:i3l">
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<docvars>
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<docvar key="as-structure-org" value="of-halfwords" />
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</docvars>
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<intro>
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<para>For the 16-bit variant: is the element index, in the range 0 to 7, encoded in the "i3h:i3l" fields.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="sqrdmulh_z_zzi_s" symboldefcount="2">
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<symbol link="sa_imm_2"><imm></symbol>
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<account encodedin="i2">
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<docvars>
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<docvar key="as-structure-org" value="of-words" />
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</docvars>
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<intro>
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<para>For the 32-bit variant: is the element index, in the range 0 to 3, encoded in the "i2" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="sqrdmulh_z_zzi_d" symboldefcount="3">
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<symbol link="sa_imm"><imm></symbol>
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<account encodedin="i1">
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<docvars>
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<docvar key="as-structure-org" value="of-doublewords" />
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</docvars>
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<intro>
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<para>For the 64-bit variant: is the element index, in the range 0 to 1, encoded in the "i1" field.</para>
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</intro>
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</account>
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</explanation>
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</explanations>
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<ps_section howmany="1">
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<ps name="SQRDMULH-Z.ZZi-H" mylink="execute" enclabels="" sections="1" secttype="Operation">
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<pstext mayhavelinks="1" section="Execute" rep_section="execute"><a link="impl-aarch64.CheckSVEEnabled.0" file="shared_pseudocode.xml" hover="function: CheckSVEEnabled()">CheckSVEEnabled</a>();
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constant integer VL = <a link="impl-aarch64.CurrentVL.read.none" file="shared_pseudocode.xml" hover="accessor: integer CurrentVL">CurrentVL</a>;
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constant integer elements = VL DIV esize;
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constant integer eltspersegment = 128 DIV esize;
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bits(VL) operand1 = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[n, VL];
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bits(VL) operand2 = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[m, VL];
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bits(VL) result;
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constant integer round_const = 1 << (esize - 1);
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for e = 0 to elements-1
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integer segmentbase = e - (e MOD eltspersegment);
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integer s = segmentbase + index;
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integer element1 = <a link="impl-shared.SInt.1" file="shared_pseudocode.xml" hover="function: integer SInt(bits(N) x)">SInt</a>(<a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[operand1, e, esize]);
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integer element2 = <a link="impl-shared.SInt.1" file="shared_pseudocode.xml" hover="function: integer SInt(bits(N) x)">SInt</a>(<a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[operand2, s, esize]);
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integer res = 2 * element1 * element2;
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<a link="impl-shared.Elem.write.3" file="shared_pseudocode.xml" hover="accessor: Elem[bits(N) &vector, integer e, integer size] = bits(size) value">Elem</a>[result, e, esize] = <a link="impl-aarch32.SignedSat.2" file="shared_pseudocode.xml" hover="function: bits(N) SignedSat(integer i, integer N)">SignedSat</a>((res + round_const) >> esize, esize);
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<a link="impl-aarch64.Z.write.2" file="shared_pseudocode.xml" hover="accessor: Z[integer n, integer width] = bits(width) value">Z</a>[d, VL] = result;</pstext>
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</ps>
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</ps_section>
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</instructionsection>
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