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archived-ballistic/spec/arm64_xml/stsmax_ldsmax.xml
Ronald Caesar 26a677f8b4 decoder: Add ARM specification docs
Signed-off-by: Ronald Caesar <github43132@proton.me>
2025-12-12 18:11:36 -04:00

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<?xml version="1.0" encoding="utf-8"?>
<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
<instructionsection id="STSMAX_LDSMAX" title="STSMAX, STSMAXL -- A64" type="alias">
<docvars>
<docvar key="instr-class" value="general" />
<docvar key="isa" value="A64" />
</docvars>
<heading>STSMAX, STSMAXL</heading>
<desc>
<brief>
<para>Atomic signed maximum on word or doubleword in memory, without return</para>
</brief>
<authored>
<para>Atomic signed maximum on word or doubleword in memory, without return, atomically loads a 32-bit word or 64-bit doubleword from memory, compares it against the value held in a register, and stores the larger value back to memory, treating the values as signed numbers.</para>
<list type="unordered">
<listitem><content><instruction>STSMAX</instruction> does not have release semantics.</content></listitem>
<listitem><content><instruction>STSMAXL</instruction> stores to memory with release semantics, as described in <xref linkend="BEIHCHEF">Load-Acquire, Store-Release</xref>.</content></listitem>
</list>
<para>For information about memory accesses see <xref linkend="CHDIIIBB">Load/Store addressing modes</xref>.</para>
</authored>
</desc>
<operationalnotes>
<para>If PSTATE.DIT is 1, the timing of this instruction is insensitive to the value of the data being loaded or stored.</para>
</operationalnotes>
<aliasto refiform="ldsmax.xml" iformid="LDSMAX">LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL</aliasto>
<classes>
<iclass name="Integer" oneof="1" id="iclass_general" no_encodings="4" isa="A64">
<docvars>
<docvar key="instr-class" value="general" />
<docvar key="isa" value="A64" />
</docvars>
<iclassintro count="4"></iclassintro>
<arch_variants>
<arch_variant name="ARMv8.1" feature="FEAT_LSE" />
</arch_variants>
<regdiagram form="32" psname="aarch64/instrs/memory/atomicops/ld" tworows="1">
<box hibit="31" width="2" name="size" usename="1" settings="1" psbits="xx">
<c>1</c>
<c>x</c>
</box>
<box hibit="29" width="3" settings="3">
<c>1</c>
<c>1</c>
<c>1</c>
</box>
<box hibit="26" name="V" settings="1">
<c>0</c>
</box>
<box hibit="25" width="2" settings="2">
<c>0</c>
<c>0</c>
</box>
<box hibit="23" name="A" usename="1" settings="1" psbits="x">
<c>0</c>
</box>
<box hibit="22" name="R" usename="1">
<c></c>
</box>
<box hibit="21" settings="1">
<c>1</c>
</box>
<box hibit="20" width="5" name="Rs" usename="1">
<c colspan="5"></c>
</box>
<box hibit="15" name="o3" settings="1">
<c>0</c>
</box>
<box hibit="14" width="3" name="opc" usename="1" settings="3" psbits="xxx">
<c>1</c>
<c>0</c>
<c>0</c>
</box>
<box hibit="11" width="2" settings="2">
<c>0</c>
<c>0</c>
</box>
<box hibit="9" width="5" name="Rn" usename="1">
<c colspan="5"></c>
</box>
<box hibit="4" width="5" name="Rt" usename="1" settings="5" psbits="xxxxx">
<c>1</c>
<c>1</c>
<c>1</c>
<c>1</c>
<c>1</c>
</box>
</regdiagram>
<encoding name="STSMAX_LDSMAX_32_memop" oneofinclass="4" oneof="4" label="32-bit LDSMAX alias" bitdiffs="size == 10 &amp;&amp; R == 0">
<docvars>
<docvar key="alias_mnemonic" value="STSMAX" />
<docvar key="atomic-ops" value="LDSMAX-32-reg" />
<docvar key="instr-class" value="general" />
<docvar key="isa" value="A64" />
<docvar key="loadstore-order" value="no-order" />
<docvar key="mnemonic" value="LDSMAX" />
<docvar key="reg-type" value="32-reg" />
</docvars>
<box hibit="31" width="2" name="size">
<c></c>
<c>0</c>
</box>
<box hibit="22" width="1" name="R">
<c>0</c>
</box>
<asmtemplate><text>STSMAX </text><a link="sa_ws" hover="32-bit general-purpose register holding data value to be operated on with the contents of memory location (field &quot;Rs&quot;)">&lt;Ws&gt;</a><text>, [</text><a link="sa_xn_sp" hover="64-bit general-purpose base register or SP (field &quot;Rn&quot;)">&lt;Xn|SP&gt;</a><text>]</text></asmtemplate>
<equivalent_to>
<asmtemplate><a href="ldsmax.xml#LDSMAX_32_memop">LDSMAX</a><text> </text><a link="sa_ws" hover="32-bit general-purpose register holding data value to be operated on with the contents of memory location (field &quot;Rs&quot;)">&lt;Ws&gt;</a><text>, WZR, [</text><a link="sa_xn_sp" hover="64-bit general-purpose base register or SP (field &quot;Rn&quot;)">&lt;Xn|SP&gt;</a><text>]</text></asmtemplate>
<aliascond>Unconditionally</aliascond>
</equivalent_to>
</encoding>
<encoding name="STSMAXL_LDSMAXL_32_memop" oneofinclass="4" oneof="4" label="32-bit LDSMAXL alias" bitdiffs="size == 10 &amp;&amp; R == 1">
<docvars>
<docvar key="alias_mnemonic" value="STSMAXL" />
<docvar key="atomic-ops" value="LDSMAXL-32-reg" />
<docvar key="instr-class" value="general" />
<docvar key="isa" value="A64" />
<docvar key="loadstore-order" value="release" />
<docvar key="mnemonic" value="LDSMAXL" />
<docvar key="reg-type" value="32-reg" />
</docvars>
<box hibit="31" width="2" name="size">
<c></c>
<c>0</c>
</box>
<box hibit="22" width="1" name="R">
<c>1</c>
</box>
<asmtemplate><text>STSMAXL </text><a link="sa_ws" hover="32-bit general-purpose register holding data value to be operated on with the contents of memory location (field &quot;Rs&quot;)">&lt;Ws&gt;</a><text>, [</text><a link="sa_xn_sp" hover="64-bit general-purpose base register or SP (field &quot;Rn&quot;)">&lt;Xn|SP&gt;</a><text>]</text></asmtemplate>
<equivalent_to>
<asmtemplate><a href="ldsmax.xml#LDSMAXL_32_memop">LDSMAXL</a><text> </text><a link="sa_ws" hover="32-bit general-purpose register holding data value to be operated on with the contents of memory location (field &quot;Rs&quot;)">&lt;Ws&gt;</a><text>, WZR, [</text><a link="sa_xn_sp" hover="64-bit general-purpose base register or SP (field &quot;Rn&quot;)">&lt;Xn|SP&gt;</a><text>]</text></asmtemplate>
<aliascond>Unconditionally</aliascond>
</equivalent_to>
</encoding>
<encoding name="STSMAX_LDSMAX_64_memop" oneofinclass="4" oneof="4" label="64-bit LDSMAX alias" bitdiffs="size == 11 &amp;&amp; R == 0">
<docvars>
<docvar key="alias_mnemonic" value="STSMAX" />
<docvar key="atomic-ops" value="LDSMAX-64-reg" />
<docvar key="instr-class" value="general" />
<docvar key="isa" value="A64" />
<docvar key="loadstore-order" value="no-order" />
<docvar key="mnemonic" value="LDSMAX" />
<docvar key="reg-type" value="64-reg" />
</docvars>
<box hibit="31" width="2" name="size">
<c></c>
<c>1</c>
</box>
<box hibit="22" width="1" name="R">
<c>0</c>
</box>
<asmtemplate><text>STSMAX </text><a link="sa_xs" hover="64-bit general-purpose register holding data value to be operated on with the contents of memory location (field &quot;Rs&quot;)">&lt;Xs&gt;</a><text>, [</text><a link="sa_xn_sp" hover="64-bit general-purpose base register or SP (field &quot;Rn&quot;)">&lt;Xn|SP&gt;</a><text>]</text></asmtemplate>
<equivalent_to>
<asmtemplate><a href="ldsmax.xml#LDSMAX_64_memop">LDSMAX</a><text> </text><a link="sa_xs" hover="64-bit general-purpose register holding data value to be operated on with the contents of memory location (field &quot;Rs&quot;)">&lt;Xs&gt;</a><text>, XZR, [</text><a link="sa_xn_sp" hover="64-bit general-purpose base register or SP (field &quot;Rn&quot;)">&lt;Xn|SP&gt;</a><text>]</text></asmtemplate>
<aliascond>Unconditionally</aliascond>
</equivalent_to>
</encoding>
<encoding name="STSMAXL_LDSMAXL_64_memop" oneofinclass="4" oneof="4" label="64-bit LDSMAXL alias" bitdiffs="size == 11 &amp;&amp; R == 1">
<docvars>
<docvar key="alias_mnemonic" value="STSMAXL" />
<docvar key="atomic-ops" value="LDSMAXL-64-reg" />
<docvar key="instr-class" value="general" />
<docvar key="isa" value="A64" />
<docvar key="loadstore-order" value="release" />
<docvar key="mnemonic" value="LDSMAXL" />
<docvar key="reg-type" value="64-reg" />
</docvars>
<box hibit="31" width="2" name="size">
<c></c>
<c>1</c>
</box>
<box hibit="22" width="1" name="R">
<c>1</c>
</box>
<asmtemplate><text>STSMAXL </text><a link="sa_xs" hover="64-bit general-purpose register holding data value to be operated on with the contents of memory location (field &quot;Rs&quot;)">&lt;Xs&gt;</a><text>, [</text><a link="sa_xn_sp" hover="64-bit general-purpose base register or SP (field &quot;Rn&quot;)">&lt;Xn|SP&gt;</a><text>]</text></asmtemplate>
<equivalent_to>
<asmtemplate><a href="ldsmax.xml#LDSMAXL_64_memop">LDSMAXL</a><text> </text><a link="sa_xs" hover="64-bit general-purpose register holding data value to be operated on with the contents of memory location (field &quot;Rs&quot;)">&lt;Xs&gt;</a><text>, XZR, [</text><a link="sa_xn_sp" hover="64-bit general-purpose base register or SP (field &quot;Rn&quot;)">&lt;Xn|SP&gt;</a><text>]</text></asmtemplate>
<aliascond>Unconditionally</aliascond>
</equivalent_to>
</encoding>
</iclass>
</classes>
<explanations scope="all">
<explanation enclist="STSMAX_LDSMAX_32_memop" symboldefcount="1">
<symbol link="sa_ws">&lt;Ws&gt;</symbol>
<account encodedin="Rs">
<intro>
<para>Is the 32-bit name of the general-purpose register holding the data value to be operated on with the contents of the memory location, encoded in the "Rs" field.</para>
</intro>
</account>
</explanation>
<explanation enclist="STSMAX_LDSMAX_64_memop" symboldefcount="1">
<symbol link="sa_xs">&lt;Xs&gt;</symbol>
<account encodedin="Rs">
<intro>
<para>Is the 64-bit name of the general-purpose register holding the data value to be operated on with the contents of the memory location, encoded in the "Rs" field.</para>
</intro>
</account>
</explanation>
<explanation enclist="STSMAX_LDSMAX_32_memop, STSMAX_LDSMAX_64_memop" symboldefcount="1">
<symbol link="sa_xn_sp">&lt;Xn|SP&gt;</symbol>
<account encodedin="Rn">
<intro>
<para>Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field.</para>
</intro>
</account>
</explanation>
</explanations>
</instructionsection>