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archived-ballistic/spec/arm64_xml/sudot_z_zzzi.xml
Ronald Caesar 26a677f8b4 decoder: Add ARM specification docs
Signed-off-by: Ronald Caesar <github43132@proton.me>
2025-12-12 18:11:36 -04:00

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<?xml version="1.0" encoding="utf-8"?>
<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
<instructionsection id="sudot_z_zzzi" title="SUDOT" type="instruction">
<docvars>
<docvar key="instr-class" value="sve" />
<docvar key="isa" value="A64" />
<docvar key="mnemonic" value="SUDOT" />
</docvars>
<heading>SUDOT</heading>
<desc>
<brief>Signed by unsigned integer indexed dot product</brief>
<description>
<para>The signed by unsigned integer indexed dot product instruction computes the dot product of a group of four signed 8-bit integer values held in each 32-bit element of the first source vector multiplied by a group of four unsigned 8-bit integer values in an indexed 32-bit element of the second source vector, and then destructively adds the widened dot product to the corresponding 32-bit element of the destination vector.</para>
<para>The groups within the second source vector are specified using an immediate index which selects the same group position within each 128-bit vector segment. The index range is from 0 to 3. This instruction is unpredicated.</para>
<para>ID_AA64ZFR0_EL1.I8MM indicates whether this instruction is implemented.</para>
</description>
<status>Green</status>
<predicated>False</predicated>
<takes_movprfx>True</takes_movprfx>
</desc>
<alias_list howmany="0"></alias_list>
<classes>
<iclass name="SVE" oneof="1" id="iclass_sve" no_encodings="1" isa="A64">
<docvars>
<docvar key="instr-class" value="sve" />
<docvar key="isa" value="A64" />
<docvar key="mnemonic" value="SUDOT" />
</docvars>
<iclassintro count="1"></iclassintro>
<arch_variants>
<arch_variant name="ARMv8.6" feature="FEAT_I8MM" />
</arch_variants>
<regdiagram form="32" psname="SUDOT-Z.ZZZi-S" tworows="1">
<box hibit="31" width="8" settings="8">
<c>0</c>
<c>1</c>
<c>0</c>
<c>0</c>
<c>0</c>
<c>1</c>
<c>0</c>
<c>0</c>
</box>
<box hibit="23" name="size&lt;1&gt;" usename="1" settings="1">
<c>1</c>
</box>
<box hibit="22" name="size&lt;0&gt;" usename="1" settings="1">
<c>0</c>
</box>
<box hibit="21" settings="1">
<c>1</c>
</box>
<box hibit="20" width="2" name="i2" usename="1">
<c colspan="2"></c>
</box>
<box hibit="18" width="3" name="Zm" usename="1">
<c colspan="3"></c>
</box>
<box hibit="15" width="5" settings="5">
<c>0</c>
<c>0</c>
<c>0</c>
<c>1</c>
<c>1</c>
</box>
<box hibit="10" name="U" usename="1" settings="1">
<c>1</c>
</box>
<box hibit="9" width="5" name="Zn" usename="1">
<c colspan="5"></c>
</box>
<box hibit="4" width="5" name="Zda" usename="1">
<c colspan="5"></c>
</box>
</regdiagram>
<encoding name="sudot_z_zzzi_s" oneofinclass="1" oneof="1" label="">
<docvars>
<docvar key="instr-class" value="sve" />
<docvar key="isa" value="A64" />
<docvar key="mnemonic" value="SUDOT" />
</docvars>
<asmtemplate><text>SUDOT </text><a link="sa_zda" hover="Third source and destination scalable vector register (field &quot;Zda&quot;)">&lt;Zda&gt;</a><text>.S, </text><a link="sa_zn" hover="First source scalable vector register (field &quot;Zn&quot;)">&lt;Zn&gt;</a><text>.B, </text><a link="sa_zm" hover="Second source scalable vector register Z0-Z7 (field &quot;Zm&quot;)">&lt;Zm&gt;</a><text>.B[</text><a link="sa_imm" hover="Immediate index of a 32-bit group of four 8-bit values within each 128-bit vector segment [0-3] (field &quot;i2&quot;)">&lt;imm&gt;</a><text>]</text></asmtemplate>
</encoding>
<ps_section howmany="1">
<ps name="SUDOT-Z.ZZZi-S" mylink="SUDOT-Z.ZZZi-S" enclabels="" sections="1" secttype="noheading">
<pstext mayhavelinks="1" section="Decode" rep_section="decode">if (!<a link="impl-aarch64.HaveSVE.0" file="shared_pseudocode.xml" hover="function: boolean HaveSVE()">HaveSVE</a>() &amp;&amp; !<a link="impl-aarch64.HaveSME.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME()">HaveSME</a>()) || !<a link="impl-shared.HaveInt8MatMulExt.0" file="shared_pseudocode.xml" hover="function: boolean HaveInt8MatMulExt()">HaveInt8MatMulExt</a>() then UNDEFINED;
constant integer esize = 32;
integer index = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(i2);
integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zn);
integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zm);
integer da = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zda);</pstext>
</ps>
</ps_section>
</iclass>
</classes>
<explanations scope="all">
<explanation enclist="sudot_z_zzzi_s" symboldefcount="1">
<symbol link="sa_zda">&lt;Zda&gt;</symbol>
<account encodedin="Zda">
<intro>
<para>Is the name of the third source and destination scalable vector register, encoded in the "Zda" field.</para>
</intro>
</account>
</explanation>
<explanation enclist="sudot_z_zzzi_s" symboldefcount="1">
<symbol link="sa_zn">&lt;Zn&gt;</symbol>
<account encodedin="Zn">
<intro>
<para>Is the name of the first source scalable vector register, encoded in the "Zn" field.</para>
</intro>
</account>
</explanation>
<explanation enclist="sudot_z_zzzi_s" symboldefcount="1">
<symbol link="sa_zm">&lt;Zm&gt;</symbol>
<account encodedin="Zm">
<intro>
<para>Is the name of the second source scalable vector register Z0-Z7, encoded in the "Zm" field.</para>
</intro>
</account>
</explanation>
<explanation enclist="sudot_z_zzzi_s" symboldefcount="1">
<symbol link="sa_imm">&lt;imm&gt;</symbol>
<account encodedin="i2">
<intro>
<para>Is the immediate index of a 32-bit group of four 8-bit values within each 128-bit vector segment, in the range 0 to 3, encoded in the "i2" field.</para>
</intro>
</account>
</explanation>
</explanations>
<ps_section howmany="1">
<ps name="SUDOT-Z.ZZZi-S" mylink="execute" enclabels="" sections="1" secttype="Operation">
<pstext mayhavelinks="1" section="Execute" rep_section="execute"><a link="impl-aarch64.CheckSVEEnabled.0" file="shared_pseudocode.xml" hover="function: CheckSVEEnabled()">CheckSVEEnabled</a>();
constant integer VL = <a link="impl-aarch64.CurrentVL.read.none" file="shared_pseudocode.xml" hover="accessor: integer CurrentVL">CurrentVL</a>;
constant integer PL = VL DIV 8;
constant integer elements = VL DIV esize;
constant integer eltspersegment = 128 DIV esize;
bits(VL) operand1 = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[n, VL];
bits(VL) operand2 = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[m, VL];
bits(VL) operand3 = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[da, VL];
bits(VL) result;
for e = 0 to elements-1
integer segmentbase = e - (e MOD eltspersegment);
integer s = segmentbase + index;
bits(esize) res = <a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[operand3, e, esize];
for i = 0 to 3
integer element1 = <a link="impl-shared.SInt.1" file="shared_pseudocode.xml" hover="function: integer SInt(bits(N) x)">SInt</a>(<a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[operand1, 4 * e + i, esize DIV 4]);
integer element2 = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(<a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[operand2, 4 * s + i, esize DIV 4]);
res = res + element1 * element2;
<a link="impl-shared.Elem.write.3" file="shared_pseudocode.xml" hover="accessor: Elem[bits(N) &amp;vector, integer e, integer size] = bits(size) value">Elem</a>[result, e, esize] = res;
<a link="impl-aarch64.Z.write.2" file="shared_pseudocode.xml" hover="accessor: Z[integer n, integer width] = bits(width) value">Z</a>[da, VL] = result;</pstext>
</ps>
</ps_section>
</instructionsection>