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https://github.com/pound-emu/ballistic.git
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332 lines
15 KiB
XML
332 lines
15 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
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<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<instructionsection id="sunpk_mz_z" title="SUNPK" type="instruction">
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<docvars>
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<docvar key="instr-class" value="mortlach2" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="SUNPK" />
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</docvars>
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<heading>SUNPK</heading>
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<desc>
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<brief>Unpack and sign-extend multi-vector elements</brief>
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<description>
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<para>Unpack elements from one or two source vectors and then sign-extend them to place in elements of twice their size within the two or four destination vectors.</para>
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<para>This instruction is unpredicated.</para>
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</description>
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<status>Green</status>
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<predicated>False</predicated>
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<sm_policy>SM_1_only</sm_policy>
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</desc>
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<alias_list howmany="0"></alias_list>
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<classes>
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<classesintro count="2">
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<txt>It has encodings from 2 classes:</txt>
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<a href="#iclass_to_2reg">Two registers</a>
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<txt> and </txt>
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<a href="#iclass_to_4reg">Four registers</a>
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</classesintro>
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<iclass name="Two registers" oneof="2" id="iclass_to_2reg" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="instr-class" value="mortlach2" />
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<docvar key="isa" value="A64" />
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<docvar key="ldstruct-regcount" value="to-2reg" />
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<docvar key="mnemonic" value="SUNPK" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<arch_variants>
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<arch_variant name="FEAT_SME2" feature="FEAT_SME2" />
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</arch_variants>
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<regdiagram form="32" psname="SUNPK-MZ.Z-2" tworows="1">
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<box hibit="31" width="8" settings="8">
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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</box>
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<box hibit="23" width="2" name="size" usename="1">
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<c colspan="2"></c>
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</box>
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<box hibit="21" width="12" settings="12">
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="9" width="5" name="Zn" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="4" width="4" name="Zd" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="0" name="U" usename="1" settings="1">
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<c>0</c>
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</box>
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</regdiagram>
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<encoding name="sunpk_mz_z_2" oneofinclass="1" oneof="2" label="">
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<docvars>
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<docvar key="instr-class" value="mortlach2" />
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<docvar key="isa" value="A64" />
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<docvar key="ldstruct-regcount" value="to-2reg" />
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<docvar key="mnemonic" value="SUNPK" />
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</docvars>
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<asmtemplate><text>SUNPK </text><text>{</text><text> </text><a link="sa_zd1" hover="First destination scalable vector register of a multi-vector sequence (field Zd)"><Zd1></a><text>.</text><a link="sa_t" hover="Size specifier (field "size") [D,H,S]"><T></a><text>-</text><a link="sa_zd2" hover="Second destination scalable vector register of a multi-vector sequence (field Zd)"><Zd2></a><text>.</text><a link="sa_t" hover="Size specifier (field "size") [D,H,S]"><T></a><text> </text><text>}</text><text>, </text><a link="sa_zn" hover="Source scalable vector register (field "Zn")"><Zn></a><text>.</text><a link="sa_tb" hover="Size specifier (field "size") [B,H,S]"><Tb></a></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="SUNPK-MZ.Z-2" mylink="SUNPK-MZ.Z-2" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSME2.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME2()">HaveSME2</a>() then UNDEFINED;
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if size == '00' then UNDEFINED;
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constant integer esize = 8 << <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(size);
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integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zn);
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integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zd:'0');
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constant integer nreg = 2;
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boolean unsigned = FALSE;</pstext>
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</ps>
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</ps_section>
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</iclass>
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<iclass name="Four registers" oneof="2" id="iclass_to_4reg" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="instr-class" value="mortlach2" />
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<docvar key="isa" value="A64" />
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<docvar key="ldstruct-regcount" value="to-4reg" />
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<docvar key="mnemonic" value="SUNPK" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<arch_variants>
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<arch_variant name="FEAT_SME2" feature="FEAT_SME2" />
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</arch_variants>
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<regdiagram form="32" psname="SUNPK-MZ.Z-4" tworows="1">
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<box hibit="31" width="8" settings="8">
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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</box>
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<box hibit="23" width="2" name="size" usename="1">
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<c colspan="2"></c>
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</box>
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<box hibit="21" width="12" settings="12">
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="9" width="4" name="Zn" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="5" settings="1">
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<c>0</c>
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</box>
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<box hibit="4" width="3" name="Zd" usename="1">
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<c colspan="3"></c>
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</box>
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<box hibit="1" settings="1">
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<c>0</c>
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</box>
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<box hibit="0" name="U" usename="1" settings="1">
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<c>0</c>
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</box>
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</regdiagram>
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<encoding name="sunpk_mz_z_4" oneofinclass="1" oneof="2" label="">
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<docvars>
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<docvar key="instr-class" value="mortlach2" />
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<docvar key="isa" value="A64" />
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<docvar key="ldstruct-regcount" value="to-4reg" />
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<docvar key="mnemonic" value="SUNPK" />
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</docvars>
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<asmtemplate><text>SUNPK </text><text>{</text><text> </text><a link="sa_zd1_1" hover="First destination scalable vector register of a multi-vector sequence (field Zd)"><Zd1></a><text>.</text><a link="sa_t" hover="Size specifier (field "size") [D,H,S]"><T></a><text>-</text><a link="sa_zd4" hover="Fourth destination scalable vector register of a multi-vector sequence (field Zd)"><Zd4></a><text>.</text><a link="sa_t" hover="Size specifier (field "size") [D,H,S]"><T></a><text> </text><text>}</text><text>, </text><text>{</text><text> </text><a link="sa_zn1" hover="First scalable vector register of a multi-vector sequence (field Zn)"><Zn1></a><text>.</text><a link="sa_tb" hover="Size specifier (field "size") [B,H,S]"><Tb></a><text>-</text><a link="sa_zn2" hover="Second scalable vector register of a multi-vector sequence (field Zn)"><Zn2></a><text>.</text><a link="sa_tb" hover="Size specifier (field "size") [B,H,S]"><Tb></a><text> </text><text>}</text></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="SUNPK-MZ.Z-4" mylink="SUNPK-MZ.Z-4" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSME2.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME2()">HaveSME2</a>() then UNDEFINED;
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if size == '00' then UNDEFINED;
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constant integer esize = 8 << <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(size);
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integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zn:'0');
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integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zd:'00');
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constant integer nreg = 4;
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boolean unsigned = FALSE;</pstext>
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</ps>
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</ps_section>
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</iclass>
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</classes>
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<explanations scope="all">
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<explanation enclist="sunpk_mz_z_2" symboldefcount="1">
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<symbol link="sa_zd1"><Zd1></symbol>
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<account encodedin="Zd">
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<docvars>
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<docvar key="ldstruct-regcount" value="to-2reg" />
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</docvars>
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<intro>
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<para>For the two registers variant: is the name of the first destination scalable vector register of a multi-vector sequence, encoded as "Zd" times 2.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="sunpk_mz_z_4" symboldefcount="2">
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<symbol link="sa_zd1_1"><Zd1></symbol>
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<account encodedin="Zd">
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<docvars>
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<docvar key="ldstruct-regcount" value="to-4reg" />
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</docvars>
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<intro>
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<para>For the four registers variant: is the name of the first destination scalable vector register of a multi-vector sequence, encoded as "Zd" times 4.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="sunpk_mz_z_2, sunpk_mz_z_4" symboldefcount="1">
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<symbol link="sa_t"><T></symbol>
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<definition encodedin="size">
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<intro>Is the size specifier, </intro>
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<table class="valuetable">
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<tgroup cols="2">
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<thead>
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<row>
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<entry class="bitfield">size</entry>
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<entry class="symbol"><T></entry>
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</row>
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</thead>
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<tbody>
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<row>
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<entry class="bitfield">00</entry>
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<entry class="symbol">RESERVED</entry>
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</row>
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<row>
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<entry class="bitfield">01</entry>
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<entry class="symbol">H</entry>
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</row>
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<row>
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<entry class="bitfield">10</entry>
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<entry class="symbol">S</entry>
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</row>
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<row>
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<entry class="bitfield">11</entry>
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<entry class="symbol">D</entry>
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</row>
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</tbody>
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</tgroup>
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</table>
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</definition>
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</explanation>
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<explanation enclist="sunpk_mz_z_4" symboldefcount="1">
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<symbol link="sa_zd4"><Zd4></symbol>
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<account encodedin="Zd">
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<intro>
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<para>Is the name of the fourth destination scalable vector register of a multi-vector sequence, encoded as "Zd" times 4 plus 3.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="sunpk_mz_z_4" symboldefcount="1">
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<symbol link="sa_zn1"><Zn1></symbol>
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<account encodedin="Zn">
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<intro>
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<para>Is the name of the first scalable vector register of a multi-vector sequence, encoded as "Zn" times 2.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="sunpk_mz_z_2" symboldefcount="1">
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<symbol link="sa_zd2"><Zd2></symbol>
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<account encodedin="Zd">
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<intro>
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<para>Is the name of the second destination scalable vector register of a multi-vector sequence, encoded as "Zd" times 2 plus 1.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="sunpk_mz_z_2" symboldefcount="1">
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<symbol link="sa_zn"><Zn></symbol>
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<account encodedin="Zn">
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<intro>
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<para>Is the name of the source scalable vector register, encoded in the "Zn" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="sunpk_mz_z_2, sunpk_mz_z_4" symboldefcount="1">
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<symbol link="sa_tb"><Tb></symbol>
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<definition encodedin="size">
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<intro>Is the size specifier, </intro>
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<table class="valuetable">
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<tgroup cols="2">
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<thead>
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<row>
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<entry class="bitfield">size</entry>
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<entry class="symbol"><Tb></entry>
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</row>
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</thead>
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<tbody>
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<row>
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<entry class="bitfield">00</entry>
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<entry class="symbol">RESERVED</entry>
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</row>
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<row>
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<entry class="bitfield">01</entry>
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<entry class="symbol">B</entry>
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</row>
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<row>
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<entry class="bitfield">10</entry>
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<entry class="symbol">H</entry>
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</row>
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<row>
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<entry class="bitfield">11</entry>
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<entry class="symbol">S</entry>
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</row>
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</tbody>
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</tgroup>
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</table>
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</definition>
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</explanation>
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<explanation enclist="sunpk_mz_z_4" symboldefcount="1">
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<symbol link="sa_zn2"><Zn2></symbol>
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<account encodedin="Zn">
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<intro>
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<para>Is the name of the second scalable vector register of a multi-vector sequence, encoded as "Zn" times 2 plus 1.</para>
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</intro>
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</account>
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</explanation>
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</explanations>
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<ps_section howmany="1">
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<ps name="SUNPK-MZ.Z-2" mylink="execute" enclabels="" sections="1" secttype="Operation">
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<pstext mayhavelinks="1" section="Execute" rep_section="execute"><a link="impl-aarch64.CheckStreamingSVEEnabled.0" file="shared_pseudocode.xml" hover="function: CheckStreamingSVEEnabled()">CheckStreamingSVEEnabled</a>();
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constant integer VL = <a link="impl-aarch64.CurrentVL.read.none" file="shared_pseudocode.xml" hover="accessor: integer CurrentVL">CurrentVL</a>;
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constant integer elements = VL DIV esize;
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constant integer hsize = esize DIV 2;
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constant integer sreg = nreg DIV 2;
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array [0..3] of bits(VL) results;
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for r = 0 to sreg-1
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bits(VL) operand = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[n+r, VL];
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for i = 0 to 1
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for e = 0 to elements-1
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bits(hsize) element = <a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[operand, i*elements + e, hsize];
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<a link="impl-shared.Elem.write.3" file="shared_pseudocode.xml" hover="accessor: Elem[bits(N) &vector, integer e, integer size] = bits(size) value">Elem</a>[results[2*r+i], e, esize] = <a link="impl-shared.Extend.3" file="shared_pseudocode.xml" hover="function: bits(N) Extend(bits(M) x, integer N, boolean unsigned)">Extend</a>(element, esize, unsigned);
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for r = 0 to nreg-1
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<a link="impl-aarch64.Z.write.2" file="shared_pseudocode.xml" hover="accessor: Z[integer n, integer width] = bits(width) value">Z</a>[d+r, VL] = results[r];</pstext>
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</ps>
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</ps_section>
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</instructionsection>
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