mirror of
https://github.com/pound-emu/ballistic.git
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193 lines
8.9 KiB
XML
193 lines
8.9 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
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<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<instructionsection id="uqcvt_z_mz4" title="UQCVT (four registers)" type="instruction">
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<docvars>
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<docvar key="instr-class" value="mortlach2" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="UQCVT" />
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</docvars>
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<heading>UQCVT (four registers)</heading>
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<desc>
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<brief>Multi-vector unsigned saturating extract narrow</brief>
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<description>
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<para>Saturate the unsigned integer value in each element of the four source vectors to quarter the orginal source element width, and place the results in the quarter-width destination elements.</para>
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<para>This instruction is unpredicated.</para>
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</description>
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<status>Green</status>
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<predicated>False</predicated>
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<sm_policy>SM_1_only</sm_policy>
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</desc>
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<alias_list howmany="0"></alias_list>
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<classes>
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<iclass name="SME2" oneof="1" id="iclass_mortlach2" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="instr-class" value="mortlach2" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="UQCVT" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<arch_variants>
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<arch_variant name="FEAT_SME2" feature="FEAT_SME2" />
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</arch_variants>
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<regdiagram form="32" psname="UQCVT-Z.MZ4-_" tworows="1">
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<box hibit="31" width="8" settings="8">
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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</box>
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<box hibit="23" name="sz" usename="1">
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<c></c>
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</box>
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<box hibit="22" name="op" settings="1">
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<c>0</c>
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</box>
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<box hibit="21" width="12" settings="12">
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="9" width="3" name="Zn" usename="1">
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<c colspan="3"></c>
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</box>
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<box hibit="6" name="N" usename="1" settings="1">
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<c>0</c>
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</box>
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<box hibit="5" name="U" usename="1" settings="1">
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<c>1</c>
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</box>
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<box hibit="4" width="5" name="Zd" usename="1">
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<c colspan="5"></c>
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</box>
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</regdiagram>
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<encoding name="uqcvt_z_mz4_" oneofinclass="1" oneof="1" label="">
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<docvars>
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<docvar key="instr-class" value="mortlach2" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="UQCVT" />
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</docvars>
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<asmtemplate><text>UQCVT </text><a link="sa_zd" hover="Destination scalable vector register (field "Zd")"><Zd></a><text>.</text><a link="sa_t" hover="Size specifier (field "sz") [B,H]"><T></a><text>, </text><text>{</text><text> </text><a link="sa_zn1" hover="First scalable vector register of a multi-vector sequence (field Zn)"><Zn1></a><text>.</text><a link="sa_tb" hover="Size specifier (field "sz") [D,S]"><Tb></a><text>-</text><a link="sa_zn4" hover="Fourth scalable vector register of a multi-vector sequence (field Zn)"><Zn4></a><text>.</text><a link="sa_tb" hover="Size specifier (field "sz") [D,S]"><Tb></a><text> </text><text>}</text></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="UQCVT-Z.MZ4-_" mylink="UQCVT-Z.MZ4-_" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSME2.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME2()">HaveSME2</a>() then UNDEFINED;
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constant integer esize = 8 << <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(sz);
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integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zn:'00');
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integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zd);</pstext>
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</ps>
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</ps_section>
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</iclass>
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</classes>
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<explanations scope="all">
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<explanation enclist="uqcvt_z_mz4_" symboldefcount="1">
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<symbol link="sa_zd"><Zd></symbol>
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<account encodedin="Zd">
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<intro>
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<para>Is the name of the destination scalable vector register, encoded in the "Zd" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="uqcvt_z_mz4_" symboldefcount="1">
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<symbol link="sa_t"><T></symbol>
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<definition encodedin="sz">
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<intro>Is the size specifier, </intro>
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<table class="valuetable">
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<tgroup cols="2">
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<thead>
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<row>
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<entry class="bitfield">sz</entry>
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<entry class="symbol"><T></entry>
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</row>
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</thead>
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<tbody>
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<row>
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<entry class="bitfield">0</entry>
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<entry class="symbol">B</entry>
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</row>
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<row>
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<entry class="bitfield">1</entry>
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<entry class="symbol">H</entry>
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</row>
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</tbody>
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</tgroup>
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</table>
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</definition>
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</explanation>
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<explanation enclist="uqcvt_z_mz4_" symboldefcount="1">
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<symbol link="sa_zn1"><Zn1></symbol>
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<account encodedin="Zn">
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<intro>
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<para>Is the name of the first scalable vector register of a multi-vector sequence, encoded as "Zn" times 4.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="uqcvt_z_mz4_" symboldefcount="1">
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<symbol link="sa_tb"><Tb></symbol>
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<definition encodedin="sz">
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<intro>Is the size specifier, </intro>
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<table class="valuetable">
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<tgroup cols="2">
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<thead>
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<row>
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<entry class="bitfield">sz</entry>
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<entry class="symbol"><Tb></entry>
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</row>
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</thead>
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<tbody>
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<row>
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<entry class="bitfield">0</entry>
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<entry class="symbol">S</entry>
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</row>
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<row>
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<entry class="bitfield">1</entry>
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<entry class="symbol">D</entry>
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</row>
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</tbody>
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</tgroup>
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</table>
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</definition>
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</explanation>
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<explanation enclist="uqcvt_z_mz4_" symboldefcount="1">
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<symbol link="sa_zn4"><Zn4></symbol>
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<account encodedin="Zn">
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<intro>
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<para>Is the name of the fourth scalable vector register of a multi-vector sequence, encoded as "Zn" times 4 plus 3.</para>
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</intro>
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</account>
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</explanation>
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</explanations>
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<ps_section howmany="1">
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<ps name="UQCVT-Z.MZ4-_" mylink="execute" enclabels="" sections="1" secttype="Operation">
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<pstext mayhavelinks="1" section="Execute" rep_section="execute"><a link="impl-aarch64.CheckStreamingSVEEnabled.0" file="shared_pseudocode.xml" hover="function: CheckStreamingSVEEnabled()">CheckStreamingSVEEnabled</a>();
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constant integer VL = <a link="impl-aarch64.CurrentVL.read.none" file="shared_pseudocode.xml" hover="accessor: integer CurrentVL">CurrentVL</a>;
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constant integer elements = VL DIV (4 * esize);
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bits(VL) result;
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for r = 0 to 3
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bits(VL) operand = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[n+r, VL];
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for e = 0 to elements-1
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integer element = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(<a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[operand, e, 4 * esize]);
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<a link="impl-shared.Elem.write.3" file="shared_pseudocode.xml" hover="accessor: Elem[bits(N) &vector, integer e, integer size] = bits(size) value">Elem</a>[result, r*elements + e, esize] = <a link="impl-aarch32.UnsignedSat.2" file="shared_pseudocode.xml" hover="function: bits(N) UnsignedSat(integer i, integer N)">UnsignedSat</a>(element, esize);
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<a link="impl-aarch64.Z.write.2" file="shared_pseudocode.xml" hover="accessor: Z[integer n, integer width] = bits(width) value">Z</a>[d, VL] = result;</pstext>
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</ps>
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</ps_section>
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</instructionsection>
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