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archived-ballistic/spec/arm64_xml/adc.xml
Ronald Caesar 26a677f8b4 decoder: Add ARM specification docs
Signed-off-by: Ronald Caesar <github43132@proton.me>
2025-12-12 18:11:36 -04:00

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<?xml version="1.0" encoding="utf-8"?>
<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
<instructionsection id="ADC" title="ADC -- A64" type="instruction">
<docvars>
<docvar key="cond-setting" value="no-s" />
<docvar key="instr-class" value="general" />
<docvar key="isa" value="A64" />
<docvar key="mnemonic" value="ADC" />
</docvars>
<heading>ADC</heading>
<desc>
<brief>
<para>Add with Carry</para>
</brief>
<authored>
<para>Add with Carry adds two register values and the Carry flag value, and writes the result to the destination register.</para>
</authored>
</desc>
<operationalnotes>
<para>If PSTATE.DIT is 1:</para>
<list type="unordered">
<listitem><content>The execution time of this instruction is independent of:<list type="unordered"><listitem><content>The values of the data supplied in any of its registers.</content></listitem><listitem><content>The values of the NZCV flags.</content></listitem></list></content></listitem>
<listitem><content>The response of this instruction to asynchronous exceptions does not vary based on:<list type="unordered"><listitem><content>The values of the data supplied in any of its registers.</content></listitem><listitem><content>The values of the NZCV flags.</content></listitem></list></content></listitem>
</list>
</operationalnotes>
<alias_list howmany="0"></alias_list>
<classes>
<iclass name="Not setting the condition flags" oneof="1" id="iclass_no_s" no_encodings="2" isa="A64">
<docvars>
<docvar key="cond-setting" value="no-s" />
<docvar key="instr-class" value="general" />
<docvar key="isa" value="A64" />
<docvar key="mnemonic" value="ADC" />
</docvars>
<iclassintro count="2"></iclassintro>
<regdiagram form="32" psname="aarch64/instrs/integer/arithmetic/add-sub/carry" tworows="1">
<box hibit="31" name="sf" usename="1">
<c></c>
</box>
<box hibit="30" name="op" usename="1" settings="1" psbits="x">
<c>0</c>
</box>
<box hibit="29" name="S" usename="1" settings="1" psbits="x">
<c>0</c>
</box>
<box hibit="28" width="8" settings="8">
<c>1</c>
<c>1</c>
<c>0</c>
<c>1</c>
<c>0</c>
<c>0</c>
<c>0</c>
<c>0</c>
</box>
<box hibit="20" width="5" name="Rm" usename="1">
<c colspan="5"></c>
</box>
<box hibit="15" width="6" settings="6">
<c>0</c>
<c>0</c>
<c>0</c>
<c>0</c>
<c>0</c>
<c>0</c>
</box>
<box hibit="9" width="5" name="Rn" usename="1">
<c colspan="5"></c>
</box>
<box hibit="4" width="5" name="Rd" usename="1">
<c colspan="5"></c>
</box>
</regdiagram>
<encoding name="ADC_32_addsub_carry" oneofinclass="2" oneof="2" label="32-bit" bitdiffs="sf == 0">
<docvars>
<docvar key="cond-setting" value="no-s" />
<docvar key="datatype" value="32" />
<docvar key="instr-class" value="general" />
<docvar key="isa" value="A64" />
<docvar key="mnemonic" value="ADC" />
</docvars>
<box hibit="31" width="1" name="sf">
<c>0</c>
</box>
<asmtemplate><text>ADC </text><a link="sa_wd" hover="32-bit general-purpose destination register (field &quot;Rd&quot;)">&lt;Wd&gt;</a><text>, </text><a link="sa_wn" hover="First 32-bit general-purpose source register (field &quot;Rn&quot;)">&lt;Wn&gt;</a><text>, </text><a link="sa_wm" hover="Second 32-bit general-purpose source register (field &quot;Rm&quot;)">&lt;Wm&gt;</a></asmtemplate>
</encoding>
<encoding name="ADC_64_addsub_carry" oneofinclass="2" oneof="2" label="64-bit" bitdiffs="sf == 1">
<docvars>
<docvar key="cond-setting" value="no-s" />
<docvar key="datatype" value="64" />
<docvar key="instr-class" value="general" />
<docvar key="isa" value="A64" />
<docvar key="mnemonic" value="ADC" />
</docvars>
<box hibit="31" width="1" name="sf">
<c>1</c>
</box>
<asmtemplate><text>ADC </text><a link="sa_xd" hover="64-bit general-purpose destination register (field &quot;Rd&quot;)">&lt;Xd&gt;</a><text>, </text><a link="sa_xn" hover="First 64-bit general-purpose source register (field &quot;Rn&quot;)">&lt;Xn&gt;</a><text>, </text><a link="sa_xm" hover="Second 64-bit general-purpose source register (field &quot;Rm&quot;)">&lt;Xm&gt;</a></asmtemplate>
</encoding>
<ps_section howmany="1">
<ps name="aarch64/instrs/integer/arithmetic/add-sub/carry" mylink="aarch64.instrs.integer.arithmetic.add-sub.carry" enclabels="" sections="1" secttype="noheading">
<pstext mayhavelinks="1" section="Decode" rep_section="decode">integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rd);
integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rn);
integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rm);
integer datasize = if sf == '1' then 64 else 32;
boolean sub_op = (op == '1');
boolean setflags = (S == '1');</pstext>
</ps>
</ps_section>
</iclass>
</classes>
<explanations scope="all">
<explanation enclist="ADC_32_addsub_carry" symboldefcount="1">
<symbol link="sa_wd">&lt;Wd&gt;</symbol>
<account encodedin="Rd">
<intro>
<para>Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field.</para>
</intro>
</account>
</explanation>
<explanation enclist="ADC_32_addsub_carry" symboldefcount="1">
<symbol link="sa_wn">&lt;Wn&gt;</symbol>
<account encodedin="Rn">
<intro>
<para>Is the 32-bit name of the first general-purpose source register, encoded in the "Rn" field.</para>
</intro>
</account>
</explanation>
<explanation enclist="ADC_32_addsub_carry" symboldefcount="1">
<symbol link="sa_wm">&lt;Wm&gt;</symbol>
<account encodedin="Rm">
<intro>
<para>Is the 32-bit name of the second general-purpose source register, encoded in the "Rm" field.</para>
</intro>
</account>
</explanation>
<explanation enclist="ADC_64_addsub_carry" symboldefcount="1">
<symbol link="sa_xd">&lt;Xd&gt;</symbol>
<account encodedin="Rd">
<intro>
<para>Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field.</para>
</intro>
</account>
</explanation>
<explanation enclist="ADC_64_addsub_carry" symboldefcount="1">
<symbol link="sa_xn">&lt;Xn&gt;</symbol>
<account encodedin="Rn">
<intro>
<para>Is the 64-bit name of the first general-purpose source register, encoded in the "Rn" field.</para>
</intro>
</account>
</explanation>
<explanation enclist="ADC_64_addsub_carry" symboldefcount="1">
<symbol link="sa_xm">&lt;Xm&gt;</symbol>
<account encodedin="Rm">
<intro>
<para>Is the 64-bit name of the second general-purpose source register, encoded in the "Rm" field.</para>
</intro>
</account>
</explanation>
</explanations>
<ps_section howmany="1">
<ps name="aarch64/instrs/integer/arithmetic/add-sub/carry" mylink="execute" enclabels="" sections="1" secttype="Operation">
<pstext mayhavelinks="1" section="Execute" rep_section="execute">bits(datasize) result;
bits(datasize) operand1 = <a link="impl-aarch64.X.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) X[integer n, integer width]">X</a>[n, datasize];
bits(datasize) operand2 = <a link="impl-aarch64.X.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) X[integer n, integer width]">X</a>[m, datasize];
bits(4) nzcv;
if sub_op then
operand2 = NOT(operand2);
(result, nzcv) = <a link="impl-shared.AddWithCarry.3" file="shared_pseudocode.xml" hover="function: (bits(N), bits(4)) AddWithCarry(bits(N) x, bits(N) y, bit carry_in)">AddWithCarry</a>(operand1, operand2, PSTATE.C);
if setflags then
PSTATE.&lt;N,Z,C,V&gt; = nzcv;
<a link="impl-aarch64.X.write.2" file="shared_pseudocode.xml" hover="accessor: X[integer n, integer width] = bits(width) value">X</a>[d, datasize] = result;</pstext>
</ps>
</ps_section>
</instructionsection>