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327 lines
22 KiB
XML
327 lines
22 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
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<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<instructionsection id="DSB" title="DSB -- A64" type="instruction">
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<docvars>
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<docvar key="instr-class" value="system" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="DSB" />
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</docvars>
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<heading>DSB</heading>
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<desc>
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<brief>
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<para>Data Synchronization Barrier</para>
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</brief>
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<authored>
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<para>Data Synchronization Barrier is a memory barrier that ensures the completion of memory accesses, see <xref linkend="BEICEFJH">Data Synchronization Barrier</xref>.</para>
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<para>A DSB instruction with the nXS qualifier is complete when the subset of these memory accesses with the XS attribute set to 0 are complete. It does not require that memory accesses with the XS attribute set to 1 are complete.</para>
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</authored>
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</desc>
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<alias_list howmany="2">
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<alias_list_intro>This instruction is used by the aliases </alias_list_intro>
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<aliasref aliaspageid="PSSBB_DSB" aliasfile="pssbb_dsb.xml" hover="Physical Speculative Store Bypass Barrier" punct=" and ">
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<text>PSSBB</text>
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<aliaspref>CRm == '0100'</aliaspref>
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</aliasref>
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<aliasref aliaspageid="SSBB_DSB" aliasfile="ssbb_dsb.xml" hover="Speculative Store Bypass Barrier" punct=".">
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<text>SSBB</text>
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<aliaspref>CRm == '0000'</aliaspref>
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</aliasref>
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<alias_list_outro>
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<text> See </text>
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<aliastablelink />
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<text> below for details of when each alias is preferred.</text>
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</alias_list_outro>
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</alias_list>
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<classes>
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<classesintro count="2">
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<txt>It has encodings from 2 classes:</txt>
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<a href="#iclass_dsb_memory">Memory barrier</a>
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<txt> and </txt>
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<a href="#iclass_dsb_nxs">Memory nXS barrier</a>
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</classesintro>
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<iclass name="Memory barrier" oneof="2" id="iclass_dsb_memory" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="dsb-variants" value="dsb-memory" />
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<docvar key="instr-class" value="system" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="DSB" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<regdiagram form="32" psname="aarch64/instrs/system/barriers/dsb" tworows="1">
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<box hibit="31" width="10" settings="10">
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="21" name="L" settings="1">
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<c>0</c>
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</box>
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<box hibit="20" width="2" name="op0" settings="2">
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="18" width="3" name="op1" settings="3">
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<c>0</c>
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<c>1</c>
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<c>1</c>
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</box>
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<box hibit="15" width="4" name="CRn" settings="4">
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>1</c>
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</box>
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<box hibit="11" width="4" name="CRm" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="7" name="op2[2]" settings="1">
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<c>1</c>
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</box>
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<box hibit="6" width="2" name="opc" usename="1" settings="2" psbits="xx">
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="4" width="5" name="Rt" settings="5">
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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</box>
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</regdiagram>
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<encoding name="DSB_BO_barriers" oneofinclass="1" oneof="2" label="">
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<docvars>
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<docvar key="dsb-variants" value="dsb-memory" />
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<docvar key="instr-class" value="system" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="DSB" />
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</docvars>
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<asmtemplate><text>DSB </text><a link="sa_option" hover="Specifies the limitation on the barrier operation"><option></a><text>|#</text><a link="sa_imm" hover="4-bit unsigned immediate [0-15] (field "CRm")"><imm></a></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="aarch64/instrs/system/barriers/dsb" mylink="aarch64.instrs.system.barriers.dsb" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">boolean nXS = FALSE;
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<a link="DSBAlias" file="shared_pseudocode.xml" hover="enumeration DSBAlias {DSBAlias_SSBB, DSBAlias_PSSBB, DSBAlias_DSB}">DSBAlias</a> alias;
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case CRm of
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when '0000' alias = <a link="DSBAlias_SSBB" file="shared_pseudocode.xml" hover="enumeration DSBAlias {DSBAlias_SSBB, DSBAlias_PSSBB, DSBAlias_DSB}">DSBAlias_SSBB</a>;
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when '0100' alias = <a link="DSBAlias_PSSBB" file="shared_pseudocode.xml" hover="enumeration DSBAlias {DSBAlias_SSBB, DSBAlias_PSSBB, DSBAlias_DSB}">DSBAlias_PSSBB</a>;
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otherwise alias = <a link="DSBAlias_DSB" file="shared_pseudocode.xml" hover="enumeration DSBAlias {DSBAlias_SSBB, DSBAlias_PSSBB, DSBAlias_DSB}">DSBAlias_DSB</a>;
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<a link="MBReqDomain" file="shared_pseudocode.xml" hover="enumeration MBReqDomain {MBReqDomain_Nonshareable, MBReqDomain_InnerShareable, MBReqDomain_OuterShareable, MBReqDomain_FullSystem}">MBReqDomain</a> domain;
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case CRm<3:2> of
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when '00' domain = <a link="MBReqDomain_OuterShareable" file="shared_pseudocode.xml" hover="enumeration MBReqDomain {MBReqDomain_Nonshareable, MBReqDomain_InnerShareable, MBReqDomain_OuterShareable, MBReqDomain_FullSystem}">MBReqDomain_OuterShareable</a>;
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when '01' domain = <a link="MBReqDomain_Nonshareable" file="shared_pseudocode.xml" hover="enumeration MBReqDomain {MBReqDomain_Nonshareable, MBReqDomain_InnerShareable, MBReqDomain_OuterShareable, MBReqDomain_FullSystem}">MBReqDomain_Nonshareable</a>;
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when '10' domain = <a link="MBReqDomain_InnerShareable" file="shared_pseudocode.xml" hover="enumeration MBReqDomain {MBReqDomain_Nonshareable, MBReqDomain_InnerShareable, MBReqDomain_OuterShareable, MBReqDomain_FullSystem}">MBReqDomain_InnerShareable</a>;
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when '11' domain = <a link="MBReqDomain_FullSystem" file="shared_pseudocode.xml" hover="enumeration MBReqDomain {MBReqDomain_Nonshareable, MBReqDomain_InnerShareable, MBReqDomain_OuterShareable, MBReqDomain_FullSystem}">MBReqDomain_FullSystem</a>;
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<a link="MBReqTypes" file="shared_pseudocode.xml" hover="enumeration MBReqTypes {MBReqTypes_Reads, MBReqTypes_Writes, MBReqTypes_All}">MBReqTypes</a> types;
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case CRm<1:0> of
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when '00' types = <a link="MBReqTypes_All" file="shared_pseudocode.xml" hover="enumeration MBReqTypes {MBReqTypes_Reads, MBReqTypes_Writes, MBReqTypes_All}">MBReqTypes_All</a>; domain = <a link="MBReqDomain_FullSystem" file="shared_pseudocode.xml" hover="enumeration MBReqDomain {MBReqDomain_Nonshareable, MBReqDomain_InnerShareable, MBReqDomain_OuterShareable, MBReqDomain_FullSystem}">MBReqDomain_FullSystem</a>;
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when '01' types = <a link="MBReqTypes_Reads" file="shared_pseudocode.xml" hover="enumeration MBReqTypes {MBReqTypes_Reads, MBReqTypes_Writes, MBReqTypes_All}">MBReqTypes_Reads</a>;
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when '10' types = <a link="MBReqTypes_Writes" file="shared_pseudocode.xml" hover="enumeration MBReqTypes {MBReqTypes_Reads, MBReqTypes_Writes, MBReqTypes_All}">MBReqTypes_Writes</a>;
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when '11' types = <a link="MBReqTypes_All" file="shared_pseudocode.xml" hover="enumeration MBReqTypes {MBReqTypes_Reads, MBReqTypes_Writes, MBReqTypes_All}">MBReqTypes_All</a>;</pstext>
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</ps>
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</ps_section>
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</iclass>
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<iclass name="Memory nXS barrier" oneof="2" id="iclass_dsb_nxs" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="dsb-variants" value="dsb-nxs" />
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<docvar key="instr-class" value="system" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="DSB" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<arch_variants>
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<arch_variant name="ARMv8.7" feature="FEAT_XS" />
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</arch_variants>
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<regdiagram form="32" psname="aarch64/instrs/system/barriers/dsb/nxs">
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<box hibit="31" width="20" settings="20">
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>1</c>
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</box>
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<box hibit="11" width="2" name="imm2" usename="1">
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<c colspan="2"></c>
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</box>
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<box hibit="9" width="2" settings="2">
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="7" name="op2<2>" settings="1">
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<c>0</c>
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</box>
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<box hibit="6" width="2" name="op2<1:0>" settings="2">
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<c>0</c>
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<c>1</c>
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</box>
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<box hibit="4" width="5" name="Rt" settings="5">
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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</box>
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</regdiagram>
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<encoding name="DSB_BOn_barriers" oneofinclass="1" oneof="2" label="">
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<docvars>
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<docvar key="dsb-variants" value="dsb-nxs" />
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<docvar key="instr-class" value="system" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="DSB" />
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</docvars>
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<asmtemplate><text>DSB </text><a link="sa_option_1" hover="Specifies the limitation on the barrier operation"><option></a><text>nXS</text></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="aarch64/instrs/system/barriers/dsb/nxs" mylink="aarch64.instrs.system.barriers.dsb.nxs" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-shared.HaveFeatXS.0" file="shared_pseudocode.xml" hover="function: boolean HaveFeatXS()">HaveFeatXS</a>() then UNDEFINED;
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<a link="MBReqTypes" file="shared_pseudocode.xml" hover="enumeration MBReqTypes {MBReqTypes_Reads, MBReqTypes_Writes, MBReqTypes_All}">MBReqTypes</a> types = <a link="MBReqTypes_All" file="shared_pseudocode.xml" hover="enumeration MBReqTypes {MBReqTypes_Reads, MBReqTypes_Writes, MBReqTypes_All}">MBReqTypes_All</a>;
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boolean nXS = TRUE;
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<a link="DSBAlias" file="shared_pseudocode.xml" hover="enumeration DSBAlias {DSBAlias_SSBB, DSBAlias_PSSBB, DSBAlias_DSB}">DSBAlias</a> alias = <a link="DSBAlias_DSB" file="shared_pseudocode.xml" hover="enumeration DSBAlias {DSBAlias_SSBB, DSBAlias_PSSBB, DSBAlias_DSB}">DSBAlias_DSB</a>;
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<a link="MBReqDomain" file="shared_pseudocode.xml" hover="enumeration MBReqDomain {MBReqDomain_Nonshareable, MBReqDomain_InnerShareable, MBReqDomain_OuterShareable, MBReqDomain_FullSystem}">MBReqDomain</a> domain;
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case imm2 of
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when '00' domain = <a link="MBReqDomain_OuterShareable" file="shared_pseudocode.xml" hover="enumeration MBReqDomain {MBReqDomain_Nonshareable, MBReqDomain_InnerShareable, MBReqDomain_OuterShareable, MBReqDomain_FullSystem}">MBReqDomain_OuterShareable</a>;
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when '01' domain = <a link="MBReqDomain_Nonshareable" file="shared_pseudocode.xml" hover="enumeration MBReqDomain {MBReqDomain_Nonshareable, MBReqDomain_InnerShareable, MBReqDomain_OuterShareable, MBReqDomain_FullSystem}">MBReqDomain_Nonshareable</a>;
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when '10' domain = <a link="MBReqDomain_InnerShareable" file="shared_pseudocode.xml" hover="enumeration MBReqDomain {MBReqDomain_Nonshareable, MBReqDomain_InnerShareable, MBReqDomain_OuterShareable, MBReqDomain_FullSystem}">MBReqDomain_InnerShareable</a>;
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when '11' domain = <a link="MBReqDomain_FullSystem" file="shared_pseudocode.xml" hover="enumeration MBReqDomain {MBReqDomain_Nonshareable, MBReqDomain_InnerShareable, MBReqDomain_OuterShareable, MBReqDomain_FullSystem}">MBReqDomain_FullSystem</a>;</pstext>
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</ps>
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</ps_section>
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</iclass>
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</classes>
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<explanations scope="all">
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<explanation enclist="DSB_BO_barriers" symboldefcount="1">
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<symbol link="sa_option"><option></symbol>
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<account encodedin="">
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<docvars>
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<docvar key="dsb-variants" value="dsb-memory" />
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</docvars>
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<intro>
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<para>For the memory barrier variant: specifies the limitation on the barrier operation. Values are:</para>
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<list type="param">
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<listitem>
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<param>SY</param><content>Full system is the required shareability domain, reads and writes are the required access types, both before and after the barrier instruction. This option is referred to as the full system barrier. Encoded as CRm = <binarynumber>0b1111</binarynumber>.</content>
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</listitem>
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<listitem>
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<param>ST</param><content>Full system is the required shareability domain, writes are the required access type, both before and after the barrier instruction. Encoded as CRm = <binarynumber>0b1110</binarynumber>.</content>
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</listitem>
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<listitem>
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<param>LD</param><content>Full system is the required shareability domain, reads are the required access type before the barrier instruction, and reads and writes are the required access types after the barrier instruction. Encoded as CRm = <binarynumber>0b1101</binarynumber>.</content>
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</listitem>
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<listitem>
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<param>ISH</param><content>Inner Shareable is the required shareability domain, reads and writes are the required access types, both before and after the barrier instruction. Encoded as CRm = <binarynumber>0b1011</binarynumber>.</content>
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</listitem>
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<listitem>
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<param>ISHST</param><content>Inner Shareable is the required shareability domain, writes are the required access type, both before and after the barrier instruction. Encoded as CRm = <binarynumber>0b1010</binarynumber>.</content>
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</listitem>
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<listitem>
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<param>ISHLD</param><content>Inner Shareable is the required shareability domain, reads are the required access type before the barrier instruction, and reads and writes are the required access types after the barrier instruction. Encoded as CRm = <binarynumber>0b1001</binarynumber>.</content>
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</listitem>
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<listitem>
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<param>NSH</param><content>Non-shareable is the required shareability domain, reads and writes are the required access, both before and after the barrier instruction. Encoded as CRm = <binarynumber>0b0111</binarynumber>.</content>
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</listitem>
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<listitem>
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<param>NSHST</param><content>Non-shareable is the required shareability domain, writes are the required access type, both before and after the barrier instruction. Encoded as CRm = <binarynumber>0b0110</binarynumber>.</content>
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</listitem>
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<listitem>
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<param>NSHLD</param><content>Non-shareable is the required shareability domain, reads are the required access type before the barrier instruction, and reads and writes are the required access types after the barrier instruction. Encoded as CRm = <binarynumber>0b0101</binarynumber>.</content>
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</listitem>
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<listitem>
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<param>OSH</param><content>Outer Shareable is the required shareability domain, reads and writes are the required access types, both before and after the barrier instruction. Encoded as CRm = <binarynumber>0b0011</binarynumber>.</content>
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</listitem>
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<listitem>
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<param>OSHST</param><content>Outer Shareable is the required shareability domain, writes are the required access type, both before and after the barrier instruction. Encoded as CRm = <binarynumber>0b0010</binarynumber>.</content>
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</listitem>
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<listitem>
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<param>OSHLD</param><content>Outer Shareable is the required shareability domain, reads are the required access type before the barrier instruction, and reads and writes are the required access types after the barrier instruction. Encoded as CRm = <binarynumber>0b0001</binarynumber>.</content>
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</listitem>
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</list>
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<para>All other encodings of <field>CRm</field>, other than the values <binarynumber>0b0000</binarynumber> and <binarynumber>0b0100</binarynumber>, that are not listed above are reserved, and can be encoded using the <syntax>#<imm></syntax> syntax. All unsupported and reserved options must execute as a full system barrier operation, but software must not rely on this behavior. For more information on whether an access is before or after a barrier instruction, see <xref linkend="BEIIECBH">Data Memory Barrier (DMB)</xref> or see <xref linkend="BEICEFJH">Data Synchronization Barrier (DSB)</xref>.</para>
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<note>
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<para>The value <binarynumber>0b0000</binarynumber> is used to encode SSBB and the value <binarynumber>0b0100</binarynumber> is used to encode PSSBB.</para>
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</note>
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</intro>
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</account>
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</explanation>
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<explanation enclist="DSB_BOn_barriers" symboldefcount="2">
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<symbol link="sa_option_1"><option></symbol>
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<account encodedin="">
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<docvars>
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<docvar key="dsb-variants" value="dsb-nxs" />
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</docvars>
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<intro>
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<para>For the memory nXS barrier variant: specifies the limitation on the barrier operation. Values are:</para>
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<list type="param">
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<listitem>
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<param>SY</param><content>Full system is the required shareability domain, reads and writes are the required access types, both before and after the barrier instruction. This option is referred to as the full system barrier. Encoded as imm2 = <binarynumber>0b11</binarynumber>.</content>
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</listitem>
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<listitem>
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<param>ISH</param><content>Inner Shareable is the required shareability domain, reads and writes are the required access types, both before and after the barrier instruction. Encoded as imm2 = <binarynumber>0b10</binarynumber>.</content>
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</listitem>
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<listitem>
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<param>NSH</param><content>Non-shareable is the required shareability domain, reads and writes are the required access, both before and after the barrier instruction. Encoded as imm2 = <binarynumber>0b01</binarynumber>.</content>
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</listitem>
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<listitem>
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<param>OSH</param><content>Outer Shareable is the required shareability domain, reads and writes are the required access types, both before and after the barrier instruction. Encoded as imm2 = <binarynumber>0b00</binarynumber>.</content>
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</listitem>
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</list>
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</intro>
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</account>
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</explanation>
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<explanation enclist="DSB_BO_barriers" symboldefcount="1">
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<symbol link="sa_imm"><imm></symbol>
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<account encodedin="CRm">
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<intro>
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<para>Is a 4-bit unsigned immediate, in the range 0 to 15, encoded in the "CRm" field.</para>
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</intro>
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</account>
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</explanation>
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</explanations>
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<aliastablehook anchor="aliasconditions">Alias Conditions</aliastablehook>
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<ps_section howmany="1">
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<ps name="aarch64/instrs/system/barriers/dsb" mylink="execute" enclabels="" sections="1" secttype="Operation">
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<pstext mayhavelinks="1" section="Execute" rep_section="execute">case alias of
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when <a link="DSBAlias_SSBB" file="shared_pseudocode.xml" hover="enumeration DSBAlias {DSBAlias_SSBB, DSBAlias_PSSBB, DSBAlias_DSB}">DSBAlias_SSBB</a>
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<a link="impl-shared.SpeculativeStoreBypassBarrierToVA.0" file="shared_pseudocode.xml" hover="function: SpeculativeStoreBypassBarrierToVA()">SpeculativeStoreBypassBarrierToVA</a>();
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when <a link="DSBAlias_PSSBB" file="shared_pseudocode.xml" hover="enumeration DSBAlias {DSBAlias_SSBB, DSBAlias_PSSBB, DSBAlias_DSB}">DSBAlias_PSSBB</a>
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<a link="impl-shared.SpeculativeStoreBypassBarrierToPA.0" file="shared_pseudocode.xml" hover="function: SpeculativeStoreBypassBarrierToPA()">SpeculativeStoreBypassBarrierToPA</a>();
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when <a link="DSBAlias_DSB" file="shared_pseudocode.xml" hover="enumeration DSBAlias {DSBAlias_SSBB, DSBAlias_PSSBB, DSBAlias_DSB}">DSBAlias_DSB</a>
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if <a link="impl-shared.HaveTME.0" file="shared_pseudocode.xml" hover="function: boolean HaveTME()">HaveTME</a>() && TSTATE.depth > 0 then
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<a link="impl-aarch64.FailTransaction.2" file="shared_pseudocode.xml" hover="function: FailTransaction(TMFailure cause, boolean retry)">FailTransaction</a>(<a link="TMFailure_ERR" file="shared_pseudocode.xml" hover="enumeration TMFailure { TMFailure_CNCL, TMFailure_DBG, TMFailure_ERR, TMFailure_NEST, TMFailure_SIZE, TMFailure_MEM, TMFailure_TRIVIAL, TMFailure_IMP }">TMFailure_ERR</a>, FALSE);
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if !nXS && <a link="impl-shared.HaveFeatXS.0" file="shared_pseudocode.xml" hover="function: boolean HaveFeatXS()">HaveFeatXS</a>() then
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nXS = PSTATE.EL IN {<a link="EL0" file="shared_pseudocode.xml" hover="constant bits(2) EL0 = '00'">EL0</a>, <a link="EL1" file="shared_pseudocode.xml" hover="constant bits(2) EL1 = '01'">EL1</a>} && <a link="impl-aarch64.IsHCRXEL2Enabled.0" file="shared_pseudocode.xml" hover="function: boolean IsHCRXEL2Enabled()">IsHCRXEL2Enabled</a>() && HCRX_EL2.FnXS == '1';
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<a link="impl-shared.DataSynchronizationBarrier.3" file="shared_pseudocode.xml" hover="function: DataSynchronizationBarrier(MBReqDomain domain, MBReqTypes types, boolean nXS)">DataSynchronizationBarrier</a>(domain, types, nXS);
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otherwise
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<a link="impl-shared.Unreachable.0" file="shared_pseudocode.xml" hover="function: Unreachable()">Unreachable</a>();</pstext>
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</ps>
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</ps_section>
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</instructionsection>
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