mirror of
https://github.com/pound-emu/ballistic.git
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159 lines
8.7 KiB
XML
159 lines
8.7 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
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<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<instructionsection id="TSTART" title="TSTART -- A64" type="instruction">
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<docvars>
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<docvar key="instr-class" value="system" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="TSTART" />
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</docvars>
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<heading>TSTART</heading>
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<desc>
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<brief>
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<para>Start transaction</para>
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</brief>
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<authored>
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<para>This instruction starts a new transaction. If the transaction started successfully, the destination register is set to zero. If the transaction failed or was canceled, then all state modifications that were performed transactionally are discarded and the destination register is written with a non-zero value that encodes the cause of the failure.</para>
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</authored>
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</desc>
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<alias_list howmany="0"></alias_list>
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<classes>
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<iclass name="System" oneof="1" id="iclass_system" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="instr-class" value="system" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="TSTART" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<arch_variants>
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<arch_variant name="FEAT_TME" feature="FEAT_TME" />
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</arch_variants>
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<regdiagram form="32" psname="aarch64/instrs/system/tme/tstart">
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<box hibit="31" width="10" settings="10">
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="21" name="L" settings="1">
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<c>1</c>
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</box>
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<box hibit="20" width="2" name="op0" settings="2">
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="18" width="3" name="op1" settings="3">
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<c>0</c>
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<c>1</c>
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<c>1</c>
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</box>
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<box hibit="15" width="4" name="CRn" settings="4">
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>1</c>
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</box>
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<box hibit="11" width="4" name="CRm" settings="4">
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="7" width="3" name="op2" settings="3">
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<c>0</c>
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<c>1</c>
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<c>1</c>
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</box>
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<box hibit="4" width="5" name="Rt" usename="1">
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<c colspan="5"></c>
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</box>
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</regdiagram>
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<encoding name="TSTART_BR_systemresult" oneofinclass="1" oneof="1" label="">
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<docvars>
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<docvar key="instr-class" value="system" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="TSTART" />
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</docvars>
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<asmtemplate><text>TSTART </text><a link="sa_xt" hover="64-bit general-purpose destination register (field "Rt")"><Xt></a></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="aarch64/instrs/system/tme/tstart" mylink="aarch64.instrs.system.tme.tstart" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-shared.HaveTME.0" file="shared_pseudocode.xml" hover="function: boolean HaveTME()">HaveTME</a>() then UNDEFINED;
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integer t = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rt);</pstext>
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</ps>
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</ps_section>
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</iclass>
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</classes>
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<explanations scope="all">
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<explanation enclist="TSTART_BR_systemresult" symboldefcount="1">
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<symbol link="sa_xt"><Xt></symbol>
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<account encodedin="Rt">
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<intro>
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<para>Is the 64-bit name of the general-purpose destination register, encoded in the "Rt" field.</para>
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</intro>
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</account>
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</explanation>
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</explanations>
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<ps_section howmany="1">
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<ps name="aarch64/instrs/system/tme/tstart" mylink="execute" enclabels="" sections="1" secttype="Operation">
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<pstext mayhavelinks="1" section="Execute" rep_section="execute">if !<a link="impl-aarch64.IsTMEEnabled.0" file="shared_pseudocode.xml" hover="function: boolean IsTMEEnabled()">IsTMEEnabled</a>() then UNDEFINED;
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boolean IsEL1Regime;
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bit tme;
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bit tmt;
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case PSTATE.EL of
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when <a link="EL0" file="shared_pseudocode.xml" hover="constant bits(2) EL0 = '00'">EL0</a>
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IsEL1Regime = <a link="impl-shared.S1TranslationRegime.0" file="shared_pseudocode.xml" hover="function: bits(2) S1TranslationRegime()">S1TranslationRegime</a>() == <a link="EL1" file="shared_pseudocode.xml" hover="constant bits(2) EL1 = '01'">EL1</a>;
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if IsEL1Regime then
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tme = SCTLR_EL1.TME0;
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tmt = SCTLR_EL1.TMT0;
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else
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tme = SCTLR_EL2.TME0;
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tmt = SCTLR_EL2.TMT0;
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when <a link="EL1" file="shared_pseudocode.xml" hover="constant bits(2) EL1 = '01'">EL1</a>
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tme = SCTLR_EL1.TME;
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tmt = SCTLR_EL1.TMT;
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when <a link="EL2" file="shared_pseudocode.xml" hover="constant bits(2) EL2 = '10'">EL2</a>
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tme = SCTLR_EL2.TME;
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tmt = SCTLR_EL2.TMT;
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when <a link="EL3" file="shared_pseudocode.xml" hover="constant bits(2) EL3 = '11'">EL3</a>
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tme = SCTLR_EL3.TME;
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tmt = SCTLR_EL3.TMT;
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otherwise
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<a link="impl-shared.Unreachable.0" file="shared_pseudocode.xml" hover="function: Unreachable()">Unreachable</a>();
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enable = tme == '1';
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trivial = tmt == '1';
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if !enable then
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<a link="impl-aarch64.TransactionStartTrap.1" file="shared_pseudocode.xml" hover="function: TransactionStartTrap(integer dreg)">TransactionStartTrap</a>(t);
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elsif trivial then
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TSTATE.nPC = <a link="impl-shared.NextInstrAddr.1" file="shared_pseudocode.xml" hover="function: bits(N) NextInstrAddr(integer N)">NextInstrAddr</a>(64);
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TSTATE.Rt = t;
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<a link="impl-aarch64.FailTransaction.2" file="shared_pseudocode.xml" hover="function: FailTransaction(TMFailure cause, boolean retry)">FailTransaction</a>(<a link="TMFailure_TRIVIAL" file="shared_pseudocode.xml" hover="enumeration TMFailure { TMFailure_CNCL, TMFailure_DBG, TMFailure_ERR, TMFailure_NEST, TMFailure_SIZE, TMFailure_MEM, TMFailure_TRIVIAL, TMFailure_IMP }">TMFailure_TRIVIAL</a>, FALSE);
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elsif <a link="impl-aarch64.HaveSME.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME()">HaveSME</a>() && PSTATE.SM == '1' then
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<a link="impl-aarch64.FailTransaction.2" file="shared_pseudocode.xml" hover="function: FailTransaction(TMFailure cause, boolean retry)">FailTransaction</a>(<a link="TMFailure_ERR" file="shared_pseudocode.xml" hover="enumeration TMFailure { TMFailure_CNCL, TMFailure_DBG, TMFailure_ERR, TMFailure_NEST, TMFailure_SIZE, TMFailure_MEM, TMFailure_TRIVIAL, TMFailure_IMP }">TMFailure_ERR</a>, FALSE);
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elsif TSTATE.depth == 255 then
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<a link="impl-aarch64.FailTransaction.2" file="shared_pseudocode.xml" hover="function: FailTransaction(TMFailure cause, boolean retry)">FailTransaction</a>(<a link="TMFailure_NEST" file="shared_pseudocode.xml" hover="enumeration TMFailure { TMFailure_CNCL, TMFailure_DBG, TMFailure_ERR, TMFailure_NEST, TMFailure_SIZE, TMFailure_MEM, TMFailure_TRIVIAL, TMFailure_IMP }">TMFailure_NEST</a>, FALSE);
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elsif TSTATE.depth == 0 then
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TSTATE.nPC = <a link="impl-shared.NextInstrAddr.1" file="shared_pseudocode.xml" hover="function: bits(N) NextInstrAddr(integer N)">NextInstrAddr</a>(64);
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TSTATE.Rt = t;
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<a link="impl-shared.ClearExclusiveLocal.1" file="shared_pseudocode.xml" hover="function: ClearExclusiveLocal(integer processorid)">ClearExclusiveLocal</a>(<a link="impl-shared.ProcessorID.0" file="shared_pseudocode.xml" hover="function: integer ProcessorID()">ProcessorID</a>());
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<a link="impl-aarch64.TakeTransactionCheckpoint.0" file="shared_pseudocode.xml" hover="function: TakeTransactionCheckpoint()">TakeTransactionCheckpoint</a>();
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<a link="impl-aarch64.StartTrackingTransactionalReadsWrites.0" file="shared_pseudocode.xml" hover="function: StartTrackingTransactionalReadsWrites()">StartTrackingTransactionalReadsWrites</a>();
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TSTATE.depth = TSTATE.depth + 1;
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<a link="impl-aarch64.X.write.2" file="shared_pseudocode.xml" hover="accessor: X[integer n, integer width] = bits(width) value">X</a>[t, 64] = <a link="impl-shared.Zeros.1" file="shared_pseudocode.xml" hover="function: bits(N) Zeros(integer N)">Zeros</a>(64);</pstext>
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</ps>
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</ps_section>
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</instructionsection>
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