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archived-ballistic/spec/arm64_xml/aesimc_advsimd.xml
Ronald Caesar 26a677f8b4 decoder: Add ARM specification docs
Signed-off-by: Ronald Caesar <github43132@proton.me>
2025-12-12 18:11:36 -04:00

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XML

<?xml version="1.0" encoding="utf-8"?>
<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
<instructionsection id="AESIMC_advsimd" title="AESIMC -- A64" type="instruction">
<docvars>
<docvar key="instr-class" value="advsimd" />
<docvar key="isa" value="A64" />
<docvar key="mnemonic" value="AESIMC" />
</docvars>
<heading>AESIMC</heading>
<desc>
<brief>
<para>AES inverse mix columns</para>
</brief>
<authored>
<para>AES inverse mix columns.</para>
</authored>
</desc>
<operationalnotes>
<para>If PSTATE.DIT is 1:</para>
<list type="unordered">
<listitem><content>The execution time of this instruction is independent of:<list type="unordered"><listitem><content>The values of the data supplied in any of its registers.</content></listitem><listitem><content>The values of the NZCV flags.</content></listitem></list></content></listitem>
<listitem><content>The response of this instruction to asynchronous exceptions does not vary based on:<list type="unordered"><listitem><content>The values of the data supplied in any of its registers.</content></listitem><listitem><content>The values of the NZCV flags.</content></listitem></list></content></listitem>
</list>
</operationalnotes>
<alias_list howmany="0"></alias_list>
<classes>
<iclass name="Advanced SIMD" oneof="1" id="iclass_advsimd" no_encodings="1" isa="A64">
<docvars>
<docvar key="instr-class" value="advsimd" />
<docvar key="isa" value="A64" />
<docvar key="mnemonic" value="AESIMC" />
</docvars>
<iclassintro count="1"></iclassintro>
<arch_variants>
<arch_variant name="ARMv8.0" feature="FEAT_AES" />
</arch_variants>
<regdiagram form="32" psname="aarch64/instrs/vector/crypto/aes/mix" tworows="1">
<box hibit="31" width="8" settings="8">
<c>0</c>
<c>1</c>
<c>0</c>
<c>0</c>
<c>1</c>
<c>1</c>
<c>1</c>
<c>0</c>
</box>
<box hibit="23" width="2" name="size" settings="2">
<c>0</c>
<c>0</c>
</box>
<box hibit="21" width="5" settings="5">
<c>1</c>
<c>0</c>
<c>1</c>
<c>0</c>
<c>0</c>
</box>
<box hibit="16" width="4" name="opcode[4:1]" settings="4">
<c>0</c>
<c>0</c>
<c>1</c>
<c>1</c>
</box>
<box hibit="12" name="D" usename="1" settings="1" psbits="x">
<c>1</c>
</box>
<box hibit="11" width="2" settings="2">
<c>1</c>
<c>0</c>
</box>
<box hibit="9" width="5" name="Rn" usename="1">
<c colspan="5"></c>
</box>
<box hibit="4" width="5" name="Rd" usename="1">
<c colspan="5"></c>
</box>
</regdiagram>
<encoding name="AESIMC_B_cryptoaes" oneofinclass="1" oneof="1" label="">
<docvars>
<docvar key="instr-class" value="advsimd" />
<docvar key="isa" value="A64" />
<docvar key="mnemonic" value="AESIMC" />
</docvars>
<asmtemplate><text>AESIMC </text><a link="sa_vd" hover="SIMD&amp;FP destination register (field &quot;Rd&quot;)">&lt;Vd&gt;</a><text>.16B, </text><a link="sa_vn" hover="SIMD&amp;FP source register (field &quot;Rn&quot;)">&lt;Vn&gt;</a><text>.16B</text></asmtemplate>
</encoding>
<ps_section howmany="1">
<ps name="aarch64/instrs/vector/crypto/aes/mix" mylink="aarch64.instrs.vector.crypto.aes.mix" enclabels="" sections="1" secttype="noheading">
<pstext mayhavelinks="1" section="Decode" rep_section="decode">integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rd);
integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rn);
if !<a link="impl-shared.HaveAESExt.0" file="shared_pseudocode.xml" hover="function: boolean HaveAESExt()">HaveAESExt</a>() then UNDEFINED;
boolean decrypt = (D == '1');</pstext>
</ps>
</ps_section>
</iclass>
</classes>
<explanations scope="all">
<explanation enclist="AESIMC_B_cryptoaes" symboldefcount="1">
<symbol link="sa_vd">&lt;Vd&gt;</symbol>
<account encodedin="Rd">
<intro>
<para>Is the name of the SIMD&amp;FP destination register, encoded in the "Rd" field.</para>
</intro>
</account>
</explanation>
<explanation enclist="AESIMC_B_cryptoaes" symboldefcount="1">
<symbol link="sa_vn">&lt;Vn&gt;</symbol>
<account encodedin="Rn">
<intro>
<para>Is the name of the SIMD&amp;FP source register, encoded in the "Rn" field.</para>
</intro>
</account>
</explanation>
</explanations>
<ps_section howmany="1">
<ps name="aarch64/instrs/vector/crypto/aes/mix" mylink="execute" enclabels="" sections="1" secttype="Operation">
<pstext mayhavelinks="1" section="Execute" rep_section="execute"><a link="AArch64.CheckFPAdvSIMDEnabled.0" file="shared_pseudocode.xml" hover="function: AArch64.CheckFPAdvSIMDEnabled()">AArch64.CheckFPAdvSIMDEnabled</a>();
bits(128) operand = <a link="impl-aarch64.V.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) V[integer n, integer width]">V</a>[n, 128];
bits(128) result;
if decrypt then
result = <a link="impl-shared.AESInvMixColumns.1" file="shared_pseudocode.xml" hover="function: bits(128) AESInvMixColumns(bits (128) op)">AESInvMixColumns</a>(operand);
else
result = <a link="impl-shared.AESMixColumns.1" file="shared_pseudocode.xml" hover="function: bits(128) AESMixColumns(bits (128) op)">AESMixColumns</a>(operand);
<a link="impl-aarch64.V.write.2" file="shared_pseudocode.xml" hover="accessor: V[integer n, integer width] = bits(width) value">V</a>[d, 128] = result;</pstext>
</ps>
</ps_section>
</instructionsection>