mirror of
https://github.com/pound-emu/ballistic.git
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196 lines
9.4 KiB
XML
196 lines
9.4 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
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<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<instructionsection id="index_z_rr" title="INDEX (scalars)" type="instruction">
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<docvars>
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<docvar key="instr-class" value="sve" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="INDEX" />
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</docvars>
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<heading>INDEX (scalars)</heading>
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<desc>
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<brief>Create index starting from and incremented by general-purpose register</brief>
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<description>
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<para>Populates the destination vector by setting the first element to the first signed scalar integer operand and monotonically incrementing the value by the second signed scalar integer operand for each subsequent element. The scalar source operands are general-purpose registers in which only the least significant bits corresponding to the vector element size are used and any remaining bits are ignored. This instruction is unpredicated.</para>
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</description>
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<status>Green</status>
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<predicated>False</predicated>
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<uses_dit condition="FEAT_SVE2 is implemented or FEAT_SME is implemented">True</uses_dit>
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</desc>
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<alias_list howmany="0"></alias_list>
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<classes>
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<iclass name="SVE" oneof="1" id="iclass_sve" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="instr-class" value="sve" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="INDEX" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<regdiagram form="32" psname="INDEX-Z.RR-_">
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<box hibit="31" width="8" settings="8">
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="23" width="2" name="size" usename="1">
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<c colspan="2"></c>
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</box>
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<box hibit="21" settings="1">
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<c>1</c>
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</box>
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<box hibit="20" width="5" name="Rm" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="15" width="6" settings="6">
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>1</c>
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</box>
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<box hibit="9" width="5" name="Rn" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="4" width="5" name="Zd" usename="1">
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<c colspan="5"></c>
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</box>
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</regdiagram>
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<encoding name="index_z_rr_" oneofinclass="1" oneof="1" label="">
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<docvars>
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<docvar key="instr-class" value="sve" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="INDEX" />
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</docvars>
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<asmtemplate><text>INDEX </text><a link="sa_zd" hover="Destination scalable vector register (field "Zd")"><Zd></a><text>.</text><a link="sa_t" hover="Size specifier (field "size") [B,D,H,S]"><T></a><text>, </text><a link="sa_r" hover="Width specifier (field "size") [W,X]"><R></a><a link="sa_n" hover="Source general-purpose register number [0-30] or ZR (31) (field "Rn")"><n></a><text>, </text><a link="sa_r" hover="Width specifier (field "size") [W,X]"><R></a><a link="sa_m" hover="Source general-purpose register number [0-30] or ZR (31) (field "Rm")"><m></a></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="INDEX-Z.RR-_" mylink="INDEX-Z.RR-_" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSVE.0" file="shared_pseudocode.xml" hover="function: boolean HaveSVE()">HaveSVE</a>() && !<a link="impl-aarch64.HaveSME.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME()">HaveSME</a>() then UNDEFINED;
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constant integer esize = 8 << <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(size);
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integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rn);
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integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rm);
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integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zd);</pstext>
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</ps>
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</ps_section>
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</iclass>
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</classes>
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<explanations scope="all">
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<explanation enclist="index_z_rr_" symboldefcount="1">
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<symbol link="sa_zd"><Zd></symbol>
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<account encodedin="Zd">
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<intro>
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<para>Is the name of the destination scalable vector register, encoded in the "Zd" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="index_z_rr_" symboldefcount="1">
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<symbol link="sa_t"><T></symbol>
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<definition encodedin="size">
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<intro>Is the size specifier, </intro>
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<table class="valuetable">
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<tgroup cols="2">
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<thead>
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<row>
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<entry class="bitfield">size</entry>
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<entry class="symbol"><T></entry>
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</row>
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</thead>
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<tbody>
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<row>
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<entry class="bitfield">00</entry>
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<entry class="symbol">B</entry>
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</row>
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<row>
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<entry class="bitfield">01</entry>
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<entry class="symbol">H</entry>
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</row>
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<row>
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<entry class="bitfield">10</entry>
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<entry class="symbol">S</entry>
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</row>
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<row>
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<entry class="bitfield">11</entry>
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<entry class="symbol">D</entry>
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</row>
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</tbody>
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</tgroup>
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</table>
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</definition>
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</explanation>
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<explanation enclist="index_z_rr_" symboldefcount="1">
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<symbol link="sa_r"><R></symbol>
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<definition encodedin="size">
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<intro>Is a width specifier, </intro>
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<table class="valuetable">
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<tgroup cols="2">
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<thead>
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<row>
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<entry class="bitfield">size</entry>
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<entry class="symbol"><R></entry>
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</row>
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</thead>
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<tbody>
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<row>
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<entry class="bitfield">01</entry>
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<entry class="symbol">W</entry>
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</row>
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<row>
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<entry class="bitfield">x0</entry>
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<entry class="symbol">W</entry>
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</row>
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<row>
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<entry class="bitfield">11</entry>
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<entry class="symbol">X</entry>
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</row>
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</tbody>
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</tgroup>
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</table>
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</definition>
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</explanation>
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<explanation enclist="index_z_rr_" symboldefcount="1">
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<symbol link="sa_n"><n></symbol>
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<account encodedin="Rn">
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<intro>
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<para>Is the number [0-30] of the source general-purpose register or the name ZR (31), encoded in the "Rn" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="index_z_rr_" symboldefcount="1">
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<symbol link="sa_m"><m></symbol>
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<account encodedin="Rm">
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<intro>
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<para>Is the number [0-30] of the source general-purpose register or the name ZR (31), encoded in the "Rm" field.</para>
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</intro>
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</account>
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</explanation>
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</explanations>
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<ps_section howmany="1">
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<ps name="INDEX-Z.RR-_" mylink="execute" enclabels="" sections="1" secttype="Operation">
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<pstext mayhavelinks="1" section="Execute" rep_section="execute"><a link="impl-aarch64.CheckSVEEnabled.0" file="shared_pseudocode.xml" hover="function: CheckSVEEnabled()">CheckSVEEnabled</a>();
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constant integer VL = <a link="impl-aarch64.CurrentVL.read.none" file="shared_pseudocode.xml" hover="accessor: integer CurrentVL">CurrentVL</a>;
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constant integer PL = VL DIV 8;
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constant integer elements = VL DIV esize;
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bits(esize) operand1 = <a link="impl-aarch64.X.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) X[integer n, integer width]">X</a>[n, esize];
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integer element1 = <a link="impl-shared.SInt.1" file="shared_pseudocode.xml" hover="function: integer SInt(bits(N) x)">SInt</a>(operand1);
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bits(esize) operand2 = <a link="impl-aarch64.X.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) X[integer n, integer width]">X</a>[m, esize];
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integer element2 = <a link="impl-shared.SInt.1" file="shared_pseudocode.xml" hover="function: integer SInt(bits(N) x)">SInt</a>(operand2);
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bits(VL) result;
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for e = 0 to elements-1
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integer index = element1 + e * element2;
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<a link="impl-shared.Elem.write.3" file="shared_pseudocode.xml" hover="accessor: Elem[bits(N) &vector, integer e, integer size] = bits(size) value">Elem</a>[result, e, esize] = index<esize-1:0>;
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<a link="impl-aarch64.Z.write.2" file="shared_pseudocode.xml" hover="accessor: Z[integer n, integer width] = bits(width) value">Z</a>[d, VL] = result;</pstext>
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</ps>
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</ps_section>
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</instructionsection>
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