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120 lines
5.4 KiB
XML
120 lines
5.4 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
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<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<instructionsection id="REV64_REV" title="REV64 -- A64" type="alias">
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<docvars>
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<docvar key="alias_mnemonic" value="REV64" />
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<docvar key="datatype" value="64" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="REV" />
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</docvars>
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<heading>REV64</heading>
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<desc>
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<brief>
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<para>Reverse Bytes</para>
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</brief>
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<authored>
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<para>Reverse Bytes reverses the byte order in a 64-bit general-purpose register.</para>
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<para>When assembling for Armv8.2, an assembler must support this pseudo-instruction. It is <arm-defined-word>optional</arm-defined-word> whether an assembler supports this pseudo-instruction when assembling for an architecture earlier than Armv8.2.</para>
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</authored>
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</desc>
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<operationalnotes>
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<para>If PSTATE.DIT is 1:</para>
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<list type="unordered">
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<listitem><content>The execution time of this instruction is independent of:<list type="unordered"><listitem><content>The values of the data supplied in any of its registers.</content></listitem><listitem><content>The values of the NZCV flags.</content></listitem></list></content></listitem>
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<listitem><content>The response of this instruction to asynchronous exceptions does not vary based on:<list type="unordered"><listitem><content>The values of the data supplied in any of its registers.</content></listitem><listitem><content>The values of the NZCV flags.</content></listitem></list></content></listitem>
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</list>
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</operationalnotes>
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<aliasto refiform="rev.xml" iformid="REV">REV</aliasto>
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<classes>
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<iclass name="Integer" oneof="1" id="iclass_general" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="REV" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<regdiagram form="32" psname="aarch64/instrs/integer/arithmetic/rev" tworows="1">
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<box hibit="31" name="sf" usename="1" settings="1" psbits="x">
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<c>1</c>
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</box>
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<box hibit="30" settings="1">
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<c>1</c>
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</box>
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<box hibit="29" name="S" settings="1">
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<c>0</c>
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</box>
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<box hibit="28" width="8" settings="8">
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="20" width="5" name="opcode2" settings="5">
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="15" width="4" name="opcode[5:2]" settings="4">
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="11" width="2" name="opc" usename="1" settings="2" psbits="xx">
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<c>1</c>
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<c>1</c>
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</box>
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<box hibit="9" width="5" name="Rn" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="4" width="5" name="Rd" usename="1">
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<c colspan="5"></c>
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</box>
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</regdiagram>
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<encoding name="REV64_REV_64_dp_1src" oneofinclass="1" oneof="1" label="64-bit">
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<docvars>
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<docvar key="alias_mnemonic" value="REV64" />
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<docvar key="datatype" value="64" />
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="REV" />
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</docvars>
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<asmtemplate><text>REV64 </text><a link="sa_xd" hover="64-bit general-purpose destination register (field "Rd")"><Xd></a><text>, </text><a link="sa_xn" hover="64-bit general-purpose source register (field "Rn")"><Xn></a></asmtemplate>
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<equivalent_to>
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<asmtemplate><a href="rev.xml#REV_64_dp_1src">REV</a><text> </text><a link="sa_xd" hover="64-bit general-purpose destination register (field "Rd")"><Xd></a><text>, </text><a link="sa_xn" hover="64-bit general-purpose source register (field "Rn")"><Xn></a></asmtemplate>
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<aliascond>Never</aliascond>
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</equivalent_to>
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</encoding>
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</iclass>
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</classes>
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<explanations scope="all">
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<explanation enclist="REV64_REV_64_dp_1src" symboldefcount="1">
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<symbol link="sa_xd"><Xd></symbol>
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<account encodedin="Rd">
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<intro>
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<para>Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="REV64_REV_64_dp_1src" symboldefcount="1">
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<symbol link="sa_xn"><Xn></symbol>
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<account encodedin="Rn">
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<intro>
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<para>Is the 64-bit name of the general-purpose source register, encoded in the "Rn" field.</para>
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</intro>
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</account>
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</explanation>
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</explanations>
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</instructionsection>
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