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archived-ballistic/spec/arm64_xml/setffr_f.xml
Ronald Caesar 26a677f8b4 decoder: Add ARM specification docs
Signed-off-by: Ronald Caesar <github43132@proton.me>
2025-12-12 18:11:36 -04:00

113 lines
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XML

<?xml version="1.0" encoding="utf-8"?>
<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
<instructionsection id="setffr_f" title="SETFFR" type="instruction">
<docvars>
<docvar key="instr-class" value="sve" />
<docvar key="isa" value="A64" />
<docvar key="mnemonic" value="SETFFR" />
</docvars>
<heading>SETFFR</heading>
<desc>
<brief>Initialise the first-fault register to all true</brief>
<description>
<para>Initialise the first-fault register (<asm-code>FFR</asm-code>) to all true prior to a sequence of first-fault or non-fault loads. This instruction is unpredicated.</para>
<para>This instruction is illegal when executed in Streaming SVE mode, unless FEAT_SME_FA64 is implemented and enabled.</para>
</description>
<status>Green</status>
<predicated>False</predicated>
<uses_dit condition="FEAT_SVE2 is implemented or FEAT_SME is implemented">True</uses_dit>
<sm_policy>SM_0_only</sm_policy>
</desc>
<alias_list howmany="0"></alias_list>
<classes>
<iclass name="SVE" oneof="1" id="iclass_sve" no_encodings="1" isa="A64">
<docvars>
<docvar key="instr-class" value="sve" />
<docvar key="isa" value="A64" />
<docvar key="mnemonic" value="SETFFR" />
</docvars>
<iclassintro count="1"></iclassintro>
<regdiagram form="32" psname="SETFFR-F-_">
<box hibit="31" width="2" settings="2">
<c>0</c>
<c>0</c>
</box>
<box hibit="29" width="6" settings="6">
<c>1</c>
<c>0</c>
<c>0</c>
<c>1</c>
<c>0</c>
<c>1</c>
</box>
<box hibit="23" name="opc&lt;1&gt;" settings="1">
<c>0</c>
</box>
<box hibit="22" name="opc&lt;0&gt;" settings="1">
<c>0</c>
</box>
<box hibit="21" width="2" settings="2">
<c>1</c>
<c>0</c>
</box>
<box hibit="19" width="10" settings="10">
<c>1</c>
<c>1</c>
<c>0</c>
<c>0</c>
<c>1</c>
<c>0</c>
<c>0</c>
<c>1</c>
<c>0</c>
<c>0</c>
</box>
<box hibit="9" width="6" settings="6">
<c>0</c>
<c>0</c>
<c>0</c>
<c>0</c>
<c>0</c>
<c>0</c>
</box>
<box hibit="3" settings="1">
<c>0</c>
</box>
<box hibit="2" settings="1">
<c>0</c>
</box>
<box hibit="1" width="2" settings="2">
<c>0</c>
<c>0</c>
</box>
</regdiagram>
<encoding name="setffr_f_" oneofinclass="1" oneof="1" label="">
<docvars>
<docvar key="instr-class" value="sve" />
<docvar key="isa" value="A64" />
<docvar key="mnemonic" value="SETFFR" />
</docvars>
<asmtemplate><text>SETFFR </text></asmtemplate>
</encoding>
<ps_section howmany="1">
<ps name="SETFFR-F-_" mylink="SETFFR-F-_" enclabels="" sections="1" secttype="noheading">
<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSVE.0" file="shared_pseudocode.xml" hover="function: boolean HaveSVE()">HaveSVE</a>() then UNDEFINED;</pstext>
</ps>
</ps_section>
</iclass>
</classes>
<explanations scope="all"></explanations>
<ps_section howmany="1">
<ps name="SETFFR-F-_" mylink="execute" enclabels="" sections="1" secttype="Operation">
<pstext mayhavelinks="1" section="Execute" rep_section="execute"><a link="impl-aarch64.CheckNonStreamingSVEEnabled.0" file="shared_pseudocode.xml" hover="function: CheckNonStreamingSVEEnabled()">CheckNonStreamingSVEEnabled</a>();
constant integer VL = <a link="impl-aarch64.CurrentVL.read.none" file="shared_pseudocode.xml" hover="accessor: integer CurrentVL">CurrentVL</a>;
constant integer PL = VL DIV 8;
<a link="impl-aarch64.FFR.write.1" file="shared_pseudocode.xml" hover="accessor: FFR[integer width] = bits(width) value">FFR</a>[PL] = <a link="impl-shared.Ones.1" file="shared_pseudocode.xml" hover="function: bits(N) Ones(integer N)">Ones</a>(PL);</pstext>
</ps>
</ps_section>
</instructionsection>