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437 lines
39 KiB
XML
437 lines
39 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
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<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<instructionsection id="SETGPTN" title="SETGPTN, SETGMTN, SETGETN -- A64" type="instruction">
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<docvars>
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A64" />
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</docvars>
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<heading>SETGPTN, SETGMTN, SETGETN</heading>
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<desc>
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<brief>
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<para>Memory Set with tag setting, unprivileged and non-temporal</para>
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</brief>
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<authored>
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<para>Memory Set with tag setting, unprivileged and non-temporal. These instructions perform a memory set using the value in the bottom byte of the source register and store an Allocation Tag to memory for each Tag Granule written. The Allocation Tag is calculated from the Logical Address Tag in the register which holds the first address that the set is made to. The prologue, main, and epilogue instructions are expected to be run in succession and to appear consecutively in memory: SETGPTN, then SETGMTN, and then SETGETN.</para>
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<para>SETGPTN performs some preconditioning of the arguments suitable for using the SETGMTN instruction, and performs an <arm-defined-word>implementation defined</arm-defined-word> amount of the memory set. SETGMTN performs an <arm-defined-word>implementation defined</arm-defined-word> amount of the memory set. SETGETN performs the last part of the memory set.</para>
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<note>
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<para>The inclusion of <arm-defined-word>implementation defined</arm-defined-word> amounts of memory set allows some optimization of the size that can be performed.</para>
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</note>
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<para>The architecture supports two algorithms for the memory set: option A and option B. Which algorithm is used is <arm-defined-word>implementation defined</arm-defined-word>.</para>
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<note>
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<para>Portable software should not assume that the choice of algorithm is constant.</para>
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</note>
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<para>After execution of SETGPTN, option A (which results in encoding PSTATE.C = 0):</para>
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<list type="unordered">
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<listitem><content>If Xn<63> == 1, the set size is saturated to <hexnumber>0x7FFFFFFFFFFFFFF0</hexnumber>.</content></listitem>
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<listitem><content>Xd holds the original Xd + saturated Xn.</content></listitem>
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<listitem><content>Xn holds -1* saturated Xn + an <arm-defined-word>implementation defined</arm-defined-word> number of bytes set.</content></listitem>
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<listitem><content>PSTATE.{N,Z,V} are set to {0,0,0}.</content></listitem>
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</list>
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<para>After execution of SETGPTN, option B (which results in encoding PSTATE.C = 1):</para>
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<list type="unordered">
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<listitem><content>If Xn<63> == 1, the copy size is saturated to <hexnumber>0x7FFFFFFFFFFFFFF0</hexnumber>.</content></listitem>
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<listitem><content>Xd holds the original Xd + an <arm-defined-word>implementation defined</arm-defined-word> number of bytes set.</content></listitem>
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<listitem><content>Xn holds the saturated Xn - an <arm-defined-word>implementation defined</arm-defined-word> number of bytes set.</content></listitem>
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<listitem><content>PSTATE.{N,Z,V} are set to {0,0,0}.</content></listitem>
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</list>
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<para>For SETGMTN, option A (encoded by PSTATE.C = 0), the format of the arguments is:</para>
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<list type="unordered">
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<listitem><content>Xn is treated as a signed 64-bit number.</content></listitem>
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<listitem><content>Xn holds -1* number of bytes remaining to be set in the memory set in total.</content></listitem>
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<listitem><content>Xd holds the lowest address that the set is made to -Xn.</content></listitem>
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<listitem><content>At the end of the instruction, the value of Xn is written back with -1* number of bytes remaining to be set in the memory set in total.</content></listitem>
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</list>
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<para>For SETGMTN, option B (encoded by PSTATE.C = 1), the format of the arguments is:</para>
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<list type="unordered">
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<listitem><content>Xn holds the number of bytes remaining to be set in the memory set in total.</content></listitem>
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<listitem><content>Xd holds the lowest address that the set is made to.</content></listitem>
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<listitem><content>At the end of the instruction:<list type="unordered"><listitem><content>the value of Xn is written back with the number of bytes remaining to be set in the memory set in total.</content></listitem><listitem><content>the value of Xd is written back with the lowest address that has not been set.</content></listitem></list></content></listitem>
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</list>
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<para>For SETGETN, option A (encoded by PSTATE.C = 0), the format of the arguments is:</para>
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<list type="unordered">
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<listitem><content>Xn is treated as a signed 64-bit number.</content></listitem>
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<listitem><content>Xn holds -1* the number of bytes remaining to be set in the memory set in total.</content></listitem>
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<listitem><content>Xd holds the lowest address that the set is made to -Xn.</content></listitem>
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<listitem><content>At the end of the instruction, the value of Xn is written back with 0.</content></listitem>
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</list>
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<para>For SETGETN, option B (encoded by PSTATE.C = 1), the format of the arguments is:</para>
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<list type="unordered">
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<listitem><content>Xn holds the number of bytes remaining to be set in the memory set in total.</content></listitem>
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<listitem><content>Xd holds the lowest address that the set is made to.</content></listitem>
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<listitem><content>At the end of the instruction:<list type="unordered"><listitem><content>the value of Xn is written back with 0.</content></listitem><listitem><content>the value of Xd is written back with the lowest address that has not been set.</content></listitem></list></content></listitem>
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</list>
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</authored>
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<encodingnotes>
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<para>For information about the <arm-defined-word>constrained unpredictable</arm-defined-word> behavior of this instruction, see <xref linkend="CJAEGDJC">Architectural Constraints on UNPREDICTABLE behaviors</xref>, and particularly <xref linkend="CEGDGDDAG2">Memory Copy and Memory Set SET*</xref>.</para>
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</encodingnotes>
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</desc>
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<alias_list howmany="0"></alias_list>
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<classes>
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<iclass name="Integer" oneof="1" id="iclass_general" no_encodings="3" isa="A64">
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<docvars>
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A64" />
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</docvars>
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<iclassintro count="3"></iclassintro>
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<arch_variants>
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<arch_variant name="ARMv8.8" feature="FEAT_MOPS" />
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</arch_variants>
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<regdiagram form="32" psname="aarch64/instrs/memory/mcpymset/setg" tworows="1">
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<box hibit="31" width="2" name="sz" usename="1">
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<c colspan="2"></c>
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</box>
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<box hibit="29" width="3" settings="3">
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<c>0</c>
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<c>1</c>
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<c>1</c>
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</box>
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<box hibit="26" name="o0" settings="1">
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<c>1</c>
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</box>
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<box hibit="25" width="2" settings="2">
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<c>0</c>
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<c>1</c>
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</box>
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<box hibit="23" width="2" name="op1" settings="2">
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<c>1</c>
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<c>1</c>
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</box>
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<box hibit="21" settings="1">
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<c>0</c>
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</box>
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<box hibit="20" width="5" name="Rs" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="15" width="4" name="op2" usename="1" settings="2" psbits="xxxx">
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<c>x</c>
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<c>x</c>
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<c>1</c>
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<c>1</c>
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</box>
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<box hibit="11" width="2" settings="2">
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<c>0</c>
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<c>1</c>
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</box>
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<box hibit="9" width="5" name="Rn" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="4" width="5" name="Rd" usename="1">
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<c colspan="5"></c>
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</box>
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</regdiagram>
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<encoding name="SETGETN_SET_memcms" oneofinclass="3" oneof="3" label="Epilogue" bitdiffs="op2 == 1011">
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<docvars>
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="SETGETN" />
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<docvar key="pme" value="pme-epilogue" />
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</docvars>
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<box hibit="15" width="4" name="op2">
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<c>1</c>
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<c>0</c>
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<c></c>
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<c></c>
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</box>
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<asmtemplate><text>SETGETN [</text><a link="sa_xd_1" hover="64-bit general-purpose register that holds an encoding of destination address (an integer multiple of 16) and for option B is updated by the instruction (field "Rd")"><Xd></a><text>]!, </text><a link="sa_xn_2" hover="64-bit general-purpose register that holds an encoding of number of bytes to be set (an integer multiple of 16) and is set to zero at the end of the instruction (field "Rn")"><Xn></a><text>!, </text><a link="sa_xs_1" hover="64-bit general-purpose register that holds the source data (field "Rs")"><Xs></a></asmtemplate>
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</encoding>
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<encoding name="SETGMTN_SET_memcms" oneofinclass="3" oneof="3" label="Main" bitdiffs="op2 == 0111">
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<docvars>
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="SETGMTN" />
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<docvar key="pme" value="pme-main" />
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</docvars>
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<box hibit="15" width="4" name="op2">
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<c>0</c>
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<c>1</c>
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<c></c>
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<c></c>
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</box>
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<asmtemplate><text>SETGMTN [</text><a link="sa_xd_1" hover="64-bit general-purpose register that holds an encoding of destination address (an integer multiple of 16) and for option B is updated by the instruction (field "Rd")"><Xd></a><text>]!, </text><a link="sa_xn_1" hover="64-bit general-purpose register that holds an encoding of number of bytes to be set (an integer multiple of 16) and is updated by the instruction (field "Rn")"><Xn></a><text>!, </text><a link="sa_xs" hover="64-bit general-purpose register that holds the source data in bits<7:0> (field "Rs")"><Xs></a></asmtemplate>
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</encoding>
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<encoding name="SETGPTN_SET_memcms" oneofinclass="3" oneof="3" label="Prologue" bitdiffs="op2 == 0011">
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<docvars>
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<docvar key="instr-class" value="general" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="SETGPTN" />
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<docvar key="pme" value="pme-prologue" />
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</docvars>
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<box hibit="15" width="4" name="op2">
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<c>0</c>
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<c>0</c>
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<c></c>
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<c></c>
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</box>
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<asmtemplate><text>SETGPTN [</text><a link="sa_xd" hover="64-bit general-purpose register that holds an encoding of destination address (an integer multiple of 16) and is updated by the instruction (field "Rd")"><Xd></a><text>]!, </text><a link="sa_xn" hover="64-bit general-purpose register that holds the number of bytes to be set (an integer multiple of 16) and is updated by the instruction (field "Rn")"><Xn></a><text>!, </text><a link="sa_xs" hover="64-bit general-purpose register that holds the source data in bits<7:0> (field "Rs")"><Xs></a></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="aarch64/instrs/memory/mcpymset/setg" mylink="aarch64.instrs.memory.mcpymset.setg" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-shared.HaveFeatMOPS.0" file="shared_pseudocode.xml" hover="function: boolean HaveFeatMOPS()">HaveFeatMOPS</a>() then UNDEFINED;
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if !<a link="impl-shared.HaveMTEExt.0" file="shared_pseudocode.xml" hover="function: boolean HaveMTEExt()">HaveMTEExt</a>() then UNDEFINED;
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if sz != '00' then UNDEFINED;
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integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rd);
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integer s = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rs);
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integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rn);
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bits(2) options = op2<1:0>;
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<a link="MOPSStage" file="shared_pseudocode.xml" hover="enumeration MOPSStage { MOPSStage_Prologue, MOPSStage_Main, MOPSStage_Epilogue }">MOPSStage</a> stage;
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case op2<3:2> of
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when '00' stage = <a link="MOPSStage_Prologue" file="shared_pseudocode.xml" hover="enumeration MOPSStage { MOPSStage_Prologue, MOPSStage_Main, MOPSStage_Epilogue }">MOPSStage_Prologue</a>;
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when '01' stage = <a link="MOPSStage_Main" file="shared_pseudocode.xml" hover="enumeration MOPSStage { MOPSStage_Prologue, MOPSStage_Main, MOPSStage_Epilogue }">MOPSStage_Main</a>;
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when '10' stage = <a link="MOPSStage_Epilogue" file="shared_pseudocode.xml" hover="enumeration MOPSStage { MOPSStage_Prologue, MOPSStage_Main, MOPSStage_Epilogue }">MOPSStage_Epilogue</a>;
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otherwise UNDEFINED;
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<a link="impl-aarch64.CheckMOPSEnabled.0" file="shared_pseudocode.xml" hover="function: CheckMOPSEnabled()">CheckMOPSEnabled</a>();
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if s == n || s == d || n == d || d == 31 || n == 31 then
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c = <a link="impl-shared.ConstrainUnpredictable.1" file="shared_pseudocode.xml" hover="function: Constraint ConstrainUnpredictable(Unpredictable which)">ConstrainUnpredictable</a>(<a link="Unpredictable_MOPSOVERLAP31" file="shared_pseudocode.xml" hover="enumeration Unpredictable { Unpredictable_VMSR, Unpredictable_WBOVERLAPLD, Unpredictable_WBOVERLAPST, Unpredictable_LDPOVERLAP, Unpredictable_BASEOVERLAP, Unpredictable_DATAOVERLAP, Unpredictable_DEVPAGE2, Unpredictable_INSTRDEVICE, Unpredictable_RESCPACR, Unpredictable_RESMAIR, Unpredictable_S1CTAGGED, Unpredictable_S2RESMEMATTR, Unpredictable_RESTEXCB, Unpredictable_RESPRRR, Unpredictable_RESDACR, Unpredictable_RESVTCRS, Unpredictable_RESTnSZ, Unpredictable_RESTCF, Unpredictable_DEVICETAGSTORE, Unpredictable_OORTnSZ, Unpredictable_LARGEIPA, Unpredictable_ESRCONDPASS, Unpredictable_ILZEROIT, Unpredictable_ILZEROT, Unpredictable_BPVECTORCATCHPRI, Unpredictable_VCMATCHHALF, Unpredictable_VCMATCHDAPA, Unpredictable_WPMASKANDBAS, Unpredictable_WPBASCONTIGUOUS, Unpredictable_RESWPMASK, Unpredictable_WPMASKEDBITS, Unpredictable_RESBPWPCTRL, Unpredictable_BPNOTIMPL, Unpredictable_RESBPTYPE, Unpredictable_BPNOTCTXCMP, Unpredictable_BPMATCHHALF, Unpredictable_BPMISMATCHHALF, Unpredictable_RESTARTALIGNPC, Unpredictable_RESTARTZEROUPPERPC, Unpredictable_ZEROUPPER, Unpredictable_ERETZEROUPPERPC, Unpredictable_A32FORCEALIGNPC, Unpredictable_SMD, Unpredictable_NONFAULT, Unpredictable_SVEZEROUPPER, Unpredictable_SVELDNFDATA, Unpredictable_SVELDNFZERO, Unpredictable_CHECKSPNONEACTIVE, Unpredictable_SMEZEROUPPER, Unpredictable_NVNV1, Unpredictable_Shareability, Unpredictable_AFUPDATE, Unpredictable_DBUPDATE, Unpredictable_IESBinDebug, Unpredictable_BADPMSFCR, Unpredictable_ZEROBTYPE, Unpredictable_EL2TIMESTAMP, Unpredictable_EL1TIMESTAMP, Unpredictable_RESERVEDNSxB, Unpredictable_WFxTDEBUG, Unpredictable_LS64UNSUPPORTED, Unpredictable_MISALIGNEDATOMIC, Unpredictable_CLEARERRITEZERO, Unpredictable_ALUEXCEPTIONRETURN, Unpredictable_IGNORETRAPINDEBUG, Unpredictable_DBGxVR_RESS, Unpredictable_PMUEVENTCOUNTER, Unpredictable_PMSCR_PCT, Unpredictable_CounterReservedForEL2, Unpredictable_BRBFILTRATE, Unpredictable_MOPSOVERLAP31, Unpredictable_STOREONLYTAGCHECKEDCAS, Unpredictable_RESTC }">Unpredictable_MOPSOVERLAP31</a>);
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assert c IN {<a link="Constraint_UNDEF" file="shared_pseudocode.xml" hover="enumeration Constraint { Constraint_NONE, Constraint_UNKNOWN, Constraint_UNDEF, Constraint_UNDEFEL0, Constraint_NOP, Constraint_TRUE, Constraint_FALSE, Constraint_DISABLED, Constraint_UNCOND, Constraint_COND, Constraint_ADDITIONAL_DECODE, Constraint_WBSUPPRESS, Constraint_FAULT, Constraint_LIMITED_ATOMICITY, Constraint_NVNV1_00, Constraint_NVNV1_01, Constraint_NVNV1_11, Constraint_EL1TIMESTAMP, Constraint_EL2TIMESTAMP, Constraint_OSH, Constraint_ISH, Constraint_NSH, Constraint_NC, Constraint_WT, Constraint_WB, Constraint_FORCE, Constraint_FORCENOSLCHECK, Constraint_MAPTOALLOCATED, Constraint_PMSCR_PCT_VIRT }">Constraint_UNDEF</a>, <a link="Constraint_NOP" file="shared_pseudocode.xml" hover="enumeration Constraint { Constraint_NONE, Constraint_UNKNOWN, Constraint_UNDEF, Constraint_UNDEFEL0, Constraint_NOP, Constraint_TRUE, Constraint_FALSE, Constraint_DISABLED, Constraint_UNCOND, Constraint_COND, Constraint_ADDITIONAL_DECODE, Constraint_WBSUPPRESS, Constraint_FAULT, Constraint_LIMITED_ATOMICITY, Constraint_NVNV1_00, Constraint_NVNV1_01, Constraint_NVNV1_11, Constraint_EL1TIMESTAMP, Constraint_EL2TIMESTAMP, Constraint_OSH, Constraint_ISH, Constraint_NSH, Constraint_NC, Constraint_WT, Constraint_WB, Constraint_FORCE, Constraint_FORCENOSLCHECK, Constraint_MAPTOALLOCATED, Constraint_PMSCR_PCT_VIRT }">Constraint_NOP</a>};
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case c of
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when <a link="Constraint_UNDEF" file="shared_pseudocode.xml" hover="enumeration Constraint { Constraint_NONE, Constraint_UNKNOWN, Constraint_UNDEF, Constraint_UNDEFEL0, Constraint_NOP, Constraint_TRUE, Constraint_FALSE, Constraint_DISABLED, Constraint_UNCOND, Constraint_COND, Constraint_ADDITIONAL_DECODE, Constraint_WBSUPPRESS, Constraint_FAULT, Constraint_LIMITED_ATOMICITY, Constraint_NVNV1_00, Constraint_NVNV1_01, Constraint_NVNV1_11, Constraint_EL1TIMESTAMP, Constraint_EL2TIMESTAMP, Constraint_OSH, Constraint_ISH, Constraint_NSH, Constraint_NC, Constraint_WT, Constraint_WB, Constraint_FORCE, Constraint_FORCENOSLCHECK, Constraint_MAPTOALLOCATED, Constraint_PMSCR_PCT_VIRT }">Constraint_UNDEF</a> UNDEFINED;
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when <a link="Constraint_NOP" file="shared_pseudocode.xml" hover="enumeration Constraint { Constraint_NONE, Constraint_UNKNOWN, Constraint_UNDEF, Constraint_UNDEFEL0, Constraint_NOP, Constraint_TRUE, Constraint_FALSE, Constraint_DISABLED, Constraint_UNCOND, Constraint_COND, Constraint_ADDITIONAL_DECODE, Constraint_WBSUPPRESS, Constraint_FAULT, Constraint_LIMITED_ATOMICITY, Constraint_NVNV1_00, Constraint_NVNV1_01, Constraint_NVNV1_11, Constraint_EL1TIMESTAMP, Constraint_EL2TIMESTAMP, Constraint_OSH, Constraint_ISH, Constraint_NSH, Constraint_NC, Constraint_WT, Constraint_WB, Constraint_FORCE, Constraint_FORCENOSLCHECK, Constraint_MAPTOALLOCATED, Constraint_PMSCR_PCT_VIRT }">Constraint_NOP</a> <a link="impl-shared.EndOfInstruction.0" file="shared_pseudocode.xml" hover="function: EndOfInstruction()">EndOfInstruction</a>();</pstext>
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</ps>
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</ps_section>
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</iclass>
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</classes>
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<explanations scope="all">
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<explanation enclist="SETGMTN_SET_memcms, SETGETN_SET_memcms" symboldefcount="1">
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<symbol link="sa_xd_1"><Xd></symbol>
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<account encodedin="Rd">
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<intro>
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<para>For the epilogue and main variant: is the 64-bit name of the general-purpose register that holds an encoding of the destination address (an integer multiple of 16) and for option B is updated by the instruction, encoded in the "Rd" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="SETGPTN_SET_memcms" symboldefcount="2">
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<symbol link="sa_xd"><Xd></symbol>
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<account encodedin="Rd">
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<docvars>
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<docvar key="mnemonic" value="SETGPTN" />
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<docvar key="pme" value="pme-prologue" />
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</docvars>
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<intro>
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<para>For the prologue variant: is the 64-bit name of the general-purpose register that holds an encoding of the destination address (an integer multiple of 16) and is updated by the instruction, encoded in the "Rd" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="SETGETN_SET_memcms" symboldefcount="1">
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<symbol link="sa_xn_2"><Xn></symbol>
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<account encodedin="Rn">
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<docvars>
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<docvar key="mnemonic" value="SETGETN" />
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<docvar key="pme" value="pme-epilogue" />
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</docvars>
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<intro>
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<para>For the epilogue variant: is the 64-bit name of the general-purpose register that holds an encoding of the number of bytes to be set (an integer multiple of 16) and is set to zero at the end of the instruction, encoded in the "Rn" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="SETGMTN_SET_memcms" symboldefcount="2">
|
|
<symbol link="sa_xn_1"><Xn></symbol>
|
|
<account encodedin="Rn">
|
|
<docvars>
|
|
<docvar key="mnemonic" value="SETGMTN" />
|
|
<docvar key="pme" value="pme-main" />
|
|
</docvars>
|
|
<intro>
|
|
<para>For the main variant: is the 64-bit name of the general-purpose register that holds an encoding of the number of bytes to be set (an integer multiple of 16) and is updated by the instruction, encoded in the "Rn" field.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="SETGPTN_SET_memcms" symboldefcount="3">
|
|
<symbol link="sa_xn"><Xn></symbol>
|
|
<account encodedin="Rn">
|
|
<docvars>
|
|
<docvar key="mnemonic" value="SETGPTN" />
|
|
<docvar key="pme" value="pme-prologue" />
|
|
</docvars>
|
|
<intro>
|
|
<para>For the prologue variant: is the 64-bit name of the general-purpose register that holds the number of bytes to be set (an integer multiple of 16) and is updated by the instruction, encoded in the "Rn" field.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="SETGETN_SET_memcms" symboldefcount="1">
|
|
<symbol link="sa_xs_1"><Xs></symbol>
|
|
<account encodedin="Rs">
|
|
<docvars>
|
|
<docvar key="mnemonic" value="SETGETN" />
|
|
<docvar key="pme" value="pme-epilogue" />
|
|
</docvars>
|
|
<intro>
|
|
<para>For the epilogue variant: is the 64-bit name of the general-purpose register that holds the source data, encoded in the "Rs" field.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="SETGPTN_SET_memcms, SETGMTN_SET_memcms" symboldefcount="2">
|
|
<symbol link="sa_xs"><Xs></symbol>
|
|
<account encodedin="Rs">
|
|
<intro>
|
|
<para>For the main and prologue variant: is the 64-bit name of the general-purpose register that holds the source data in bits<7:0>, encoded in the "Rs" field.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
</explanations>
|
|
<ps_section howmany="1">
|
|
<ps name="aarch64/instrs/memory/mcpymset/setg" mylink="execute" enclabels="" sections="1" secttype="Operation">
|
|
<pstext mayhavelinks="1" section="Execute" rep_section="execute">bits(64) toaddress = <a link="impl-aarch64.X.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) X[integer n, integer width]">X</a>[d, 64];
|
|
bits(64) setsize = <a link="impl-aarch64.X.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) X[integer n, integer width]">X</a>[n, 64];
|
|
bits(8) data = <a link="impl-aarch64.X.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) X[integer n, integer width]">X</a>[s, 8];
|
|
bits(4) nzcv = PSTATE.<N,Z,C,V>;
|
|
bits(64) stagesetsize;
|
|
boolean is_setg = TRUE;
|
|
integer B;
|
|
|
|
boolean supports_option_a = <a link="impl-aarch64.SETGOptionA.0" file="shared_pseudocode.xml" hover="function: boolean SETGOptionA()">SETGOptionA</a>();
|
|
boolean privileged;
|
|
|
|
case PSTATE.EL of
|
|
when <a link="EL0" file="shared_pseudocode.xml" hover="constant bits(2) EL0 = '00'">EL0</a>
|
|
privileged = FALSE;
|
|
when <a link="EL1" file="shared_pseudocode.xml" hover="constant bits(2) EL1 = '01'">EL1</a>
|
|
if <a link="impl-shared.EL2Enabled.0" file="shared_pseudocode.xml" hover="function: boolean EL2Enabled()">EL2Enabled</a>() && <a link="impl-shared.HaveNVExt.0" file="shared_pseudocode.xml" hover="function: boolean HaveNVExt()">HaveNVExt</a>() && HCR_EL2.<NV,NV1> == '11' then
|
|
privileged = TRUE;
|
|
else
|
|
privileged = options<0> == '0';
|
|
when <a link="EL2" file="shared_pseudocode.xml" hover="constant bits(2) EL2 = '10'">EL2</a>
|
|
if <a link="impl-shared.HaveVirtHostExt.0" file="shared_pseudocode.xml" hover="function: boolean HaveVirtHostExt()">HaveVirtHostExt</a>() && HCR_EL2.<E2H,TGE> == '11' then
|
|
privileged = options<0> == '0';
|
|
else
|
|
privileged = TRUE;
|
|
when <a link="EL3" file="shared_pseudocode.xml" hover="constant bits(2) EL3 = '11'">EL3</a>
|
|
privileged = TRUE;
|
|
|
|
if <a link="impl-shared.HaveUAOExt.0" file="shared_pseudocode.xml" hover="function: boolean HaveUAOExt()">HaveUAOExt</a>() && PSTATE.UAO == '1' then
|
|
privileged = PSTATE.EL != <a link="EL0" file="shared_pseudocode.xml" hover="constant bits(2) EL0 = '00'">EL0</a>;
|
|
|
|
boolean nontemporal = options<1> == '1';
|
|
<a link="AccessDescriptor" file="shared_pseudocode.xml" hover="type AccessDescriptor is ( AccessType acctype, bits(2) el, SecurityState ss, boolean acqsc, boolean acqpc, boolean relsc, boolean limitedordered, boolean exclusive, boolean atomicop, MemAtomicOp modop, boolean nontemporal, boolean read, boolean write, CacheOp cacheop, CacheOpScope opscope, CacheType cachetype, boolean pan, boolean transactional, boolean nonfault, boolean firstfault, boolean first, boolean contiguous, boolean streamingsve, boolean ls64, boolean mops, boolean rcw, boolean rcws, boolean toplevel, VARange varange, boolean a32lsmd, boolean tagchecked, boolean tagaccess, MPAMinfo mpam )">AccessDescriptor</a> accdesc = <a link="impl-shared.CreateAccDescSTGMOPS.2" file="shared_pseudocode.xml" hover="function: AccessDescriptor CreateAccDescSTGMOPS(boolean privileged, boolean nontemporal)">CreateAccDescSTGMOPS</a>(privileged, nontemporal);
|
|
|
|
if stage == <a link="MOPSStage_Prologue" file="shared_pseudocode.xml" hover="enumeration MOPSStage { MOPSStage_Prologue, MOPSStage_Main, MOPSStage_Epilogue }">MOPSStage_Prologue</a> then
|
|
if setsize<63> == '1' then setsize = 0x7FFFFFFFFFFFFFF0<63:0>;
|
|
|
|
if setsize != <a link="impl-shared.Zeros.1" file="shared_pseudocode.xml" hover="function: bits(N) Zeros(integer N)">Zeros</a>(64) && !<a link="impl-shared.IsAligned.2" file="shared_pseudocode.xml" hover="function: boolean IsAligned(integer x, integer y)">IsAligned</a>(toaddress, <a link="TAG_GRANULE" file="shared_pseudocode.xml" hover="constant integer TAG_GRANULE = 1 << LOG2_TAG_GRANULE">TAG_GRANULE</a>) then
|
|
<a link="AArch64.Abort.2" file="shared_pseudocode.xml" hover="function: AArch64.Abort(bits(64) vaddress, FaultRecord fault)">AArch64.Abort</a>(toaddress, <a link="impl-shared.AlignmentFault.1" file="shared_pseudocode.xml" hover="function: FaultRecord AlignmentFault(AccessDescriptor accdesc)">AlignmentFault</a>(accdesc));
|
|
|
|
if !<a link="impl-shared.IsAligned.2" file="shared_pseudocode.xml" hover="function: boolean IsAligned(integer x, integer y)">IsAligned</a>(setsize, <a link="TAG_GRANULE" file="shared_pseudocode.xml" hover="constant integer TAG_GRANULE = 1 << LOG2_TAG_GRANULE">TAG_GRANULE</a>) then
|
|
<a link="AArch64.Abort.2" file="shared_pseudocode.xml" hover="function: AArch64.Abort(bits(64) vaddress, FaultRecord fault)">AArch64.Abort</a>(toaddress, <a link="impl-shared.AlignmentFault.1" file="shared_pseudocode.xml" hover="function: FaultRecord AlignmentFault(AccessDescriptor accdesc)">AlignmentFault</a>(accdesc));
|
|
|
|
if supports_option_a then
|
|
nzcv = '0000';
|
|
toaddress = toaddress + setsize;
|
|
setsize = <a link="impl-shared.Zeros.1" file="shared_pseudocode.xml" hover="function: bits(N) Zeros(integer N)">Zeros</a>(64) - setsize;
|
|
else
|
|
nzcv = '0010';
|
|
|
|
stagesetsize = <a link="impl-aarch64.SETPreSizeChoice.3" file="shared_pseudocode.xml" hover="function: bits(64) SETPreSizeChoice(bits(64) toaddress, bits(64) setsize, boolean IsSETGP)">SETPreSizeChoice</a>(toaddress, setsize, is_setg);
|
|
assert stagesetsize<63> == setsize<63> || stagesetsize == <a link="impl-shared.Zeros.1" file="shared_pseudocode.xml" hover="function: bits(N) Zeros(integer N)">Zeros</a>(64);
|
|
assert stagesetsize<3:0> == '0000';
|
|
|
|
if <a link="impl-shared.SInt.1" file="shared_pseudocode.xml" hover="function: integer SInt(bits(N) x)">SInt</a>(setsize) > 0 then
|
|
assert <a link="impl-shared.SInt.1" file="shared_pseudocode.xml" hover="function: integer SInt(bits(N) x)">SInt</a>(stagesetsize) <= <a link="impl-shared.SInt.1" file="shared_pseudocode.xml" hover="function: integer SInt(bits(N) x)">SInt</a>(setsize);
|
|
else
|
|
assert <a link="impl-shared.SInt.1" file="shared_pseudocode.xml" hover="function: integer SInt(bits(N) x)">SInt</a>(stagesetsize) >= <a link="impl-shared.SInt.1" file="shared_pseudocode.xml" hover="function: integer SInt(bits(N) x)">SInt</a>(setsize);
|
|
else
|
|
bits(64) postsize = <a link="impl-aarch64.SETPostSizeChoice.3" file="shared_pseudocode.xml" hover="function: bits(64) SETPostSizeChoice(bits(64) toaddress, bits(64) setsize, boolean IsSETGE)">SETPostSizeChoice</a>(toaddress, setsize, is_setg);
|
|
assert postsize<63> == setsize<63> || postsize == <a link="impl-shared.Zeros.1" file="shared_pseudocode.xml" hover="function: bits(N) Zeros(integer N)">Zeros</a>(64);
|
|
assert postsize<3:0> == '0000';
|
|
|
|
boolean zero_size_exceptions = <a link="impl-aarch64.MemSetZeroSizeCheck.0" file="shared_pseudocode.xml" hover="function: boolean MemSetZeroSizeCheck()">MemSetZeroSizeCheck</a>();
|
|
|
|
// Check if this version is consistent with the state of the call.
|
|
if zero_size_exceptions || <a link="impl-shared.SInt.1" file="shared_pseudocode.xml" hover="function: integer SInt(bits(N) x)">SInt</a>(setsize) != 0 then
|
|
if supports_option_a then
|
|
if nzcv<1> == '1' then // PSTATE.C
|
|
boolean wrong_option = TRUE;
|
|
boolean from_epilogue = stage == <a link="MOPSStage_Epilogue" file="shared_pseudocode.xml" hover="enumeration MOPSStage { MOPSStage_Prologue, MOPSStage_Main, MOPSStage_Epilogue }">MOPSStage_Epilogue</a>;
|
|
<a link="impl-aarch64.MismatchedMemSetException.8" file="shared_pseudocode.xml" hover="function: MismatchedMemSetException(boolean option_a, integer destreg, integer datareg, integer sizereg, boolean wrong_option, boolean from_epilogue, bits(2) options, boolean is_SETG)">MismatchedMemSetException</a>(supports_option_a, d, s, n, wrong_option,
|
|
from_epilogue, options, is_setg);
|
|
else
|
|
if nzcv<1> == '0' then // PSTATE.C
|
|
boolean wrong_option = TRUE;
|
|
boolean from_epilogue = stage == <a link="MOPSStage_Epilogue" file="shared_pseudocode.xml" hover="enumeration MOPSStage { MOPSStage_Prologue, MOPSStage_Main, MOPSStage_Epilogue }">MOPSStage_Epilogue</a>;
|
|
<a link="impl-aarch64.MismatchedMemSetException.8" file="shared_pseudocode.xml" hover="function: MismatchedMemSetException(boolean option_a, integer destreg, integer datareg, integer sizereg, boolean wrong_option, boolean from_epilogue, bits(2) options, boolean is_SETG)">MismatchedMemSetException</a>(supports_option_a, d, s, n, wrong_option,
|
|
from_epilogue, options, is_setg);
|
|
|
|
if stage == <a link="MOPSStage_Main" file="shared_pseudocode.xml" hover="enumeration MOPSStage { MOPSStage_Prologue, MOPSStage_Main, MOPSStage_Epilogue }">MOPSStage_Main</a> then
|
|
stagesetsize = setsize - postsize;
|
|
if <a link="impl-aarch64.MemSetParametersIllformedM.3" file="shared_pseudocode.xml" hover="function: boolean MemSetParametersIllformedM(bits(64) toaddress, bits(64) setsize, boolean IsSETGM)">MemSetParametersIllformedM</a>(toaddress, setsize, is_setg) then
|
|
boolean wrong_option = FALSE;
|
|
boolean from_epilogue = FALSE;
|
|
<a link="impl-aarch64.MismatchedMemSetException.8" file="shared_pseudocode.xml" hover="function: MismatchedMemSetException(boolean option_a, integer destreg, integer datareg, integer sizereg, boolean wrong_option, boolean from_epilogue, bits(2) options, boolean is_SETG)">MismatchedMemSetException</a>(supports_option_a, d, s, n, wrong_option,
|
|
from_epilogue, options, is_setg);
|
|
else
|
|
stagesetsize = postsize;
|
|
if (setsize != postsize || <a link="impl-aarch64.MemSetParametersIllformedE.3" file="shared_pseudocode.xml" hover="function: boolean MemSetParametersIllformedE(bits(64) toaddress, bits(64) setsize, boolean IsSETGE)">MemSetParametersIllformedE</a>(toaddress, setsize, is_setg)) then
|
|
boolean wrong_option = FALSE;
|
|
boolean from_epilogue = TRUE;
|
|
<a link="impl-aarch64.MismatchedMemSetException.8" file="shared_pseudocode.xml" hover="function: MismatchedMemSetException(boolean option_a, integer destreg, integer datareg, integer sizereg, boolean wrong_option, boolean from_epilogue, bits(2) options, boolean is_SETG)">MismatchedMemSetException</a>(supports_option_a, d, s, n, wrong_option,
|
|
from_epilogue, options, is_setg);
|
|
|
|
if setsize != <a link="impl-shared.Zeros.1" file="shared_pseudocode.xml" hover="function: bits(N) Zeros(integer N)">Zeros</a>(64) && !<a link="impl-shared.IsAligned.2" file="shared_pseudocode.xml" hover="function: boolean IsAligned(integer x, integer y)">IsAligned</a>(toaddress, <a link="TAG_GRANULE" file="shared_pseudocode.xml" hover="constant integer TAG_GRANULE = 1 << LOG2_TAG_GRANULE">TAG_GRANULE</a>) then
|
|
<a link="AArch64.Abort.2" file="shared_pseudocode.xml" hover="function: AArch64.Abort(bits(64) vaddress, FaultRecord fault)">AArch64.Abort</a>(toaddress, <a link="impl-shared.AlignmentFault.1" file="shared_pseudocode.xml" hover="function: FaultRecord AlignmentFault(AccessDescriptor accdesc)">AlignmentFault</a>(accdesc));
|
|
|
|
if !<a link="impl-shared.IsAligned.2" file="shared_pseudocode.xml" hover="function: boolean IsAligned(integer x, integer y)">IsAligned</a>(setsize, <a link="TAG_GRANULE" file="shared_pseudocode.xml" hover="constant integer TAG_GRANULE = 1 << LOG2_TAG_GRANULE">TAG_GRANULE</a>) then
|
|
<a link="AArch64.Abort.2" file="shared_pseudocode.xml" hover="function: AArch64.Abort(bits(64) vaddress, FaultRecord fault)">AArch64.Abort</a>(toaddress, <a link="impl-shared.AlignmentFault.1" file="shared_pseudocode.xml" hover="function: FaultRecord AlignmentFault(AccessDescriptor accdesc)">AlignmentFault</a>(accdesc));
|
|
|
|
integer tagstep;
|
|
bits(4) tag;
|
|
bits(64) tagaddr;
|
|
|
|
if supports_option_a then
|
|
while <a link="impl-shared.SInt.1" file="shared_pseudocode.xml" hover="function: integer SInt(bits(N) x)">SInt</a>(stagesetsize) < 0 do
|
|
// IMP DEF selection of the block size that is worked on. While many
|
|
// implementations might make this constant, that is not assumed.
|
|
B = <a link="impl-aarch64.SETSizeChoice.3" file="shared_pseudocode.xml" hover="function: integer SETSizeChoice(bits(64) toaddress, bits(64) setsize, integer AlignSize)">SETSizeChoice</a>(toaddress, setsize, 16);
|
|
assert B <= -1*<a link="impl-shared.SInt.1" file="shared_pseudocode.xml" hover="function: integer SInt(bits(N) x)">SInt</a>(stagesetsize);
|
|
assert B<3:0> == '0000';
|
|
|
|
Mem[toaddress + setsize, B, accdesc] = <a link="impl-shared.Replicate.2" file="shared_pseudocode.xml" hover="function: bits(M*N) Replicate(bits(M) x, integer N)">Replicate</a>(data, B);
|
|
|
|
tagstep = B DIV 16;
|
|
tag = <a link="AArch64.AllocationTagFromAddress.1" file="shared_pseudocode.xml" hover="function: bits(4) AArch64.AllocationTagFromAddress(bits(64) tagged_address)">AArch64.AllocationTagFromAddress</a>(toaddress + setsize);
|
|
while tagstep > 0 do
|
|
tagaddr = toaddress + setsize + (tagstep-1) * 16;
|
|
<a link="AArch64.MemTag.write.2" file="shared_pseudocode.xml" hover="accessor: AArch64.MemTag[bits(64) address, AccessDescriptor accdesc_in] = bits(4) value">AArch64.MemTag</a>[tagaddr, accdesc] = tag;
|
|
tagstep = tagstep - 1;
|
|
|
|
setsize = setsize + B;
|
|
stagesetsize = stagesetsize + B;
|
|
if stage != <a link="MOPSStage_Prologue" file="shared_pseudocode.xml" hover="enumeration MOPSStage { MOPSStage_Prologue, MOPSStage_Main, MOPSStage_Epilogue }">MOPSStage_Prologue</a> then
|
|
<a link="impl-aarch64.X.write.2" file="shared_pseudocode.xml" hover="accessor: X[integer n, integer width] = bits(width) value">X</a>[n, 64] = setsize;
|
|
else
|
|
while <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(stagesetsize) > 0 do
|
|
// IMP DEF selection of the block size that is worked on. While many
|
|
// implementations might make this constant, that is not assumed.
|
|
B = <a link="impl-aarch64.SETSizeChoice.3" file="shared_pseudocode.xml" hover="function: integer SETSizeChoice(bits(64) toaddress, bits(64) setsize, integer AlignSize)">SETSizeChoice</a>(toaddress, setsize, 16);
|
|
assert B <= <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(stagesetsize);
|
|
assert B<3:0> == '0000';
|
|
|
|
Mem[toaddress, B, accdesc] = <a link="impl-shared.Replicate.2" file="shared_pseudocode.xml" hover="function: bits(M*N) Replicate(bits(M) x, integer N)">Replicate</a>(data, B);
|
|
|
|
tagstep = B DIV 16;
|
|
tag = <a link="AArch64.AllocationTagFromAddress.1" file="shared_pseudocode.xml" hover="function: bits(4) AArch64.AllocationTagFromAddress(bits(64) tagged_address)">AArch64.AllocationTagFromAddress</a>(toaddress);
|
|
while tagstep > 0 do
|
|
tagaddr = toaddress + (tagstep-1) * 16;
|
|
<a link="AArch64.MemTag.write.2" file="shared_pseudocode.xml" hover="accessor: AArch64.MemTag[bits(64) address, AccessDescriptor accdesc_in] = bits(4) value">AArch64.MemTag</a>[tagaddr, accdesc] = tag;
|
|
tagstep = tagstep - 1;
|
|
|
|
toaddress = toaddress + B;
|
|
setsize = setsize - B;
|
|
stagesetsize = stagesetsize - B;
|
|
if stage != <a link="MOPSStage_Prologue" file="shared_pseudocode.xml" hover="enumeration MOPSStage { MOPSStage_Prologue, MOPSStage_Main, MOPSStage_Epilogue }">MOPSStage_Prologue</a> then
|
|
<a link="impl-aarch64.X.write.2" file="shared_pseudocode.xml" hover="accessor: X[integer n, integer width] = bits(width) value">X</a>[n, 64] = setsize;
|
|
<a link="impl-aarch64.X.write.2" file="shared_pseudocode.xml" hover="accessor: X[integer n, integer width] = bits(width) value">X</a>[d, 64] = toaddress;
|
|
|
|
if stage == <a link="MOPSStage_Prologue" file="shared_pseudocode.xml" hover="enumeration MOPSStage { MOPSStage_Prologue, MOPSStage_Main, MOPSStage_Epilogue }">MOPSStage_Prologue</a> then
|
|
<a link="impl-aarch64.X.write.2" file="shared_pseudocode.xml" hover="accessor: X[integer n, integer width] = bits(width) value">X</a>[n, 64] = setsize;
|
|
<a link="impl-aarch64.X.write.2" file="shared_pseudocode.xml" hover="accessor: X[integer n, integer width] = bits(width) value">X</a>[d, 64] = toaddress;
|
|
PSTATE.<N,Z,C,V> = nzcv;</pstext>
|
|
</ps>
|
|
</ps_section>
|
|
</instructionsection>
|