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archived-ballistic/spec/arm64_xml/asr_z_zi.xml
Ronald Caesar 26a677f8b4 decoder: Add ARM specification docs
Signed-off-by: Ronald Caesar <github43132@proton.me>
2025-12-12 18:11:36 -04:00

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XML

<?xml version="1.0" encoding="utf-8"?>
<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
<instructionsection id="asr_z_zi" title="ASR (immediate, unpredicated)" type="instruction">
<docvars>
<docvar key="instr-class" value="sve" />
<docvar key="isa" value="A64" />
<docvar key="mnemonic" value="ASR" />
</docvars>
<heading>ASR (immediate, unpredicated)</heading>
<desc>
<brief>Arithmetic shift right by immediate (unpredicated)</brief>
<description>
<para>Shift right by immediate, preserving the sign bit, each element of the source vector, and place the results in the corresponding elements of the destination vector. The immediate shift amount is an unsigned value in the range 1 to number of bits per element. This instruction is unpredicated.</para>
</description>
<status>Green</status>
<predicated>False</predicated>
<uses_dit condition="FEAT_SVE2 is implemented or FEAT_SME is implemented">True</uses_dit>
</desc>
<alias_list howmany="0"></alias_list>
<classes>
<iclass name="SVE" oneof="1" id="iclass_sve" no_encodings="1" isa="A64">
<docvars>
<docvar key="instr-class" value="sve" />
<docvar key="isa" value="A64" />
<docvar key="mnemonic" value="ASR" />
</docvars>
<iclassintro count="1"></iclassintro>
<regdiagram form="32" psname="ASR-Z.ZI-_" tworows="1">
<box hibit="31" width="8" settings="8">
<c>0</c>
<c>0</c>
<c>0</c>
<c>0</c>
<c>0</c>
<c>1</c>
<c>0</c>
<c>0</c>
</box>
<box hibit="23" width="2" name="tszh" usename="1">
<c colspan="2"></c>
</box>
<box hibit="21" settings="1">
<c>1</c>
</box>
<box hibit="20" width="2" name="tszl" usename="1">
<c colspan="2"></c>
</box>
<box hibit="18" width="3" name="imm3" usename="1">
<c colspan="3"></c>
</box>
<box hibit="15" width="4" settings="4">
<c>1</c>
<c>0</c>
<c>0</c>
<c>1</c>
</box>
<box hibit="11" settings="1">
<c>0</c>
</box>
<box hibit="10" name="U" usename="1" settings="1">
<c>0</c>
</box>
<box hibit="9" width="5" name="Zn" usename="1">
<c colspan="5"></c>
</box>
<box hibit="4" width="5" name="Zd" usename="1">
<c colspan="5"></c>
</box>
</regdiagram>
<encoding name="asr_z_zi_" oneofinclass="1" oneof="1" label="">
<docvars>
<docvar key="instr-class" value="sve" />
<docvar key="isa" value="A64" />
<docvar key="mnemonic" value="ASR" />
</docvars>
<asmtemplate><text>ASR </text><a link="sa_zd" hover="Destination scalable vector register (field &quot;Zd&quot;)">&lt;Zd&gt;</a><text>.</text><a link="sa_t" hover="Size specifier (field &quot;tszh:tszl&quot;) [B,D,H,S]">&lt;T&gt;</a><text>, </text><a link="sa_zn" hover="Source scalable vector register (field &quot;Zn&quot;)">&lt;Zn&gt;</a><text>.</text><a link="sa_t" hover="Size specifier (field &quot;tszh:tszl&quot;) [B,D,H,S]">&lt;T&gt;</a><text>, #</text><a link="sa_const" hover="Immediate shift amount [1-number of bits per element] (field &quot;tszh:tszl:imm3&quot;)">&lt;const&gt;</a></asmtemplate>
</encoding>
<ps_section howmany="1">
<ps name="ASR-Z.ZI-_" mylink="ASR-Z.ZI-_" enclabels="" sections="1" secttype="noheading">
<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSVE.0" file="shared_pseudocode.xml" hover="function: boolean HaveSVE()">HaveSVE</a>() &amp;&amp; !<a link="impl-aarch64.HaveSME.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME()">HaveSME</a>() then UNDEFINED;
bits(4) tsize = tszh:tszl;
integer esize;
case tsize of
when '0000' UNDEFINED;
when '0001' esize = 8;
when '001x' esize = 16;
when '01xx' esize = 32;
when '1xxx' esize = 64;
integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zn);
integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zd);
integer shift = (2 * esize) - <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(tsize:imm3);</pstext>
</ps>
</ps_section>
</iclass>
</classes>
<explanations scope="all">
<explanation enclist="asr_z_zi_" symboldefcount="1">
<symbol link="sa_zd">&lt;Zd&gt;</symbol>
<account encodedin="Zd">
<intro>
<para>Is the name of the destination scalable vector register, encoded in the "Zd" field.</para>
</intro>
</account>
</explanation>
<explanation enclist="asr_z_zi_" symboldefcount="1">
<symbol link="sa_t">&lt;T&gt;</symbol>
<definition encodedin="tszh:tszl">
<intro>Is the size specifier, </intro>
<table class="valuetable">
<tgroup cols="3">
<thead>
<row>
<entry class="bitfield">tszh</entry>
<entry class="bitfield">tszl</entry>
<entry class="symbol">&lt;T&gt;</entry>
</row>
</thead>
<tbody>
<row>
<entry class="bitfield">00</entry>
<entry class="bitfield">00</entry>
<entry class="symbol">RESERVED</entry>
</row>
<row>
<entry class="bitfield">00</entry>
<entry class="bitfield">01</entry>
<entry class="symbol">B</entry>
</row>
<row>
<entry class="bitfield">00</entry>
<entry class="bitfield">1x</entry>
<entry class="symbol">H</entry>
</row>
<row>
<entry class="bitfield">01</entry>
<entry class="bitfield">xx</entry>
<entry class="symbol">S</entry>
</row>
<row>
<entry class="bitfield">1x</entry>
<entry class="bitfield">xx</entry>
<entry class="symbol">D</entry>
</row>
</tbody>
</tgroup>
</table>
</definition>
</explanation>
<explanation enclist="asr_z_zi_" symboldefcount="1">
<symbol link="sa_zn">&lt;Zn&gt;</symbol>
<account encodedin="Zn">
<intro>
<para>Is the name of the source scalable vector register, encoded in the "Zn" field.</para>
</intro>
</account>
</explanation>
<explanation enclist="asr_z_zi_" symboldefcount="1">
<symbol link="sa_const">&lt;const&gt;</symbol>
<account encodedin="imm3:tszh:tszl">
<intro>
<para>Is the immediate shift amount, in the range 1 to number of bits per element, encoded in "tszh:tszl:imm3".</para>
</intro>
</account>
</explanation>
</explanations>
<ps_section howmany="1">
<ps name="ASR-Z.ZI-_" mylink="execute" enclabels="" sections="1" secttype="Operation">
<pstext mayhavelinks="1" section="Execute" rep_section="execute"><a link="impl-aarch64.CheckSVEEnabled.0" file="shared_pseudocode.xml" hover="function: CheckSVEEnabled()">CheckSVEEnabled</a>();
constant integer VL = <a link="impl-aarch64.CurrentVL.read.none" file="shared_pseudocode.xml" hover="accessor: integer CurrentVL">CurrentVL</a>;
constant integer elements = VL DIV esize;
bits(VL) operand1 = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[n, VL];
bits(VL) result;
for e = 0 to elements-1
bits(esize) element1 = <a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[operand1, e, esize];
<a link="impl-shared.Elem.write.3" file="shared_pseudocode.xml" hover="accessor: Elem[bits(N) &amp;vector, integer e, integer size] = bits(size) value">Elem</a>[result, e, esize] = <a link="impl-shared.ASR.2" file="shared_pseudocode.xml" hover="function: bits(N) ASR(bits(N) x, integer shift)">ASR</a>(element1, shift);
<a link="impl-aarch64.Z.write.2" file="shared_pseudocode.xml" hover="accessor: Z[integer n, integer width] = bits(width) value">Z</a>[d, VL] = result;</pstext>
</ps>
</ps_section>
</instructionsection>