archived-ballistic/spec/arm64_xml/bcax_z_zzz.xml

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<instructionsection id="bcax_z_zzz" title="BCAX" type="instruction">
  <docvars>
    <docvar key="instr-class" value="sve2" />
    <docvar key="isa" value="A64" />
    <docvar key="mnemonic" value="BCAX" />
  </docvars>
  <heading>BCAX</heading>
  <desc>
    <brief>Bitwise clear and exclusive OR</brief>
    <description>
      <para>Bitwise AND elements of the second source vector with the corresponding inverted elements of the third source vector, then exclusive OR the results with corresponding elements of the first source vector. The final results are destructively placed in the corresponding elements of the destination and first source vector. This instruction is unpredicated.</para>
    </description>
    <status>Green</status>
    <predicated>False</predicated>
    <uses_dit condition="FEAT_SVE2 is implemented or FEAT_SME is implemented">True</uses_dit>
    <takes_movprfx>True</takes_movprfx>
  </desc>
  <alias_list howmany="0"></alias_list>
  <classes>
    <iclass name="SVE2" oneof="1" id="iclass_sve2" no_encodings="1" isa="A64">
      <docvars>
        <docvar key="instr-class" value="sve2" />
        <docvar key="isa" value="A64" />
        <docvar key="mnemonic" value="BCAX" />
      </docvars>
      <iclassintro count="1"></iclassintro>
      <regdiagram form="32" psname="BCAX-Z.ZZZ-_">
        <box hibit="31" width="8" settings="8">
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>1</c>
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="23" name="opc&lt;1&gt;" settings="1">
          <c>0</c>
        </box>
        <box hibit="22" name="opc&lt;0&gt;" settings="1">
          <c>1</c>
        </box>
        <box hibit="21" settings="1">
          <c>1</c>
        </box>
        <box hibit="20" width="5" name="Zm" usename="1">
          <c colspan="5"></c>
        </box>
        <box hibit="15" width="5" settings="5">
          <c>0</c>
          <c>0</c>
          <c>1</c>
          <c>1</c>
          <c>1</c>
        </box>
        <box hibit="10" name="o2" settings="1">
          <c>0</c>
        </box>
        <box hibit="9" width="5" name="Zk" usename="1">
          <c colspan="5"></c>
        </box>
        <box hibit="4" width="5" name="Zdn" usename="1">
          <c colspan="5"></c>
        </box>
      </regdiagram>
      <encoding name="bcax_z_zzz_" oneofinclass="1" oneof="1" label="">
        <docvars>
          <docvar key="instr-class" value="sve2" />
          <docvar key="isa" value="A64" />
          <docvar key="mnemonic" value="BCAX" />
        </docvars>
        <asmtemplate><text>BCAX    </text><a link="sa_zdn" hover="First source and destination scalable vector register (field &quot;Zdn&quot;)">&lt;Zdn&gt;</a><text>.D, </text><a link="sa_zdn" hover="First source and destination scalable vector register (field &quot;Zdn&quot;)">&lt;Zdn&gt;</a><text>.D, </text><a link="sa_zm" hover="Second source scalable vector register (field &quot;Zm&quot;)">&lt;Zm&gt;</a><text>.D, </text><a link="sa_zk" hover="Third source scalable vector register (field &quot;Zk&quot;)">&lt;Zk&gt;</a><text>.D</text></asmtemplate>
      </encoding>
      <ps_section howmany="1">
        <ps name="BCAX-Z.ZZZ-_" mylink="BCAX-Z.ZZZ-_" enclabels="" sections="1" secttype="noheading">
          <pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSVE2.0" file="shared_pseudocode.xml" hover="function: boolean HaveSVE2()">HaveSVE2</a>() &amp;&amp; !<a link="impl-aarch64.HaveSME.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME()">HaveSME</a>() then UNDEFINED;
integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zm);
integer k = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zk);
integer dn = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zdn);</pstext>
        </ps>
      </ps_section>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="bcax_z_zzz_" symboldefcount="1">
      <symbol link="sa_zdn">&lt;Zdn&gt;</symbol>
      <account encodedin="Zdn">
        <intro>
          <para>Is the name of the first source and destination scalable vector register, encoded in the "Zdn" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="bcax_z_zzz_" symboldefcount="1">
      <symbol link="sa_zm">&lt;Zm&gt;</symbol>
      <account encodedin="Zm">
        <intro>
          <para>Is the name of the second source scalable vector register, encoded in the "Zm" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="bcax_z_zzz_" symboldefcount="1">
      <symbol link="sa_zk">&lt;Zk&gt;</symbol>
      <account encodedin="Zk">
        <intro>
          <para>Is the name of the third source scalable vector register, encoded in the "Zk" field.</para>
        </intro>
      </account>
    </explanation>
  </explanations>
  <ps_section howmany="1">
    <ps name="BCAX-Z.ZZZ-_" mylink="execute" enclabels="" sections="1" secttype="Operation">
      <pstext mayhavelinks="1" section="Execute" rep_section="execute"><a link="impl-aarch64.CheckSVEEnabled.0" file="shared_pseudocode.xml" hover="function: CheckSVEEnabled()">CheckSVEEnabled</a>();
constant integer VL = <a link="impl-aarch64.CurrentVL.read.none" file="shared_pseudocode.xml" hover="accessor: integer CurrentVL">CurrentVL</a>;
bits(VL) operand1 = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[dn, VL];
bits(VL) operand2 = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[m, VL];
bits(VL) operand3 = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[k, VL];

<a link="impl-aarch64.Z.write.2" file="shared_pseudocode.xml" hover="accessor: Z[integer n, integer width] = bits(width) value">Z</a>[dn, VL] = operand1 EOR (operand2 AND NOT(operand3));</pstext>
    </ps>
  </ps_section>
</instructionsection>