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archived-ballistic/spec/arm64_xml/at_sys.xml
Ronald Caesar 26a677f8b4 decoder: Add ARM specification docs
Signed-off-by: Ronald Caesar <github43132@proton.me>
2025-12-12 18:11:36 -04:00

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<?xml version="1.0" encoding="utf-8"?>
<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
<instructionsection id="AT_SYS" title="AT -- A64" type="alias">
<docvars>
<docvar key="alias_mnemonic" value="AT" />
<docvar key="instr-class" value="system" />
<docvar key="isa" value="A64" />
<docvar key="mnemonic" value="SYS" />
</docvars>
<heading>AT</heading>
<desc>
<brief>
<para>Address Translate</para>
</brief>
<authored>
<para>Address Translate. For more information, see <xref linkend="BABEJJJE">op0==0b01, cache maintenance, TLB maintenance, and address translation instructions</xref>.</para>
</authored>
</desc>
<aliasto refiform="sys.xml" iformid="SYS">SYS</aliasto>
<classes>
<iclass name="System" oneof="1" id="iclass_system" no_encodings="1" isa="A64">
<docvars>
<docvar key="instr-class" value="system" />
<docvar key="isa" value="A64" />
<docvar key="mnemonic" value="SYS" />
</docvars>
<iclassintro count="1"></iclassintro>
<regdiagram form="32" psname="aarch64/instrs/system/sysops" tworows="1">
<box hibit="31" width="10" settings="10">
<c>1</c>
<c>1</c>
<c>0</c>
<c>1</c>
<c>0</c>
<c>1</c>
<c>0</c>
<c>1</c>
<c>0</c>
<c>0</c>
</box>
<box hibit="21" name="L" usename="1" settings="1" psbits="x">
<c>0</c>
</box>
<box hibit="20" width="2" name="op0" settings="2">
<c>0</c>
<c>1</c>
</box>
<box hibit="18" width="3" name="op1" usename="1">
<c colspan="3"></c>
</box>
<box hibit="15" width="4" name="CRn" usename="1" settings="4" psbits="xxxx">
<c>0</c>
<c>1</c>
<c>1</c>
<c>1</c>
</box>
<box hibit="11" width="4" name="CRm" usename="1" settings="3" psbits="xxxx">
<c>1</c>
<c>0</c>
<c>0</c>
<c>x</c>
</box>
<box hibit="7" width="3" name="op2" usename="1">
<c colspan="3"></c>
</box>
<box hibit="4" width="5" name="Rt" usename="1">
<c colspan="5"></c>
</box>
</regdiagram>
<encoding name="AT_SYS_CR_systeminstrs" oneofinclass="1" oneof="1" label="">
<docvars>
<docvar key="alias_mnemonic" value="AT" />
<docvar key="instr-class" value="system" />
<docvar key="isa" value="A64" />
<docvar key="mnemonic" value="SYS" />
</docvars>
<asmtemplate><text>AT </text><a link="sa_at_op" hover="AT instruction name, as listed for AT system instruction group (field &quot;op1:CRm&lt;0&gt;:op2&quot;) [S1E0R,S1E0W,S1E1R,S1E1RP (FEAT_PAN2),S1E1W,S1E1WP (FEAT_PAN2),S1E2R,S1E2W,S1E3R,S1E3W,S12E0R,S12E0W,S12E1R,S12E1W]">&lt;at_op&gt;</a><text>, </text><a link="sa_xt_1" hover="64-bit general-purpose source register (field &quot;Rt&quot;)">&lt;Xt&gt;</a></asmtemplate>
<equivalent_to>
<asmtemplate><a href="sys.xml#SYS_CR_systeminstrs">SYS</a><text> #</text><a link="sa_op1" hover="3-bit unsigned immediate [0-7] (field &quot;op1&quot;)">&lt;op1&gt;</a><text>, C7, </text><a link="sa_cm" hover="Name 'Cm', with 'm' [0-15] (field &quot;CRm&quot;)">&lt;Cm&gt;</a><text>, #</text><a link="sa_op2" hover="3-bit unsigned immediate [0-7] (field &quot;op2&quot;)">&lt;op2&gt;</a><text>, </text><a link="sa_xt_1" hover="64-bit general-purpose source register (field &quot;Rt&quot;)">&lt;Xt&gt;</a></asmtemplate>
<aliascond><a link="impl-aarch64.SysOp.4" file="shared_pseudocode.xml" hover="function: SystemOp SysOp(bits(3) op1, bits(4) CRn, bits(4) CRm, bits(3) op2)">SysOp</a>(op1,'0111',CRm,op2) == <a link="Sys_AT" file="shared_pseudocode.xml" hover="enumeration SystemOp {Sys_AT, Sys_BRB, Sys_DC, Sys_IC, Sys_TLBI, Sys_SYS}">Sys_AT</a></aliascond>
</equivalent_to>
</encoding>
</iclass>
</classes>
<explanations scope="all">
<explanation enclist="AT_SYS_CR_systeminstrs" symboldefcount="1">
<symbol link="sa_at_op">&lt;at_op&gt;</symbol>
<definition encodedin="op1:CRm&lt;0&gt;:op2">
<intro>Is an AT instruction name, as listed for the AT system instruction group, </intro>
<table class="valuetable">
<tgroup cols="4">
<thead>
<row>
<entry class="bitfield">op1</entry>
<entry class="bitfield">CRm&lt;0&gt;</entry>
<entry class="bitfield">op2</entry>
<entry class="symbol">&lt;at_op&gt;</entry>
<entry class="symbol">Architectural Feature</entry>
</row>
</thead>
<tbody>
<row>
<entry class="bitfield">000</entry>
<entry class="bitfield">0</entry>
<entry class="bitfield">000</entry>
<entry class="symbol">S1E1R</entry>
<entry class="feature" />
</row>
<row>
<entry class="bitfield">000</entry>
<entry class="bitfield">0</entry>
<entry class="bitfield">001</entry>
<entry class="symbol">S1E1W</entry>
<entry class="feature" />
</row>
<row>
<entry class="bitfield">000</entry>
<entry class="bitfield">0</entry>
<entry class="bitfield">010</entry>
<entry class="symbol">S1E0R</entry>
<entry class="feature" />
</row>
<row>
<entry class="bitfield">000</entry>
<entry class="bitfield">0</entry>
<entry class="bitfield">011</entry>
<entry class="symbol">S1E0W</entry>
<entry class="feature" />
</row>
<row>
<entry class="bitfield">000</entry>
<entry class="bitfield">1</entry>
<entry class="bitfield">000</entry>
<entry class="symbol">S1E1RP</entry>
<entry class="feature">
<arch_variants>
<arch_variant feature="FEAT_PAN2" />
</arch_variants>
</entry>
</row>
<row>
<entry class="bitfield">000</entry>
<entry class="bitfield">1</entry>
<entry class="bitfield">001</entry>
<entry class="symbol">S1E1WP</entry>
<entry class="feature">
<arch_variants>
<arch_variant feature="FEAT_PAN2" />
</arch_variants>
</entry>
</row>
<row>
<entry class="bitfield">100</entry>
<entry class="bitfield">0</entry>
<entry class="bitfield">000</entry>
<entry class="symbol">S1E2R</entry>
<entry class="feature" />
</row>
<row>
<entry class="bitfield">100</entry>
<entry class="bitfield">0</entry>
<entry class="bitfield">001</entry>
<entry class="symbol">S1E2W</entry>
<entry class="feature" />
</row>
<row>
<entry class="bitfield">100</entry>
<entry class="bitfield">0</entry>
<entry class="bitfield">100</entry>
<entry class="symbol">S12E1R</entry>
<entry class="feature" />
</row>
<row>
<entry class="bitfield">100</entry>
<entry class="bitfield">0</entry>
<entry class="bitfield">101</entry>
<entry class="symbol">S12E1W</entry>
<entry class="feature" />
</row>
<row>
<entry class="bitfield">100</entry>
<entry class="bitfield">0</entry>
<entry class="bitfield">110</entry>
<entry class="symbol">S12E0R</entry>
<entry class="feature" />
</row>
<row>
<entry class="bitfield">100</entry>
<entry class="bitfield">0</entry>
<entry class="bitfield">111</entry>
<entry class="symbol">S12E0W</entry>
<entry class="feature" />
</row>
<row>
<entry class="bitfield">110</entry>
<entry class="bitfield">0</entry>
<entry class="bitfield">000</entry>
<entry class="symbol">S1E3R</entry>
<entry class="feature" />
</row>
<row>
<entry class="bitfield">110</entry>
<entry class="bitfield">0</entry>
<entry class="bitfield">001</entry>
<entry class="symbol">S1E3W</entry>
<entry class="feature" />
</row>
</tbody>
</tgroup>
</table>
</definition>
</explanation>
<explanation enclist="AT_SYS_CR_systeminstrs" symboldefcount="1">
<symbol link="sa_op1">&lt;op1&gt;</symbol>
<account encodedin="op1">
<intro>
<para>Is a 3-bit unsigned immediate, in the range 0 to 7, encoded in the "op1" field.</para>
</intro>
</account>
</explanation>
<explanation enclist="AT_SYS_CR_systeminstrs" symboldefcount="1">
<symbol link="sa_cm">&lt;Cm&gt;</symbol>
<account encodedin="CRm">
<intro>
<para>Is a name 'Cm', with 'm' in the range 0 to 15, encoded in the "CRm" field.</para>
</intro>
</account>
</explanation>
<explanation enclist="AT_SYS_CR_systeminstrs" symboldefcount="1">
<symbol link="sa_op2">&lt;op2&gt;</symbol>
<account encodedin="op2">
<intro>
<para>Is a 3-bit unsigned immediate, in the range 0 to 7, encoded in the "op2" field.</para>
</intro>
</account>
</explanation>
<explanation enclist="AT_SYS_CR_systeminstrs" symboldefcount="1">
<symbol link="sa_xt_1">&lt;Xt&gt;</symbol>
<account encodedin="Rt">
<intro>
<para>Is the 64-bit name of the general-purpose source register, encoded in the "Rt" field.</para>
</intro>
</account>
</explanation>
</explanations>
</instructionsection>