mirror of
https://github.com/pound-emu/ballistic.git
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469 lines
26 KiB
XML
469 lines
26 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
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<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<instructionsection id="sdot_za_zzi" title="SDOT (4-way, multiple and indexed vector)" type="instruction">
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<docvars>
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<docvar key="instr-class" value="mortlach2" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="SDOT" />
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</docvars>
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<heading>SDOT (4-way, multiple and indexed vector)</heading>
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<desc>
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<brief>Multi-vector signed integer dot-product by indexed element</brief>
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<description>
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<para>The instruction operates on two or four ZA single-vector groups.</para>
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<para>The signed integer dot product instruction computes the dot product of four signed 8-bit or 16-bit integer values held in each 32-bit or 64-bit element of the two or four first source vectors and four signed 8-bit or 16-bit integer values in the corresponding indexed 32-bit or 64-bit element of the second source vector. The widened dot product result is destructively added to the corresponding 32-bit or 64-bit element of the two or four ZA single-vector groups.</para>
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<para>The groups within the second source vector are specified using an immediate element index which selects the same group position within each 128-bit vector segment. The index range is from 0 to one less than the number of groups per 128-bit segment, encoded in 1 to 2 bits depending on the size of the group. The vector numbers forming the single-vector group within each half or each quarter of the ZA array are selected by the sum of the vector select register and immediate offset, modulo half or quarter the number of ZA array vectors.</para>
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<para>The <arm-defined-word>vector group</arm-defined-word> symbol, <syntax>VGx2</syntax> or <syntax>VGx4</syntax>, indicates that the ZA operand consists of two or four ZA single-vector groups respectively. The <arm-defined-word>vector group</arm-defined-word> symbol is preferred for disassembly, but optional in assembler source code.</para>
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<para>This instruction is unpredicated.</para>
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<para>ID_AA64SMFR0_EL1.I16I64 indicates whether the 16-bit integer variant is implemented.</para>
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</description>
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<status>Green</status>
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<predicated>False</predicated>
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<sm_policy>SM_1_only</sm_policy>
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</desc>
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<alias_list howmany="0"></alias_list>
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<classes>
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<classesintro count="4">
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<txt>It has encodings from 4 classes:</txt>
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<a href="#iclass_sme_vgx2w_single">Two ZA single-vectors of 32-bit elements</a>
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<txt>, </txt>
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<a href="#iclass_sme_vgx2dw_single">Two ZA single-vectors of 64-bit elements</a>
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<txt>, </txt>
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<a href="#iclass_sme_vgx4w_single">Four ZA single-vectors of 32-bit elements</a>
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<txt> and </txt>
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<a href="#iclass_sme_vgx4dw_single">Four ZA single-vectors of 64-bit elements</a>
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</classesintro>
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<iclass name="Two ZA single-vectors of 32-bit elements" oneof="4" id="iclass_sme_vgx2w_single" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="instr-class" value="mortlach2" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="SDOT" />
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<docvar key="sme-multireg" value="sme-vgx2w-single" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<arch_variants>
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<arch_variant name="FEAT_SME2" feature="FEAT_SME2" />
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</arch_variants>
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<regdiagram form="32" psname="SDOT-ZA.ZZi-S2xi" tworows="1">
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<box hibit="31" width="12" settings="12">
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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</box>
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<box hibit="19" width="4" name="Zm" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="15" settings="1">
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<c>0</c>
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</box>
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<box hibit="14" width="2" name="Rv" usename="1">
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<c colspan="2"></c>
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</box>
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<box hibit="12" name="op" settings="1">
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<c>1</c>
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</box>
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<box hibit="11" width="2" name="i2" usename="1">
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<c colspan="2"></c>
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</box>
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<box hibit="9" width="4" name="Zn" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="5" settings="1">
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<c>1</c>
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</box>
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<box hibit="4" name="U" usename="1" settings="1">
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<c>0</c>
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</box>
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<box hibit="3" settings="1">
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<c>0</c>
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</box>
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<box hibit="2" width="3" name="off3" usename="1">
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<c colspan="3"></c>
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</box>
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</regdiagram>
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<encoding name="sdot_za_zzi_s2xi" oneofinclass="1" oneof="4" label="">
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<docvars>
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<docvar key="instr-class" value="mortlach2" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="SDOT" />
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<docvar key="sme-multireg" value="sme-vgx2w-single" />
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</docvars>
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<asmtemplate><text>SDOT ZA.S[</text><a link="sa_wv" hover="32-bit vector select register W8-W11 (field "Rv")"><Wv></a><text>, </text><a link="sa_offs" hover="Vector select offset [0-7] (field "off3")"><offs></a><a>{, VGx2}</a><text>], </text><text>{</text><text> </text><a link="sa_zn1" hover="First scalable vector register of a multi-vector sequence (field Zn)"><Zn1></a><text>.B-</text><a link="sa_zn2" hover="Second scalable vector register of a multi-vector sequence (field Zn)"><Zn2></a><text>.B </text><text>}</text><text>, </text><a link="sa_zm" hover="Second source scalable vector register Z0-Z15 (field "Zm")"><Zm></a><text>.B[</text><a link="sa_index_1" hover="Element index [0-3] (field "i2")"><index></a><text>]</text></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="SDOT-ZA.ZZi-S2xi" mylink="SDOT-ZA.ZZi-S2xi" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSME2.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME2()">HaveSME2</a>() then UNDEFINED;
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integer v = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>('010':Rv);
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constant integer esize = 32;
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integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zn:'0');
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integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>('0':Zm);
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integer offset = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(off3);
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integer index = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(i2);
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constant integer nreg = 2;</pstext>
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</ps>
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</ps_section>
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</iclass>
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<iclass name="Two ZA single-vectors of 64-bit elements" oneof="4" id="iclass_sme_vgx2dw_single" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="instr-class" value="mortlach2" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="SDOT" />
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<docvar key="sme-multireg" value="sme-vgx2dw-single" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<arch_variants>
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<arch_variant name="FEAT_SME_I16I64" feature="FEAT_SME_I16I64" />
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</arch_variants>
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<regdiagram form="32" psname="SDOT-ZA.ZZi-D2xi" tworows="1">
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<box hibit="31" width="12" settings="12">
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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</box>
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<box hibit="19" width="4" name="Zm" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="15" settings="1">
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<c>0</c>
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</box>
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<box hibit="14" width="2" name="Rv" usename="1">
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<c colspan="2"></c>
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</box>
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<box hibit="12" width="2" settings="2">
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="10" name="i1" usename="1">
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<c></c>
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</box>
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<box hibit="9" width="4" name="Zn" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="5" settings="1">
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<c>0</c>
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</box>
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<box hibit="4" name="U" usename="1" settings="1">
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<c>0</c>
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</box>
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<box hibit="3" settings="1">
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<c>1</c>
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</box>
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<box hibit="2" width="3" name="off3" usename="1">
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<c colspan="3"></c>
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</box>
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</regdiagram>
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<encoding name="sdot_za_zzi_d2xi" oneofinclass="1" oneof="4" label="">
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<docvars>
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<docvar key="instr-class" value="mortlach2" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="SDOT" />
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<docvar key="sme-multireg" value="sme-vgx2dw-single" />
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</docvars>
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<asmtemplate><text>SDOT ZA.D[</text><a link="sa_wv" hover="32-bit vector select register W8-W11 (field "Rv")"><Wv></a><text>, </text><a link="sa_offs" hover="Vector select offset [0-7] (field "off3")"><offs></a><a>{, VGx2}</a><text>], </text><text>{</text><text> </text><a link="sa_zn1" hover="First scalable vector register of a multi-vector sequence (field Zn)"><Zn1></a><text>.H-</text><a link="sa_zn2" hover="Second scalable vector register of a multi-vector sequence (field Zn)"><Zn2></a><text>.H </text><text>}</text><text>, </text><a link="sa_zm" hover="Second source scalable vector register Z0-Z15 (field "Zm")"><Zm></a><text>.H[</text><a link="sa_index" hover="Element index [0-1] (field "i1")"><index></a><text>]</text></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="SDOT-ZA.ZZi-D2xi" mylink="SDOT-ZA.ZZi-D2xi" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !(<a link="impl-aarch64.HaveSME2.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME2()">HaveSME2</a>() && <a link="impl-aarch64.HaveSMEI16I64.0" file="shared_pseudocode.xml" hover="function: boolean HaveSMEI16I64()">HaveSMEI16I64</a>()) then UNDEFINED;
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integer v = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>('010':Rv);
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constant integer esize = 64;
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integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zn:'0');
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integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>('0':Zm);
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integer offset = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(off3);
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integer index = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(i1);
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constant integer nreg = 2;</pstext>
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</ps>
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</ps_section>
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</iclass>
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<iclass name="Four ZA single-vectors of 32-bit elements" oneof="4" id="iclass_sme_vgx4w_single" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="instr-class" value="mortlach2" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="SDOT" />
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<docvar key="sme-multireg" value="sme-vgx4w-single" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<arch_variants>
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<arch_variant name="FEAT_SME2" feature="FEAT_SME2" />
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</arch_variants>
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<regdiagram form="32" psname="SDOT-ZA.ZZi-S4xi" tworows="1">
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<box hibit="31" width="12" settings="12">
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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</box>
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<box hibit="19" width="4" name="Zm" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="15" settings="1">
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<c>1</c>
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</box>
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<box hibit="14" width="2" name="Rv" usename="1">
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<c colspan="2"></c>
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</box>
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<box hibit="12" name="op" settings="1">
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<c>1</c>
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</box>
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<box hibit="11" width="2" name="i2" usename="1">
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<c colspan="2"></c>
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</box>
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<box hibit="9" width="3" name="Zn" usename="1">
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<c colspan="3"></c>
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</box>
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<box hibit="6" settings="1">
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<c>0</c>
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</box>
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<box hibit="5" settings="1">
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<c>1</c>
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</box>
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<box hibit="4" name="U" usename="1" settings="1">
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<c>0</c>
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</box>
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<box hibit="3" settings="1">
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<c>0</c>
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</box>
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<box hibit="2" width="3" name="off3" usename="1">
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<c colspan="3"></c>
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</box>
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</regdiagram>
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<encoding name="sdot_za_zzi_s4xi" oneofinclass="1" oneof="4" label="">
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<docvars>
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<docvar key="instr-class" value="mortlach2" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="SDOT" />
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<docvar key="sme-multireg" value="sme-vgx4w-single" />
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</docvars>
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<asmtemplate><text>SDOT ZA.S[</text><a link="sa_wv" hover="32-bit vector select register W8-W11 (field "Rv")"><Wv></a><text>, </text><a link="sa_offs" hover="Vector select offset [0-7] (field "off3")"><offs></a><a>{, VGx4}</a><text>], </text><text>{</text><text> </text><a link="sa_zn1_1" hover="First scalable vector register of a multi-vector sequence (field Zn)"><Zn1></a><text>.B-</text><a link="sa_zn4" hover="Fourth scalable vector register of a multi-vector sequence (field Zn)"><Zn4></a><text>.B </text><text>}</text><text>, </text><a link="sa_zm" hover="Second source scalable vector register Z0-Z15 (field "Zm")"><Zm></a><text>.B[</text><a link="sa_index_1" hover="Element index [0-3] (field "i2")"><index></a><text>]</text></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="SDOT-ZA.ZZi-S4xi" mylink="SDOT-ZA.ZZi-S4xi" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSME2.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME2()">HaveSME2</a>() then UNDEFINED;
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integer v = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>('010':Rv);
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constant integer esize = 32;
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integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zn:'00');
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integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>('0':Zm);
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integer offset = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(off3);
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integer index = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(i2);
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constant integer nreg = 4;</pstext>
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</ps>
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</ps_section>
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</iclass>
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<iclass name="Four ZA single-vectors of 64-bit elements" oneof="4" id="iclass_sme_vgx4dw_single" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="instr-class" value="mortlach2" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="SDOT" />
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<docvar key="sme-multireg" value="sme-vgx4dw-single" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<arch_variants>
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<arch_variant name="FEAT_SME_I16I64" feature="FEAT_SME_I16I64" />
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</arch_variants>
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<regdiagram form="32" psname="SDOT-ZA.ZZi-D4xi" tworows="1">
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<box hibit="31" width="12" settings="12">
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>1</c>
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<c>1</c>
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<c>1</c>
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<c>0</c>
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<c>1</c>
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</box>
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<box hibit="19" width="4" name="Zm" usename="1">
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<c colspan="4"></c>
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</box>
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<box hibit="15" settings="1">
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<c>1</c>
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</box>
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<box hibit="14" width="2" name="Rv" usename="1">
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<c colspan="2"></c>
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</box>
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<box hibit="12" settings="1">
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<c>0</c>
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</box>
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<box hibit="11" name="op" settings="1">
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<c>0</c>
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</box>
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<box hibit="10" name="i1" usename="1">
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<c></c>
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</box>
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<box hibit="9" width="3" name="Zn" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
<box hibit="6" width="2" settings="2">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="4" name="U" usename="1" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="2" width="3" name="off3" usename="1">
|
|
<c colspan="3"></c>
|
|
</box>
|
|
</regdiagram>
|
|
<encoding name="sdot_za_zzi_d4xi" oneofinclass="1" oneof="4" label="">
|
|
<docvars>
|
|
<docvar key="instr-class" value="mortlach2" />
|
|
<docvar key="isa" value="A64" />
|
|
<docvar key="mnemonic" value="SDOT" />
|
|
<docvar key="sme-multireg" value="sme-vgx4dw-single" />
|
|
</docvars>
|
|
<asmtemplate><text>SDOT ZA.D[</text><a link="sa_wv" hover="32-bit vector select register W8-W11 (field "Rv")"><Wv></a><text>, </text><a link="sa_offs" hover="Vector select offset [0-7] (field "off3")"><offs></a><a>{, VGx4}</a><text>], </text><text>{</text><text> </text><a link="sa_zn1_1" hover="First scalable vector register of a multi-vector sequence (field Zn)"><Zn1></a><text>.H-</text><a link="sa_zn4" hover="Fourth scalable vector register of a multi-vector sequence (field Zn)"><Zn4></a><text>.H </text><text>}</text><text>, </text><a link="sa_zm" hover="Second source scalable vector register Z0-Z15 (field "Zm")"><Zm></a><text>.H[</text><a link="sa_index" hover="Element index [0-1] (field "i1")"><index></a><text>]</text></asmtemplate>
|
|
</encoding>
|
|
<ps_section howmany="1">
|
|
<ps name="SDOT-ZA.ZZi-D4xi" mylink="SDOT-ZA.ZZi-D4xi" enclabels="" sections="1" secttype="noheading">
|
|
<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !(<a link="impl-aarch64.HaveSME2.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME2()">HaveSME2</a>() && <a link="impl-aarch64.HaveSMEI16I64.0" file="shared_pseudocode.xml" hover="function: boolean HaveSMEI16I64()">HaveSMEI16I64</a>()) then UNDEFINED;
|
|
integer v = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>('010':Rv);
|
|
constant integer esize = 64;
|
|
integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zn:'00');
|
|
integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>('0':Zm);
|
|
integer offset = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(off3);
|
|
integer index = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(i1);
|
|
constant integer nreg = 4;</pstext>
|
|
</ps>
|
|
</ps_section>
|
|
</iclass>
|
|
</classes>
|
|
<explanations scope="all">
|
|
<explanation enclist="sdot_za_zzi_d2xi, sdot_za_zzi_d4xi, sdot_za_zzi_s2xi, sdot_za_zzi_s4xi" symboldefcount="1">
|
|
<symbol link="sa_wv"><Wv></symbol>
|
|
<account encodedin="Rv">
|
|
<intro>
|
|
<para>Is the 32-bit name of the vector select register W8-W11, encoded in the "Rv" field.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="sdot_za_zzi_d2xi, sdot_za_zzi_d4xi, sdot_za_zzi_s2xi, sdot_za_zzi_s4xi" symboldefcount="1">
|
|
<symbol link="sa_offs"><offs></symbol>
|
|
<account encodedin="off3">
|
|
<intro>
|
|
<para>Is the vector select offset, in the range 0 to 7, encoded in the "off3" field.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="sdot_za_zzi_d2xi, sdot_za_zzi_s2xi" symboldefcount="1">
|
|
<symbol link="sa_zn1"><Zn1></symbol>
|
|
<account encodedin="Zn">
|
|
<intro>
|
|
<para>For the two ZA single-vectors of 32-bit elements and two ZA single-vectors of 64-bit elements variant: is the name of the first scalable vector register of a multi-vector sequence, encoded as "Zn" times 2.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="sdot_za_zzi_d4xi, sdot_za_zzi_s4xi" symboldefcount="2">
|
|
<symbol link="sa_zn1_1"><Zn1></symbol>
|
|
<account encodedin="Zn">
|
|
<intro>
|
|
<para>For the four ZA single-vectors of 32-bit elements and four ZA single-vectors of 64-bit elements variant: is the name of the first scalable vector register of a multi-vector sequence, encoded as "Zn" times 4.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="sdot_za_zzi_d4xi, sdot_za_zzi_s4xi" symboldefcount="1">
|
|
<symbol link="sa_zn4"><Zn4></symbol>
|
|
<account encodedin="Zn">
|
|
<intro>
|
|
<para>Is the name of the fourth scalable vector register of a multi-vector sequence, encoded as "Zn" times 4 plus 3.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="sdot_za_zzi_d2xi, sdot_za_zzi_s2xi" symboldefcount="1">
|
|
<symbol link="sa_zn2"><Zn2></symbol>
|
|
<account encodedin="Zn">
|
|
<intro>
|
|
<para>Is the name of the second scalable vector register of a multi-vector sequence, encoded as "Zn" times 2 plus 1.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="sdot_za_zzi_d2xi, sdot_za_zzi_d4xi, sdot_za_zzi_s2xi, sdot_za_zzi_s4xi" symboldefcount="1">
|
|
<symbol link="sa_zm"><Zm></symbol>
|
|
<account encodedin="Zm">
|
|
<intro>
|
|
<para>Is the name of the second source scalable vector register Z0-Z15, encoded in the "Zm" field.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="sdot_za_zzi_s2xi, sdot_za_zzi_s4xi" symboldefcount="1">
|
|
<symbol link="sa_index_1"><index></symbol>
|
|
<account encodedin="i2">
|
|
<intro>
|
|
<para>For the four ZA single-vectors of 32-bit elements and two ZA single-vectors of 32-bit elements variant: is the element index, in the range 0 to 3, encoded in the "i2" field.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="sdot_za_zzi_d2xi, sdot_za_zzi_d4xi" symboldefcount="2">
|
|
<symbol link="sa_index"><index></symbol>
|
|
<account encodedin="i1">
|
|
<intro>
|
|
<para>For the four ZA single-vectors of 64-bit elements and two ZA single-vectors of 64-bit elements variant: is the element index, in the range 0 to 1, encoded in the "i1" field.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
</explanations>
|
|
<ps_section howmany="1">
|
|
<ps name="SDOT-ZA.ZZi-S2xi" mylink="execute" enclabels="" sections="1" secttype="Operation">
|
|
<pstext mayhavelinks="1" section="Execute" rep_section="execute"><a link="impl-aarch64.CheckStreamingSVEAndZAEnabled.0" file="shared_pseudocode.xml" hover="function: CheckStreamingSVEAndZAEnabled()">CheckStreamingSVEAndZAEnabled</a>();
|
|
constant integer VL = <a link="impl-aarch64.CurrentVL.read.none" file="shared_pseudocode.xml" hover="accessor: integer CurrentVL">CurrentVL</a>;
|
|
constant integer elements = VL DIV esize;
|
|
integer vectors = VL DIV 8;
|
|
integer vstride = vectors DIV nreg;
|
|
integer eltspersegment = 128 DIV esize;
|
|
bits(32) vbase = <a link="impl-aarch64.X.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) X[integer n, integer width]">X</a>[v, 32];
|
|
integer vec = (<a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(vbase) + offset) MOD vstride;
|
|
bits(VL) result;
|
|
|
|
for r = 0 to nreg-1
|
|
bits(VL) operand1 = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[n+r, VL];
|
|
bits(VL) operand2 = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[m, VL];
|
|
bits(VL) operand3 = <a link="impl-aarch64.ZAvector.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) ZAvector[integer index, integer width]">ZAvector</a>[vec, VL];
|
|
for e = 0 to elements-1
|
|
bits(esize) sum = <a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[operand3, e, esize];
|
|
integer segmentbase = e - (e MOD eltspersegment);
|
|
integer s = segmentbase + index;
|
|
for i = 0 to 3
|
|
integer element1 = <a link="impl-shared.SInt.1" file="shared_pseudocode.xml" hover="function: integer SInt(bits(N) x)">SInt</a>(<a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[operand1, 4 * e + i, esize DIV 4]);
|
|
integer element2 = <a link="impl-shared.SInt.1" file="shared_pseudocode.xml" hover="function: integer SInt(bits(N) x)">SInt</a>(<a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[operand2, 4 * s + i, esize DIV 4]);
|
|
sum = sum + element1 * element2;
|
|
<a link="impl-shared.Elem.write.3" file="shared_pseudocode.xml" hover="accessor: Elem[bits(N) &vector, integer e, integer size] = bits(size) value">Elem</a>[result, e, esize] = sum;
|
|
<a link="impl-aarch64.ZAvector.write.2" file="shared_pseudocode.xml" hover="accessor: ZAvector[integer index, integer width] = bits(width) value">ZAvector</a>[vec, VL] = result;
|
|
vec = vec + vstride;</pstext>
|
|
</ps>
|
|
</ps_section>
|
|
</instructionsection>
|