mirror of
https://github.com/pound-emu/ballistic.git
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288 lines
17 KiB
XML
288 lines
17 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
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<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
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<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
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<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
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<instructionsection id="usmops_za_pp_zz" title="USMOPS" type="instruction">
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<docvars>
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<docvar key="instr-class" value="mortlach" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="USMOPS" />
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</docvars>
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<heading>USMOPS</heading>
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<desc>
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<brief>Unsigned by signed integer sum of outer products and subtract</brief>
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<description>
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<para>The 8-bit integer variant works with a 32-bit element ZA tile.</para>
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<para>The 16-bit integer variant works with a 64-bit element ZA tile.</para>
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<para>The unsigned by signed integer sum of outer products and subtract instructions multiply the sub-matrix in the first source vector by the sub-matrix in the second source vector. In case of the 8-bit integer variant, the first source holds SVL<sub>S</sub>×4 sub-matrix of unsigned 8-bit integer values, and the second source holds 4×SVL<sub>S</sub> sub-matrix of signed 8-bit integer values. In case of the 16-bit integer variant, the first source holds SVL<sub>D</sub>×4 sub-matrix of unsigned 16-bit integer values, and the second source holds 4×SVL<sub>D</sub> sub-matrix of signed 16-bit integer values.</para>
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<para>Each source vector is independently predicated by a corresponding governing predicate. When an 8-bit source element in case of 8-bit integer variant or a 16-bit source element in case of 16-bit integer variant is Inactive, it is treated as having the value 0.</para>
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<para>The resulting SVL<sub>S</sub>×SVL<sub>S</sub> widened 32-bit integer or SVL<sub>D</sub>×SVL<sub>D</sub> widened 64-bit integer sum of outer products is then destructively subtracted from the 32-bit integer or 64-bit integer destination tile, respectively for 8-bit integer and 16-bit integer instruction variants. This is equivalent to performing a 4-way dot product and subtract from each of the destination tile elements.</para>
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<para>In case of the 8-bit integer variant, each 32-bit container of the first source vector holds 4 consecutive column elements of each row of a SVL<sub>S</sub>×4 sub-matrix, and each 32-bit container of the second source vector holds 4 consecutive row elements of each column of a 4×SVL<sub>S</sub> sub-matrix. In case of the 16-bit integer variant, each 64-bit container of the first source vector holds 4 consecutive column elements of each row of a SVL<sub>D</sub>×4 sub-matrix, and each 64-bit container of the second source vector holds 4 consecutive row elements of each column of a 4×SVL<sub>D</sub> sub-matrix.</para>
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<para>ID_AA64SMFR0_EL1.I16I64 indicates whether the 16-bit integer variant is implemented.</para>
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</description>
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<status>Green</status>
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<predicated>True</predicated>
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<uses_dit condition="FEAT_SVE2 is implemented or FEAT_SME is implemented">True</uses_dit>
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<sm_policy>SM_1_only</sm_policy>
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<is_gov_pred_pair>True</is_gov_pred_pair>
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</desc>
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<alias_list howmany="0"></alias_list>
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<classes>
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<classesintro count="2">
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<txt>It has encodings from 2 classes:</txt>
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<a href="#iclass_per_word">32-bit</a>
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<txt> and </txt>
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<a href="#iclass_per_doubleword">64-bit</a>
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</classesintro>
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<iclass name="32-bit" oneof="2" id="iclass_per_word" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="asimdimm-datatype" value="per-word" />
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<docvar key="instr-class" value="mortlach" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="USMOPS" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<arch_variants>
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<arch_variant name="FEAT_SME" feature="FEAT_SME" />
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</arch_variants>
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<regdiagram form="32" psname="USMOPS-ZA.PP.ZZ-32" tworows="1">
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<box hibit="31" width="2" settings="2">
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="29" width="5" settings="5">
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="24" name="u0" usename="1" settings="1">
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<c>1</c>
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</box>
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<box hibit="23" width="2" settings="2">
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="21" name="u1" usename="1" settings="1">
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<c>0</c>
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</box>
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<box hibit="20" width="5" name="Zm" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="15" width="3" name="Pm" usename="1">
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<c colspan="3"></c>
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</box>
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<box hibit="12" width="3" name="Pn" usename="1">
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<c colspan="3"></c>
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</box>
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<box hibit="9" width="5" name="Zn" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="4" name="S" usename="1" settings="1">
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<c>1</c>
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</box>
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<box hibit="3" settings="1">
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<c>0</c>
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</box>
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<box hibit="2" settings="1">
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<c>0</c>
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</box>
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<box hibit="1" width="2" name="ZAda" usename="1">
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<c colspan="2"></c>
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</box>
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</regdiagram>
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<encoding name="usmops_za_pp_zz_32" oneofinclass="1" oneof="2" label="">
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<docvars>
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<docvar key="asimdimm-datatype" value="per-word" />
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<docvar key="instr-class" value="mortlach" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="USMOPS" />
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</docvars>
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<asmtemplate><text>USMOPS </text><a link="sa_zada" hover="ZA tile ZA0-ZA3 (field "ZAda")"><ZAda></a><text>.S, </text><a link="sa_pn" hover="First governing scalable predicate register P0-P7 (field "Pn")"><Pn></a><text>/M, </text><a link="sa_pm" hover="Second governing scalable predicate register P0-P7 (field "Pm")"><Pm></a><text>/M, </text><a link="sa_zn" hover="First source scalable vector register (field "Zn")"><Zn></a><text>.B, </text><a link="sa_zm" hover="Second source scalable vector register (field "Zm")"><Zm></a><text>.B</text></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="USMOPS-ZA.PP.ZZ-32" mylink="USMOPS-ZA.PP.ZZ-32" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSME.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME()">HaveSME</a>() then UNDEFINED;
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constant integer esize = 32;
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integer a = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Pn);
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integer b = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Pm);
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integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zn);
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integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zm);
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integer da = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(ZAda);
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boolean sub_op = TRUE;
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boolean op1_unsigned = TRUE;
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boolean op2_unsigned = FALSE;</pstext>
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</ps>
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</ps_section>
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</iclass>
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<iclass name="64-bit" oneof="2" id="iclass_per_doubleword" no_encodings="1" isa="A64">
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<docvars>
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<docvar key="asimdimm-datatype" value="per-doubleword" />
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<docvar key="instr-class" value="mortlach" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="USMOPS" />
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</docvars>
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<iclassintro count="1"></iclassintro>
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<arch_variants>
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<arch_variant name="FEAT_SME_I16I64" feature="FEAT_SME_I16I64" />
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</arch_variants>
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<regdiagram form="32" psname="USMOPS-ZA.PP.ZZ-64" tworows="1">
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<box hibit="31" width="2" settings="2">
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<c>1</c>
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<c>0</c>
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</box>
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<box hibit="29" width="5" settings="5">
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<c>1</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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<c>0</c>
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</box>
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<box hibit="24" name="u0" usename="1" settings="1">
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<c>1</c>
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</box>
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<box hibit="23" width="2" settings="2">
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<c>1</c>
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<c>1</c>
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</box>
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<box hibit="21" name="u1" usename="1" settings="1">
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<c>0</c>
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</box>
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<box hibit="20" width="5" name="Zm" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="15" width="3" name="Pm" usename="1">
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<c colspan="3"></c>
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</box>
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<box hibit="12" width="3" name="Pn" usename="1">
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<c colspan="3"></c>
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</box>
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<box hibit="9" width="5" name="Zn" usename="1">
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<c colspan="5"></c>
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</box>
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<box hibit="4" name="S" usename="1" settings="1">
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<c>1</c>
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</box>
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<box hibit="3" settings="1">
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<c>0</c>
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</box>
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<box hibit="2" width="3" name="ZAda" usename="1">
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<c colspan="3"></c>
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</box>
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</regdiagram>
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<encoding name="usmops_za_pp_zz_64" oneofinclass="1" oneof="2" label="">
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<docvars>
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<docvar key="asimdimm-datatype" value="per-doubleword" />
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<docvar key="instr-class" value="mortlach" />
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<docvar key="isa" value="A64" />
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<docvar key="mnemonic" value="USMOPS" />
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</docvars>
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<asmtemplate><text>USMOPS </text><a link="sa_zada_1" hover="ZA tile ZA0-ZA7 (field "ZAda")"><ZAda></a><text>.D, </text><a link="sa_pn" hover="First governing scalable predicate register P0-P7 (field "Pn")"><Pn></a><text>/M, </text><a link="sa_pm" hover="Second governing scalable predicate register P0-P7 (field "Pm")"><Pm></a><text>/M, </text><a link="sa_zn" hover="First source scalable vector register (field "Zn")"><Zn></a><text>.H, </text><a link="sa_zm" hover="Second source scalable vector register (field "Zm")"><Zm></a><text>.H</text></asmtemplate>
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</encoding>
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<ps_section howmany="1">
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<ps name="USMOPS-ZA.PP.ZZ-64" mylink="USMOPS-ZA.PP.ZZ-64" enclabels="" sections="1" secttype="noheading">
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<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSMEI16I64.0" file="shared_pseudocode.xml" hover="function: boolean HaveSMEI16I64()">HaveSMEI16I64</a>() then UNDEFINED;
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constant integer esize = 64;
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integer a = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Pn);
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integer b = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Pm);
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integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zn);
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integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zm);
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integer da = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(ZAda);
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boolean sub_op = TRUE;
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boolean op1_unsigned = TRUE;
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boolean op2_unsigned = FALSE;</pstext>
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</ps>
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</ps_section>
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</iclass>
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</classes>
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<explanations scope="all">
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<explanation enclist="usmops_za_pp_zz_32" symboldefcount="1">
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<symbol link="sa_zada"><ZAda></symbol>
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<account encodedin="ZAda">
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<docvars>
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<docvar key="asimdimm-datatype" value="per-word" />
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</docvars>
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<intro>
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<para>For the 32-bit variant: is the name of the ZA tile ZA0-ZA3, encoded in the "ZAda" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="usmops_za_pp_zz_64" symboldefcount="2">
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<symbol link="sa_zada_1"><ZAda></symbol>
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<account encodedin="ZAda">
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<docvars>
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<docvar key="asimdimm-datatype" value="per-doubleword" />
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</docvars>
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<intro>
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<para>For the 64-bit variant: is the name of the ZA tile ZA0-ZA7, encoded in the "ZAda" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="usmops_za_pp_zz_32, usmops_za_pp_zz_64" symboldefcount="1">
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<symbol link="sa_pn"><Pn></symbol>
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<account encodedin="Pn">
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<intro>
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<para>Is the name of the first governing scalable predicate register P0-P7, encoded in the "Pn" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="usmops_za_pp_zz_32, usmops_za_pp_zz_64" symboldefcount="1">
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<symbol link="sa_pm"><Pm></symbol>
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<account encodedin="Pm">
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<intro>
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<para>Is the name of the second governing scalable predicate register P0-P7, encoded in the "Pm" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="usmops_za_pp_zz_32, usmops_za_pp_zz_64" symboldefcount="1">
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<symbol link="sa_zn"><Zn></symbol>
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<account encodedin="Zn">
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<intro>
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<para>Is the name of the first source scalable vector register, encoded in the "Zn" field.</para>
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</intro>
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</account>
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</explanation>
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<explanation enclist="usmops_za_pp_zz_32, usmops_za_pp_zz_64" symboldefcount="1">
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<symbol link="sa_zm"><Zm></symbol>
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<account encodedin="Zm">
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<intro>
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<para>Is the name of the second source scalable vector register, encoded in the "Zm" field.</para>
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</intro>
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</account>
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</explanation>
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</explanations>
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<ps_section howmany="1">
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<ps name="USMOPS-ZA.PP.ZZ-32" mylink="execute" enclabels="" sections="1" secttype="Operation">
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<pstext mayhavelinks="1" section="Execute" rep_section="execute"><a link="impl-aarch64.CheckStreamingSVEAndZAEnabled.0" file="shared_pseudocode.xml" hover="function: CheckStreamingSVEAndZAEnabled()">CheckStreamingSVEAndZAEnabled</a>();
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constant integer VL = <a link="impl-aarch64.CurrentVL.read.none" file="shared_pseudocode.xml" hover="accessor: integer CurrentVL">CurrentVL</a>;
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constant integer PL = VL DIV 8;
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constant integer dim = VL DIV esize;
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bits(PL) mask1 = <a link="impl-aarch64.P.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) P[integer n, integer width]">P</a>[a, PL];
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bits(PL) mask2 = <a link="impl-aarch64.P.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) P[integer n, integer width]">P</a>[b, PL];
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bits(VL) operand1 = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[n, VL];
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bits(VL) operand2 = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[m, VL];
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bits(dim*dim*esize) operand3 = <a link="impl-aarch64.ZAtile.read.3" file="shared_pseudocode.xml" hover="accessor: bits(width) ZAtile[integer tile, integer esize, integer width]">ZAtile</a>[da, esize, dim*dim*esize];
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bits(dim*dim*esize) result;
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integer prod;
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for row = 0 to dim-1
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for col = 0 to dim-1
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bits(esize) sum = <a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[operand3, row*dim+col, esize];
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for k = 0 to 3
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if <a link="impl-aarch64.ActivePredicateElement.3" file="shared_pseudocode.xml" hover="function: boolean ActivePredicateElement(bits(N) pred, integer e, integer esize)">ActivePredicateElement</a>(mask1, 4*row + k, esize DIV 4) &&
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<a link="impl-aarch64.ActivePredicateElement.3" file="shared_pseudocode.xml" hover="function: boolean ActivePredicateElement(bits(N) pred, integer e, integer esize)">ActivePredicateElement</a>(mask2, 4*col + k, esize DIV 4) then
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prod = (<a link="impl-shared.Int.2" file="shared_pseudocode.xml" hover="function: integer Int(bits(N) x, boolean unsigned)">Int</a>(<a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[operand1, 4*row + k, esize DIV 4], op1_unsigned) *
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<a link="impl-shared.Int.2" file="shared_pseudocode.xml" hover="function: integer Int(bits(N) x, boolean unsigned)">Int</a>(<a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[operand2, 4*col + k, esize DIV 4], op2_unsigned));
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if sub_op then prod = -prod;
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sum = sum + prod;
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<a link="impl-shared.Elem.write.3" file="shared_pseudocode.xml" hover="accessor: Elem[bits(N) &vector, integer e, integer size] = bits(size) value">Elem</a>[result, row*dim+col, esize] = sum;
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<a link="impl-aarch64.ZAtile.write.3" file="shared_pseudocode.xml" hover="accessor: ZAtile[integer tile, integer esize, integer width] = bits(width) value">ZAtile</a>[da, esize, dim*dim*esize] = result;</pstext>
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</ps>
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</ps_section>
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</instructionsection>
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