mirror of
https://github.com/pound-emu/ballistic.git
synced 2026-01-31 01:15:21 +01:00
291 lines
13 KiB
XML
291 lines
13 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
|
|
<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
|
|
<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
|
|
<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
|
|
<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
|
|
|
|
<instructionsection id="ctermeq_rr" title="CTERMEQ, CTERMNE" type="instruction">
|
|
<docvars>
|
|
<docvar key="instr-class" value="sve" />
|
|
<docvar key="isa" value="A64" />
|
|
</docvars>
|
|
<heading>CTERMEQ, CTERMNE</heading>
|
|
<desc>
|
|
<brief>Compare and terminate loop</brief>
|
|
<description>
|
|
<para>Detect termination conditions in serialized vector loops. Tests whether the comparison between the scalar source operands holds true and if not tests the state of the <arm-defined-word>!Last</arm-defined-word> condition flag (C) which indicates whether the previous flag-setting predicate instruction selected the last element of the vector partition.</para>
|
|
<para>The Z and C condition flags are preserved by this instruction. The N and V condition flags are set as a pair to generate one of the following conditions for a subsequent conditional instruction:</para>
|
|
<para />
|
|
<table class="valuetable">
|
|
<tgroup cols="4">
|
|
<thead>
|
|
<row>
|
|
<entry>Condition</entry>
|
|
<entry>N</entry>
|
|
<entry>V</entry>
|
|
<entry>Meaning</entry>
|
|
</row>
|
|
</thead>
|
|
<tbody>
|
|
<row>
|
|
<entry>GE</entry>
|
|
<entry>0</entry>
|
|
<entry>0</entry>
|
|
<entry>Continue loop (compare failed and last element not selected)</entry>
|
|
</row>
|
|
<row>
|
|
<entry>LT</entry>
|
|
<entry>0</entry>
|
|
<entry>1</entry>
|
|
<entry>Terminate loop (last element selected)</entry>
|
|
</row>
|
|
<row>
|
|
<entry>LT</entry>
|
|
<entry>1</entry>
|
|
<entry>0</entry>
|
|
<entry>Terminate loop (compare succeeded)</entry>
|
|
</row>
|
|
<row>
|
|
<entry>GE</entry>
|
|
<entry>1</entry>
|
|
<entry>1</entry>
|
|
<entry>Never generated</entry>
|
|
</row>
|
|
</tbody>
|
|
</tgroup>
|
|
</table>
|
|
<para>The scalar source operands are 32-bit or 64-bit general-purpose registers of the same size.</para>
|
|
</description>
|
|
<status>Green</status>
|
|
<predicated>False</predicated>
|
|
<uses_dit condition="FEAT_SVE2 is implemented or FEAT_SME is implemented">True</uses_dit>
|
|
</desc>
|
|
<alias_list howmany="0"></alias_list>
|
|
<classes>
|
|
<classesintro count="2">
|
|
<txt>It has encodings from 2 classes:</txt>
|
|
<a href="#iclass_eq">Equal</a>
|
|
<txt> and </txt>
|
|
<a href="#iclass_ne">Not equal</a>
|
|
</classesintro>
|
|
<iclass name="Equal" oneof="2" id="iclass_eq" no_encodings="1" isa="A64">
|
|
<docvars>
|
|
<docvar key="instr-class" value="sve" />
|
|
<docvar key="isa" value="A64" />
|
|
<docvar key="mnemonic" value="CTERMEQ" />
|
|
<docvar key="sve-compare-type" value="eq" />
|
|
</docvars>
|
|
<iclassintro count="1"></iclassintro>
|
|
<regdiagram form="32" psname="CTERMEQ-RR-_" tworows="1">
|
|
<box hibit="31" width="2" settings="2">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="29" width="6" settings="6">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="23" name="op" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="sz" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="20" width="5" name="Rm" usename="1">
|
|
<c colspan="5"></c>
|
|
</box>
|
|
<box hibit="15" width="6" settings="6">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="9" width="5" name="Rn" usename="1">
|
|
<c colspan="5"></c>
|
|
</box>
|
|
<box hibit="4" name="ne" usename="1" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="3" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="2" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="1" width="2" settings="2">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
</regdiagram>
|
|
<encoding name="ctermeq_rr_" oneofinclass="1" oneof="2" label="">
|
|
<docvars>
|
|
<docvar key="instr-class" value="sve" />
|
|
<docvar key="isa" value="A64" />
|
|
<docvar key="mnemonic" value="CTERMEQ" />
|
|
<docvar key="sve-compare-type" value="eq" />
|
|
</docvars>
|
|
<asmtemplate><text>CTERMEQ </text><a link="sa_r" hover="Width specifier (field "sz") [W,X]"><R></a><a link="sa_n" hover="Source general-purpose register number [0-30] or ZR (31) (field "Rn")"><n></a><text>, </text><a link="sa_r" hover="Width specifier (field "sz") [W,X]"><R></a><a link="sa_m" hover="Source general-purpose register number [0-30] or ZR (31) (field "Rm")"><m></a></asmtemplate>
|
|
</encoding>
|
|
<ps_section howmany="1">
|
|
<ps name="CTERMEQ-RR-_" mylink="CTERMEQ-RR-_" enclabels="" sections="1" secttype="noheading">
|
|
<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSVE.0" file="shared_pseudocode.xml" hover="function: boolean HaveSVE()">HaveSVE</a>() && !<a link="impl-aarch64.HaveSME.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME()">HaveSME</a>() then UNDEFINED;
|
|
constant integer esize = 32 << <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(sz);
|
|
integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rn);
|
|
integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rm);
|
|
<a link="SVECmp" file="shared_pseudocode.xml" hover="enumeration SVECmp { Cmp_EQ, Cmp_NE, Cmp_GE, Cmp_GT, Cmp_LT, Cmp_LE, Cmp_UN }">SVECmp</a> op = <a link="Cmp_EQ" file="shared_pseudocode.xml" hover="enumeration SVECmp { Cmp_EQ, Cmp_NE, Cmp_GE, Cmp_GT, Cmp_LT, Cmp_LE, Cmp_UN }">Cmp_EQ</a>;</pstext>
|
|
</ps>
|
|
</ps_section>
|
|
</iclass>
|
|
<iclass name="Not equal" oneof="2" id="iclass_ne" no_encodings="1" isa="A64">
|
|
<docvars>
|
|
<docvar key="instr-class" value="sve" />
|
|
<docvar key="isa" value="A64" />
|
|
<docvar key="mnemonic" value="CTERMNE" />
|
|
<docvar key="sve-compare-type" value="ne" />
|
|
</docvars>
|
|
<iclassintro count="1"></iclassintro>
|
|
<regdiagram form="32" psname="CTERMNE-RR-_" tworows="1">
|
|
<box hibit="31" width="2" settings="2">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="29" width="6" settings="6">
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="23" name="op" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="22" name="sz" usename="1">
|
|
<c></c>
|
|
</box>
|
|
<box hibit="21" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="20" width="5" name="Rm" usename="1">
|
|
<c colspan="5"></c>
|
|
</box>
|
|
<box hibit="15" width="6" settings="6">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>1</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="9" width="5" name="Rn" usename="1">
|
|
<c colspan="5"></c>
|
|
</box>
|
|
<box hibit="4" name="ne" usename="1" settings="1">
|
|
<c>1</c>
|
|
</box>
|
|
<box hibit="3" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="2" settings="1">
|
|
<c>0</c>
|
|
</box>
|
|
<box hibit="1" width="2" settings="2">
|
|
<c>0</c>
|
|
<c>0</c>
|
|
</box>
|
|
</regdiagram>
|
|
<encoding name="ctermne_rr_" oneofinclass="1" oneof="2" label="">
|
|
<docvars>
|
|
<docvar key="instr-class" value="sve" />
|
|
<docvar key="isa" value="A64" />
|
|
<docvar key="mnemonic" value="CTERMNE" />
|
|
<docvar key="sve-compare-type" value="ne" />
|
|
</docvars>
|
|
<asmtemplate><text>CTERMNE </text><a link="sa_r" hover="Width specifier (field "sz") [W,X]"><R></a><a link="sa_n" hover="Source general-purpose register number [0-30] or ZR (31) (field "Rn")"><n></a><text>, </text><a link="sa_r" hover="Width specifier (field "sz") [W,X]"><R></a><a link="sa_m" hover="Source general-purpose register number [0-30] or ZR (31) (field "Rm")"><m></a></asmtemplate>
|
|
</encoding>
|
|
<ps_section howmany="1">
|
|
<ps name="CTERMNE-RR-_" mylink="CTERMNE-RR-_" enclabels="" sections="1" secttype="noheading">
|
|
<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSVE.0" file="shared_pseudocode.xml" hover="function: boolean HaveSVE()">HaveSVE</a>() && !<a link="impl-aarch64.HaveSME.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME()">HaveSME</a>() then UNDEFINED;
|
|
constant integer esize = 32 << <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(sz);
|
|
integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rn);
|
|
integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rm);
|
|
<a link="SVECmp" file="shared_pseudocode.xml" hover="enumeration SVECmp { Cmp_EQ, Cmp_NE, Cmp_GE, Cmp_GT, Cmp_LT, Cmp_LE, Cmp_UN }">SVECmp</a> op = <a link="Cmp_NE" file="shared_pseudocode.xml" hover="enumeration SVECmp { Cmp_EQ, Cmp_NE, Cmp_GE, Cmp_GT, Cmp_LT, Cmp_LE, Cmp_UN }">Cmp_NE</a>;</pstext>
|
|
</ps>
|
|
</ps_section>
|
|
</iclass>
|
|
</classes>
|
|
<explanations scope="all">
|
|
<explanation enclist="ctermeq_rr_, ctermne_rr_" symboldefcount="1">
|
|
<symbol link="sa_r"><R></symbol>
|
|
<definition encodedin="sz">
|
|
<intro>Is a width specifier, </intro>
|
|
<table class="valuetable">
|
|
<tgroup cols="2">
|
|
<thead>
|
|
<row>
|
|
<entry class="bitfield">sz</entry>
|
|
<entry class="symbol"><R></entry>
|
|
</row>
|
|
</thead>
|
|
<tbody>
|
|
<row>
|
|
<entry class="bitfield">0</entry>
|
|
<entry class="symbol">W</entry>
|
|
</row>
|
|
<row>
|
|
<entry class="bitfield">1</entry>
|
|
<entry class="symbol">X</entry>
|
|
</row>
|
|
</tbody>
|
|
</tgroup>
|
|
</table>
|
|
</definition>
|
|
</explanation>
|
|
<explanation enclist="ctermeq_rr_, ctermne_rr_" symboldefcount="1">
|
|
<symbol link="sa_n"><n></symbol>
|
|
<account encodedin="Rn">
|
|
<intro>
|
|
<para>Is the number [0-30] of the source general-purpose register or the name ZR (31), encoded in the "Rn" field.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
<explanation enclist="ctermeq_rr_, ctermne_rr_" symboldefcount="1">
|
|
<symbol link="sa_m"><m></symbol>
|
|
<account encodedin="Rm">
|
|
<intro>
|
|
<para>Is the number [0-30] of the source general-purpose register or the name ZR (31), encoded in the "Rm" field.</para>
|
|
</intro>
|
|
</account>
|
|
</explanation>
|
|
</explanations>
|
|
<ps_section howmany="1">
|
|
<ps name="CTERMEQ-RR-_" mylink="execute" enclabels="" sections="1" secttype="Operation">
|
|
<pstext mayhavelinks="1" section="Execute" rep_section="execute"><a link="impl-aarch64.CheckSVEEnabled.0" file="shared_pseudocode.xml" hover="function: CheckSVEEnabled()">CheckSVEEnabled</a>();
|
|
bits(esize) operand1 = <a link="impl-aarch64.X.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) X[integer n, integer width]">X</a>[n, esize];
|
|
bits(esize) operand2 = <a link="impl-aarch64.X.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) X[integer n, integer width]">X</a>[m, esize];
|
|
integer element1 = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(operand1);
|
|
integer element2 = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(operand2);
|
|
boolean term;
|
|
|
|
case op of
|
|
when <a link="Cmp_EQ" file="shared_pseudocode.xml" hover="enumeration SVECmp { Cmp_EQ, Cmp_NE, Cmp_GE, Cmp_GT, Cmp_LT, Cmp_LE, Cmp_UN }">Cmp_EQ</a> term = element1 == element2;
|
|
when <a link="Cmp_NE" file="shared_pseudocode.xml" hover="enumeration SVECmp { Cmp_EQ, Cmp_NE, Cmp_GE, Cmp_GT, Cmp_LT, Cmp_LE, Cmp_UN }">Cmp_NE</a> term = element1 != element2;
|
|
if term then
|
|
PSTATE.N = '1';
|
|
PSTATE.V = '0';
|
|
else
|
|
PSTATE.N = '0';
|
|
PSTATE.V = (NOT PSTATE.C);</pstext>
|
|
</ps>
|
|
</ps_section>
|
|
</instructionsection>
|