diff --git a/examples/mcu/stm32f407_ai_sine_display.py b/examples/mcu/stm32f407_ai_sine_display.py new file mode 100644 index 00000000..f3a0f3e0 --- /dev/null +++ b/examples/mcu/stm32f407_ai_sine_display.py @@ -0,0 +1,36 @@ +#!/usr/bin/env python3 +# +# Cross Platform and Multi Architecture Advanced Binary Emulation Framework +# + +import sys +sys.path.append("../..") + +from qiling.core import Qiling +from qiling.const import QL_VERBOSE +from qiling.extensions.mcu.stm32f4 import stm32f407 +from qiling.hw.external_device.oled.ssd1306 import PyGameSSD1306Spi + + +ql = Qiling(["../rootfs/mcu/stm32f407/ai-sine-test.elf"], + archtype="cortex_m", env=stm32f407, verbose=QL_VERBOSE.DEFAULT) + +ql.hw.create('rcc') +ql.hw.create('pwr') +ql.hw.create('flash interface') +ql.hw.create('gpioa') +ql.hw.create('gpiob') +ql.hw.create('gpiod') +ql.hw.create('spi1') +ql.hw.create('crc') + +oled = PyGameSSD1306Spi(dc=(ql.hw.gpiod, 5)) +ql.hw.spi1.connect(oled) + +def indicator(ql): + ql.log.info('PA7 set') + +ql.hw.gpioa.hook_set(7, indicator, ql) +ql.hw.systick.ratio = 1000 + +ql.run(count=800000) diff --git a/qiling/debugger/qdb/qdb.py b/qiling/debugger/qdb/qdb.py index 2608fb2c..c7df98b3 100644 --- a/qiling/debugger/qdb/qdb.py +++ b/qiling/debugger/qdb/qdb.py @@ -40,12 +40,8 @@ class QlQdb(cmd.Cmd, QlDebugger): # self.ql.loader.entry_point # ld.so # self.ql.loader.elf_entry # .text of binary - if init_hook: - pause_entry = _parse_int(init_hook) - else: - pause_entry = self.ql.loader.entry_point - - self.set_breakpoint(pause_entry, is_temp=True) + if init_hook and self.ql.loader.entry_point != init_hook: + self.do_breakpoint(init_hook) self.cur_addr = self.ql.loader.entry_point @@ -55,9 +51,7 @@ class QlQdb(cmd.Cmd, QlDebugger): else: self._init_state = self.ql.save() - if pause_entry != self.cur_addr: - self.do_context() - + self.do_context() self.interactive() @property @@ -129,7 +123,6 @@ class QlQdb(cmd.Cmd, QlDebugger): else: print(f"{color.CYAN}[+] hit breakpoint at 0x{self.cur_addr:08x}{color.END}") - self.do_context() break self.ql.arch.step() @@ -239,7 +232,8 @@ class QlQdb(cmd.Cmd, QlDebugger): self.ql.count -= 1 else: - self._run(count=1) + count = 1 if next_stop == self.cur_addr + 4 else 2 + self._run(count=count) self.do_context() diff --git a/qiling/debugger/qdb/utils.py b/qiling/debugger/qdb/utils.py index e72e4bbe..f3200320 100644 --- a/qiling/debugger/qdb/utils.py +++ b/qiling/debugger/qdb/utils.py @@ -260,8 +260,8 @@ def handle_bnj_arm(ql: Qiling, cur_addr: str) -> int: to_jump = cb_table.get(line.mnemonic)(read_reg_val(line.op_str.split(", ")[0])) if to_jump: - if '#' in line.op_str: - ret_addr = _parse_int(line.op_str.split('#')[-1]) + if "#" in line.op_str: + ret_addr = _parse_int(line.op_str.split("#")[-1]) else: ret_addr = read_reg_val(line.op_str) @@ -301,55 +301,62 @@ def handle_bnj_arm(ql: Qiling, cur_addr: str) -> int: ret_addr = next_addr - return ret_addr - elif line.mnemonic in ("ldr",): + if regdst_eq_pc(line.op_str): - _pc, _, rn_offset = line.op_str.partition(", ") + _, _, rn_offset = line.op_str.partition(", ") + r, _, imm = rn_offset.strip("[]!").partition(", #") if "]" in rn_offset.split(", ")[1]: # pre-indexed immediate - _, r, imm = line.op_str.replace("[", "").replace("]", "").replace("!", "").replace("#", "").split(", ") - ret_addr = ql.unpack32(ql.mem.read(_parse_int(imm) + read_reg_val(r), 4)) + ret_addr = ql.unpack32(ql.mem.read(_parse_int(imm) + read_reg_val(r), ARM_INST_SIZE)) else: # post-indexed immediate # FIXME: weired behavior, immediate here does not apply - _, r, imm = line.op_str.replace("[", "").replace("]", "").replace("!", "").replace("#", "").split(", ") - ret_addr = ql.unpack32(ql.mem.read(read_reg_val(r), 4)) + ret_addr = ql.unpack32(ql.mem.read(read_reg_val(r), ARM_INST_SIZE)) elif line.mnemonic in ("addls", "addne", "add") and regdst_eq_pc(line.op_str): V, C, Z, N = get_cpsr(ql.reg.cpsr) + r0, r1, r2, *imm = line.op_str.split(", ") + + # program counter is awalys 8 bytes ahead when it comes with pc, need to add extra 8 bytes + extra = 8 if 'pc' in (r0, r1, r2) else 0 + + if imm: + expr = imm[0].split() + # TODO: should support more bit shifting and rotating operation + if expr[0] == "lsl": # logical shift left + n = _parse_int(expr[-1].strip("#")) * 2 if line.mnemonic == "addls" and (C == 0 or Z == 1): - r0, r1, r2, imm = line.op_str.split(", ") - # program counter is awalys 8 bytes ahead , when it comes with pc need to add extra 8 bytes - ret_addr = 8 + read_reg_val(r1) + read_reg_val(r2) * 4 + ret_addr = extra + read_reg_val(r1) + read_reg_val(r2) * n - elif line.mnemonic == "addne" and Z == 0: - r0, r1, r2, *rest = line.op_str.split(", ") - ret_addr = 8 + read_reg_val(r1) + (read_reg_val(r2) * 4 if rest else read_reg_val(r2)) - - elif line.mnemonic == "add": - r0, r1, r2 = line.op_str.split(", ") - ret_addr = 8 + sum(map(read_reg_val, [r1, r2])) + elif line.mnemonic == "add" or (line.mnemonic == "addne" and Z == 0): + ret_addr = extra + read_reg_val(r1) + (read_reg_val(r2) * n if imm else read_reg_val(r2)) elif line.mnemonic in ("tbh", "tbb"): cur_addr += ARM_INST_SIZE + r0, r1, *imm = line.op_str.strip("[]").split(", ") + + if imm: + expr = imm[0].split() + if expr[0] == "lsl": # logical shift left + n = _parse_int(expr[-1].strip("#")) * 2 if line.mnemonic == "tbh": - r0, r1, _ = line.op_str.strip("[").strip("]").split(", ") - r1 = read_reg_val(r1) * 2 + + r1 = read_reg_val(r1) * n elif line.mnemonic == "tbb": - r0, r1 = line.op_str.strip("[").strip("]").split(", ") + r1 = read_reg_val(r1) - to_add = int.from_bytes(ql.mem.read(cur_addr+r1, 2 if line.mnemonic == "tbh" else 1), byteorder="little") * 2 + to_add = int.from_bytes(ql.mem.read(cur_addr+r1, 2 if line.mnemonic == "tbh" else 1), byteorder="little") * n ret_addr = cur_addr + to_add elif line.mnemonic.startswith("pop") and "pc" in line.op_str: - ret_addr = ql.stack_read(line.op_str.strip("{").strip("}").split(", ").index("pc") * 4) + ret_addr = ql.stack_read(line.op_str.strip("{}").split(", ").index("pc") * ARM_INST_SIZE) if not { # step to next instruction if cond does not meet "pop" : lambda *_: True, "pop.w": lambda *_: True, diff --git a/qiling/extensions/mcu/stm32f4/stm32f401.py b/qiling/extensions/mcu/stm32f4/stm32f401.py index af6bb938..e591f7ee 100644 --- a/qiling/extensions/mcu/stm32f4/stm32f401.py +++ b/qiling/extensions/mcu/stm32f4/stm32f401.py @@ -7,17 +7,20 @@ stm32f401 = { "ADC1": { "base": 0x40012000, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "CRC": { "base": 0x40023000, "struct": "STM32F4xxCrc", - "type": "periperal" + "type": "peripheral" }, "DBGMCU": { "base": 0xe0042000, "struct": "STM32F4xxDbgmcu", - "type": "periperal" + "kwargs": { + "dev_id": 0x413, + }, + "type": "core peripheral" }, "DMA1": { "base": 0x40026000, @@ -32,7 +35,7 @@ stm32f401 = { "stream6_intn": 17, "stream7_intn": 47 }, - "type": "periperal" + "type": "peripheral" }, "DMA2": { "base": 0x40026400, @@ -47,12 +50,12 @@ stm32f401 = { "stream6_intn": 69, "stream7_intn": 70 }, - "type": "periperal" + "type": "peripheral" }, "EXTI": { "base": 0x40013c00, "struct": "STM32F4xxExti", - "type": "periperal" + "type": "peripheral" }, "FLASH": { "base": 0x8000000, @@ -64,35 +67,43 @@ stm32f401 = { "size": 0x400, "type": "memory" }, + "FLASH INTERFACE": { + "base": 0x40023c00, + "struct": "STM32F4xxFlash", + "kwargs": { + "intn": 4, + }, + "type": "peripheral" + }, "GPIOA": { "base": 0x40020000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOB": { "base": 0x40020400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOC": { "base": 0x40020800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOD": { "base": 0x40020c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOE": { "base": 0x40021000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOH": { "base": 0x40021c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "I2C1": { "base": 0x40005400, @@ -101,7 +112,7 @@ stm32f401 = { "er_intn": 32, "ev_intn": 31 }, - "type": "periperal" + "type": "peripheral" }, "I2C2": { "base": 0x40005800, @@ -110,7 +121,7 @@ stm32f401 = { "er_intn": 34, "ev_intn": 33 }, - "type": "periperal" + "type": "peripheral" }, "I2C3": { "base": 0x40005c00, @@ -119,22 +130,22 @@ stm32f401 = { "er_intn": 73, "ev_intn": 72 }, - "type": "periperal" + "type": "peripheral" }, "I2S2ext": { "base": 0x40003400, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "I2S3ext": { "base": 0x40004000, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "IWDG": { "base": 0x40003000, "struct": "STM32F4xxIwdg", - "type": "periperal" + "type": "peripheral" }, "NVIC": { "base": 0xe000e100, @@ -154,13 +165,13 @@ stm32f401 = { }, "PPB": { "base": 0xe0000000, - "size": 0x10000, + "size": 0x100000, "type": "mmio" }, "PWR": { "base": 0x40007000, "struct": "STM32F4xxPwr", - "type": "periperal" + "type": "peripheral" }, "RCC": { "base": 0x40023800, @@ -168,7 +179,7 @@ stm32f401 = { "kwargs": { "intn": 5 }, - "type": "periperal" + "type": "peripheral" }, "RTC": { "base": 0x40002800, @@ -177,7 +188,7 @@ stm32f401 = { "alarm_intn": 41, "wkup_intn": 3 }, - "type": "periperal" + "type": "peripheral" }, "SCB": { "base": 0xe000ed00, @@ -190,7 +201,7 @@ stm32f401 = { "kwargs": { "intn": 49 }, - "type": "periperal" + "type": "peripheral" }, "SPI1": { "base": 0x40013000, @@ -198,7 +209,7 @@ stm32f401 = { "kwargs": { "intn": 35 }, - "type": "periperal" + "type": "peripheral" }, "SPI2": { "base": 0x40003800, @@ -206,7 +217,7 @@ stm32f401 = { "kwargs": { "intn": 36 }, - "type": "periperal" + "type": "peripheral" }, "SPI3": { "base": 0x40003c00, @@ -214,7 +225,7 @@ stm32f401 = { "kwargs": { "intn": 51 }, - "type": "periperal" + "type": "peripheral" }, "SPI4": { "base": 0x40013400, @@ -222,7 +233,7 @@ stm32f401 = { "kwargs": { "intn": 84 }, - "type": "periperal" + "type": "peripheral" }, "SRAM": { "base": 0x20000000, @@ -238,7 +249,7 @@ stm32f401 = { "SYSCFG": { "base": 0x40013800, "struct": "STM32F4xxSyscfg", - "type": "periperal" + "type": "peripheral" }, "SYSTEM": { "base": 0x1fff0000, @@ -259,17 +270,17 @@ stm32f401 = { "trg_com_tim11_intn": 26, "up_tim10_intn": 25 }, - "type": "periperal" + "type": "peripheral" }, "TIM10": { "base": 0x40014400, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM11": { "base": 0x40014800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM2": { "base": 0x40000000, @@ -277,7 +288,7 @@ stm32f401 = { "kwargs": { "intn": 28 }, - "type": "periperal" + "type": "peripheral" }, "TIM3": { "base": 0x40000400, @@ -285,7 +296,7 @@ stm32f401 = { "kwargs": { "intn": 29 }, - "type": "periperal" + "type": "peripheral" }, "TIM4": { "base": 0x40000800, @@ -293,7 +304,7 @@ stm32f401 = { "kwargs": { "intn": 30 }, - "type": "periperal" + "type": "peripheral" }, "TIM5": { "base": 0x40000c00, @@ -301,12 +312,12 @@ stm32f401 = { "kwargs": { "intn": 50 }, - "type": "periperal" + "type": "peripheral" }, "TIM9": { "base": 0x40014000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "USART1": { "base": 0x40011000, @@ -314,7 +325,7 @@ stm32f401 = { "kwargs": { "intn": 37 }, - "type": "periperal" + "type": "peripheral" }, "USART2": { "base": 0x40004400, @@ -322,7 +333,7 @@ stm32f401 = { "kwargs": { "intn": 38 }, - "type": "periperal" + "type": "peripheral" }, "USART6": { "base": 0x40011400, @@ -330,7 +341,7 @@ stm32f401 = { "kwargs": { "intn": 71 }, - "type": "periperal" + "type": "peripheral" }, "WWDG": { "base": 0x40002c00, @@ -338,6 +349,6 @@ stm32f401 = { "kwargs": { "intn": 0 }, - "type": "periperal" + "type": "peripheral" } } \ No newline at end of file diff --git a/qiling/extensions/mcu/stm32f4/stm32f405.py b/qiling/extensions/mcu/stm32f4/stm32f405.py index 5de91995..1f3d8b4f 100644 --- a/qiling/extensions/mcu/stm32f4/stm32f405.py +++ b/qiling/extensions/mcu/stm32f4/stm32f405.py @@ -7,17 +7,17 @@ stm32f405 = { "ADC1": { "base": 0x40012000, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "ADC2": { "base": 0x40012100, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "ADC3": { "base": 0x40012200, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "CAN1": { "base": 0x40006400, @@ -28,7 +28,7 @@ stm32f405 = { "sce_intn": 22, "tx_intn": 19 }, - "type": "periperal" + "type": "peripheral" }, "CAN2": { "base": 0x40006800, @@ -39,27 +39,25 @@ stm32f405 = { "sce_intn": 66, "tx_intn": 63 }, - "type": "periperal" + "type": "peripheral" }, "CRC": { "base": 0x40023000, "struct": "STM32F4xxCrc", - "type": "periperal" - }, - "DAC": { - "base": 0x40007400, - "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DAC1": { "base": 0x40007400, "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DBGMCU": { "base": 0xe0042000, "struct": "STM32F4xxDbgmcu", - "type": "periperal" + "kwargs": { + "dev_id": 0x413, + }, + "type": "core peripheral" }, "DMA1": { "base": 0x40026000, @@ -74,7 +72,7 @@ stm32f405 = { "stream6_intn": 17, "stream7_intn": 47 }, - "type": "periperal" + "type": "peripheral" }, "DMA2": { "base": 0x40026400, @@ -89,12 +87,12 @@ stm32f405 = { "stream6_intn": 69, "stream7_intn": 70 }, - "type": "periperal" + "type": "peripheral" }, "EXTI": { "base": 0x40013c00, "struct": "STM32F4xxExti", - "type": "periperal" + "type": "peripheral" }, "FLASH": { "base": 0x8000000, @@ -106,50 +104,58 @@ stm32f405 = { "size": 0x400, "type": "memory" }, + "FLASH INTERFACE": { + "base": 0x40023c00, + "struct": "STM32F4xxFlash", + "kwargs": { + "intn": 4, + }, + "type": "peripheral" + }, "GPIOA": { "base": 0x40020000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOB": { "base": 0x40020400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOC": { "base": 0x40020800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOD": { "base": 0x40020c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOE": { "base": 0x40021000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOF": { "base": 0x40021400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOG": { "base": 0x40021800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOH": { "base": 0x40021c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOI": { "base": 0x40022000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "I2C1": { "base": 0x40005400, @@ -158,7 +164,7 @@ stm32f405 = { "er_intn": 32, "ev_intn": 31 }, - "type": "periperal" + "type": "peripheral" }, "I2C2": { "base": 0x40005800, @@ -167,7 +173,7 @@ stm32f405 = { "er_intn": 34, "ev_intn": 33 }, - "type": "periperal" + "type": "peripheral" }, "I2C3": { "base": 0x40005c00, @@ -176,22 +182,22 @@ stm32f405 = { "er_intn": 73, "ev_intn": 72 }, - "type": "periperal" + "type": "peripheral" }, "I2S2ext": { "base": 0x40003400, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "I2S3ext": { "base": 0x40004000, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "IWDG": { "base": 0x40003000, "struct": "STM32F4xxIwdg", - "type": "periperal" + "type": "peripheral" }, "NVIC": { "base": 0xe000e100, @@ -211,13 +217,13 @@ stm32f405 = { }, "PPB": { "base": 0xe0000000, - "size": 0x10000, + "size": 0x100000, "type": "mmio" }, "PWR": { "base": 0x40007000, "struct": "STM32F4xxPwr", - "type": "periperal" + "type": "peripheral" }, "RCC": { "base": 0x40023800, @@ -225,7 +231,7 @@ stm32f405 = { "kwargs": { "intn": 5 }, - "type": "periperal" + "type": "peripheral" }, "RNG": { "base": 0x50060800, @@ -233,7 +239,7 @@ stm32f405 = { "kwargs": { "intn": 80 }, - "type": "periperal" + "type": "peripheral" }, "RTC": { "base": 0x40002800, @@ -242,7 +248,7 @@ stm32f405 = { "alarm_intn": 41, "wkup_intn": 3 }, - "type": "periperal" + "type": "peripheral" }, "SCB": { "base": 0xe000ed00, @@ -255,7 +261,7 @@ stm32f405 = { "kwargs": { "intn": 49 }, - "type": "periperal" + "type": "peripheral" }, "SPI1": { "base": 0x40013000, @@ -263,7 +269,7 @@ stm32f405 = { "kwargs": { "intn": 35 }, - "type": "periperal" + "type": "peripheral" }, "SPI2": { "base": 0x40003800, @@ -271,7 +277,7 @@ stm32f405 = { "kwargs": { "intn": 36 }, - "type": "periperal" + "type": "peripheral" }, "SPI3": { "base": 0x40003c00, @@ -279,7 +285,7 @@ stm32f405 = { "kwargs": { "intn": 51 }, - "type": "periperal" + "type": "peripheral" }, "SRAM": { "base": 0x20000000, @@ -295,7 +301,7 @@ stm32f405 = { "SYSCFG": { "base": 0x40013800, "struct": "STM32F4xxSyscfg", - "type": "periperal" + "type": "peripheral" }, "SYSTEM": { "base": 0x1fff0000, @@ -316,32 +322,32 @@ stm32f405 = { "trg_com_tim11_intn": 26, "up_tim10_intn": 25 }, - "type": "periperal" + "type": "peripheral" }, "TIM10": { "base": 0x40014400, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM11": { "base": 0x40014800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM12": { "base": 0x40001800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM13": { "base": 0x40001c00, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM14": { "base": 0x40002000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM2": { "base": 0x40000000, @@ -349,7 +355,7 @@ stm32f405 = { "kwargs": { "intn": 28 }, - "type": "periperal" + "type": "peripheral" }, "TIM3": { "base": 0x40000400, @@ -357,7 +363,7 @@ stm32f405 = { "kwargs": { "intn": 29 }, - "type": "periperal" + "type": "peripheral" }, "TIM4": { "base": 0x40000800, @@ -365,7 +371,7 @@ stm32f405 = { "kwargs": { "intn": 30 }, - "type": "periperal" + "type": "peripheral" }, "TIM5": { "base": 0x40000c00, @@ -373,7 +379,7 @@ stm32f405 = { "kwargs": { "intn": 50 }, - "type": "periperal" + "type": "peripheral" }, "TIM6": { "base": 0x40001000, @@ -381,7 +387,7 @@ stm32f405 = { "kwargs": { "dac_intn": 54 }, - "type": "periperal" + "type": "peripheral" }, "TIM7": { "base": 0x40001400, @@ -389,7 +395,7 @@ stm32f405 = { "kwargs": { "intn": 55 }, - "type": "periperal" + "type": "peripheral" }, "TIM8": { "base": 0x40010400, @@ -400,12 +406,12 @@ stm32f405 = { "trg_com_tim14_intn": 45, "up_tim13_intn": 44 }, - "type": "periperal" + "type": "peripheral" }, "TIM9": { "base": 0x40014000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "UART4": { "base": 0x40004c00, @@ -413,7 +419,7 @@ stm32f405 = { "kwargs": { "intn": 52 }, - "type": "periperal" + "type": "peripheral" }, "UART5": { "base": 0x40005000, @@ -421,7 +427,7 @@ stm32f405 = { "kwargs": { "intn": 53 }, - "type": "periperal" + "type": "peripheral" }, "USART1": { "base": 0x40011000, @@ -429,7 +435,7 @@ stm32f405 = { "kwargs": { "intn": 37 }, - "type": "periperal" + "type": "peripheral" }, "USART2": { "base": 0x40004400, @@ -437,7 +443,7 @@ stm32f405 = { "kwargs": { "intn": 38 }, - "type": "periperal" + "type": "peripheral" }, "USART3": { "base": 0x40004800, @@ -445,7 +451,7 @@ stm32f405 = { "kwargs": { "intn": 39 }, - "type": "periperal" + "type": "peripheral" }, "USART6": { "base": 0x40011400, @@ -453,7 +459,7 @@ stm32f405 = { "kwargs": { "intn": 71 }, - "type": "periperal" + "type": "peripheral" }, "WWDG": { "base": 0x40002c00, @@ -461,6 +467,6 @@ stm32f405 = { "kwargs": { "intn": 0 }, - "type": "periperal" + "type": "peripheral" } } \ No newline at end of file diff --git a/qiling/extensions/mcu/stm32f4/stm32f407.py b/qiling/extensions/mcu/stm32f4/stm32f407.py index 2c2e618b..a83531fb 100644 --- a/qiling/extensions/mcu/stm32f4/stm32f407.py +++ b/qiling/extensions/mcu/stm32f4/stm32f407.py @@ -7,17 +7,17 @@ stm32f407 = { "ADC1": { "base": 0x40012000, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "ADC2": { "base": 0x40012100, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "ADC3": { "base": 0x40012200, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "CAN1": { "base": 0x40006400, @@ -28,7 +28,7 @@ stm32f407 = { "sce_intn": 22, "tx_intn": 19 }, - "type": "periperal" + "type": "peripheral" }, "CAN2": { "base": 0x40006800, @@ -39,27 +39,25 @@ stm32f407 = { "sce_intn": 66, "tx_intn": 63 }, - "type": "periperal" + "type": "peripheral" }, "CRC": { "base": 0x40023000, "struct": "STM32F4xxCrc", - "type": "periperal" - }, - "DAC": { - "base": 0x40007400, - "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DAC1": { "base": 0x40007400, "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DBGMCU": { "base": 0xe0042000, "struct": "STM32F4xxDbgmcu", - "type": "periperal" + "kwargs": { + "dev_id": 0x413, + }, + "type": "core peripheral" }, "DCMI": { "base": 0x50050000, @@ -67,7 +65,7 @@ stm32f407 = { "kwargs": { "intn": 78 }, - "type": "periperal" + "type": "peripheral" }, "DMA1": { "base": 0x40026000, @@ -82,7 +80,7 @@ stm32f407 = { "stream6_intn": 17, "stream7_intn": 47 }, - "type": "periperal" + "type": "peripheral" }, "DMA2": { "base": 0x40026400, @@ -97,7 +95,7 @@ stm32f407 = { "stream6_intn": 69, "stream7_intn": 70 }, - "type": "periperal" + "type": "peripheral" }, "ETH": { "base": 0x40028000, @@ -106,12 +104,12 @@ stm32f407 = { "intn": 61, "wkup_intn": 62 }, - "type": "periperal" + "type": "peripheral" }, "EXTI": { "base": 0x40013c00, "struct": "STM32F4xxExti", - "type": "periperal" + "type": "peripheral" }, "FLASH": { "base": 0x8000000, @@ -123,50 +121,58 @@ stm32f407 = { "size": 0x400, "type": "memory" }, + "FLASH INTERFACE": { + "base": 0x40023c00, + "struct": "STM32F4xxFlash", + "kwargs": { + "intn": 4, + }, + "type": "peripheral" + }, "GPIOA": { "base": 0x40020000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOB": { "base": 0x40020400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOC": { "base": 0x40020800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOD": { "base": 0x40020c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOE": { "base": 0x40021000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOF": { "base": 0x40021400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOG": { "base": 0x40021800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOH": { "base": 0x40021c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOI": { "base": 0x40022000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "I2C1": { "base": 0x40005400, @@ -175,7 +181,7 @@ stm32f407 = { "er_intn": 32, "ev_intn": 31 }, - "type": "periperal" + "type": "peripheral" }, "I2C2": { "base": 0x40005800, @@ -184,7 +190,7 @@ stm32f407 = { "er_intn": 34, "ev_intn": 33 }, - "type": "periperal" + "type": "peripheral" }, "I2C3": { "base": 0x40005c00, @@ -193,22 +199,22 @@ stm32f407 = { "er_intn": 73, "ev_intn": 72 }, - "type": "periperal" + "type": "peripheral" }, "I2S2ext": { "base": 0x40003400, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "I2S3ext": { "base": 0x40004000, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "IWDG": { "base": 0x40003000, "struct": "STM32F4xxIwdg", - "type": "periperal" + "type": "peripheral" }, "NVIC": { "base": 0xe000e100, @@ -228,13 +234,13 @@ stm32f407 = { }, "PPB": { "base": 0xe0000000, - "size": 0x10000, + "size": 0x100000, "type": "mmio" }, "PWR": { "base": 0x40007000, "struct": "STM32F4xxPwr", - "type": "periperal" + "type": "peripheral" }, "RCC": { "base": 0x40023800, @@ -242,7 +248,7 @@ stm32f407 = { "kwargs": { "intn": 5 }, - "type": "periperal" + "type": "peripheral" }, "RNG": { "base": 0x50060800, @@ -250,7 +256,7 @@ stm32f407 = { "kwargs": { "intn": 80 }, - "type": "periperal" + "type": "peripheral" }, "RTC": { "base": 0x40002800, @@ -259,7 +265,7 @@ stm32f407 = { "alarm_intn": 41, "wkup_intn": 3 }, - "type": "periperal" + "type": "peripheral" }, "SCB": { "base": 0xe000ed00, @@ -272,7 +278,7 @@ stm32f407 = { "kwargs": { "intn": 49 }, - "type": "periperal" + "type": "peripheral" }, "SPI1": { "base": 0x40013000, @@ -280,7 +286,7 @@ stm32f407 = { "kwargs": { "intn": 35 }, - "type": "periperal" + "type": "peripheral" }, "SPI2": { "base": 0x40003800, @@ -288,7 +294,7 @@ stm32f407 = { "kwargs": { "intn": 36 }, - "type": "periperal" + "type": "peripheral" }, "SPI3": { "base": 0x40003c00, @@ -296,7 +302,7 @@ stm32f407 = { "kwargs": { "intn": 51 }, - "type": "periperal" + "type": "peripheral" }, "SRAM": { "base": 0x20000000, @@ -312,7 +318,7 @@ stm32f407 = { "SYSCFG": { "base": 0x40013800, "struct": "STM32F4xxSyscfg", - "type": "periperal" + "type": "peripheral" }, "SYSTEM": { "base": 0x1fff0000, @@ -333,32 +339,32 @@ stm32f407 = { "trg_com_tim11_intn": 26, "up_tim10_intn": 25 }, - "type": "periperal" + "type": "peripheral" }, "TIM10": { "base": 0x40014400, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM11": { "base": 0x40014800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM12": { "base": 0x40001800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM13": { "base": 0x40001c00, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM14": { "base": 0x40002000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM2": { "base": 0x40000000, @@ -366,7 +372,7 @@ stm32f407 = { "kwargs": { "intn": 28 }, - "type": "periperal" + "type": "peripheral" }, "TIM3": { "base": 0x40000400, @@ -374,7 +380,7 @@ stm32f407 = { "kwargs": { "intn": 29 }, - "type": "periperal" + "type": "peripheral" }, "TIM4": { "base": 0x40000800, @@ -382,7 +388,7 @@ stm32f407 = { "kwargs": { "intn": 30 }, - "type": "periperal" + "type": "peripheral" }, "TIM5": { "base": 0x40000c00, @@ -390,7 +396,7 @@ stm32f407 = { "kwargs": { "intn": 50 }, - "type": "periperal" + "type": "peripheral" }, "TIM6": { "base": 0x40001000, @@ -398,7 +404,7 @@ stm32f407 = { "kwargs": { "dac_intn": 54 }, - "type": "periperal" + "type": "peripheral" }, "TIM7": { "base": 0x40001400, @@ -406,7 +412,7 @@ stm32f407 = { "kwargs": { "intn": 55 }, - "type": "periperal" + "type": "peripheral" }, "TIM8": { "base": 0x40010400, @@ -417,12 +423,12 @@ stm32f407 = { "trg_com_tim14_intn": 45, "up_tim13_intn": 44 }, - "type": "periperal" + "type": "peripheral" }, "TIM9": { "base": 0x40014000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "UART4": { "base": 0x40004c00, @@ -430,7 +436,7 @@ stm32f407 = { "kwargs": { "intn": 52 }, - "type": "periperal" + "type": "peripheral" }, "UART5": { "base": 0x40005000, @@ -438,7 +444,7 @@ stm32f407 = { "kwargs": { "intn": 53 }, - "type": "periperal" + "type": "peripheral" }, "USART1": { "base": 0x40011000, @@ -446,7 +452,7 @@ stm32f407 = { "kwargs": { "intn": 37 }, - "type": "periperal" + "type": "peripheral" }, "USART2": { "base": 0x40004400, @@ -454,7 +460,7 @@ stm32f407 = { "kwargs": { "intn": 38 }, - "type": "periperal" + "type": "peripheral" }, "USART3": { "base": 0x40004800, @@ -462,7 +468,7 @@ stm32f407 = { "kwargs": { "intn": 39 }, - "type": "periperal" + "type": "peripheral" }, "USART6": { "base": 0x40011400, @@ -470,7 +476,7 @@ stm32f407 = { "kwargs": { "intn": 71 }, - "type": "periperal" + "type": "peripheral" }, "WWDG": { "base": 0x40002c00, @@ -478,6 +484,6 @@ stm32f407 = { "kwargs": { "intn": 0 }, - "type": "periperal" + "type": "peripheral" } } \ No newline at end of file diff --git a/qiling/extensions/mcu/stm32f4/stm32f410.py b/qiling/extensions/mcu/stm32f4/stm32f410.py index 0f413f97..c3a78c48 100644 --- a/qiling/extensions/mcu/stm32f4/stm32f410.py +++ b/qiling/extensions/mcu/stm32f4/stm32f410.py @@ -7,27 +7,25 @@ stm32f410 = { "ADC1": { "base": 0x40012000, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "CRC": { "base": 0x40023000, "struct": "STM32F4xxCrc", - "type": "periperal" - }, - "DAC": { - "base": 0x40007400, - "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DAC1": { "base": 0x40007400, "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DBGMCU": { "base": 0xe0042000, "struct": "STM32F4xxDbgmcu", - "type": "periperal" + "kwargs": { + "dev_id": 0x413, + }, + "type": "core peripheral" }, "DMA1": { "base": 0x40026000, @@ -42,7 +40,7 @@ stm32f410 = { "stream6_intn": 17, "stream7_intn": 47 }, - "type": "periperal" + "type": "peripheral" }, "DMA2": { "base": 0x40026400, @@ -57,12 +55,12 @@ stm32f410 = { "stream6_intn": 69, "stream7_intn": 70 }, - "type": "periperal" + "type": "peripheral" }, "EXTI": { "base": 0x40013c00, "struct": "STM32F4xxExti", - "type": "periperal" + "type": "peripheral" }, "FLASH": { "base": 0x8000000, @@ -74,6 +72,14 @@ stm32f410 = { "size": 0x400, "type": "memory" }, + "FLASH INTERFACE": { + "base": 0x40023c00, + "struct": "STM32F4xxFlash", + "kwargs": { + "intn": 4, + }, + "type": "peripheral" + }, "FMPI2C1": { "base": 0x40006000, "struct": "STM32F4xxFmpi2c", @@ -81,27 +87,27 @@ stm32f410 = { "er_intn": 96, "ev_intn": 95 }, - "type": "periperal" + "type": "peripheral" }, "GPIOA": { "base": 0x40020000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOB": { "base": 0x40020400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOC": { "base": 0x40020800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOH": { "base": 0x40021c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "I2C1": { "base": 0x40005400, @@ -110,7 +116,7 @@ stm32f410 = { "er_intn": 32, "ev_intn": 31 }, - "type": "periperal" + "type": "peripheral" }, "I2C2": { "base": 0x40005800, @@ -119,12 +125,12 @@ stm32f410 = { "er_intn": 34, "ev_intn": 33 }, - "type": "periperal" + "type": "peripheral" }, "IWDG": { "base": 0x40003000, "struct": "STM32F4xxIwdg", - "type": "periperal" + "type": "peripheral" }, "LPTIM1": { "base": 0x40002400, @@ -132,7 +138,7 @@ stm32f410 = { "kwargs": { "intn": 97 }, - "type": "periperal" + "type": "peripheral" }, "NVIC": { "base": 0xe000e100, @@ -152,13 +158,13 @@ stm32f410 = { }, "PPB": { "base": 0xe0000000, - "size": 0x10000, + "size": 0x100000, "type": "mmio" }, "PWR": { "base": 0x40007000, "struct": "STM32F4xxPwr", - "type": "periperal" + "type": "peripheral" }, "RCC": { "base": 0x40023800, @@ -166,7 +172,7 @@ stm32f410 = { "kwargs": { "intn": 5 }, - "type": "periperal" + "type": "peripheral" }, "RNG": { "base": 0x40080000, @@ -174,7 +180,7 @@ stm32f410 = { "kwargs": { "intn": 80 }, - "type": "periperal" + "type": "peripheral" }, "RTC": { "base": 0x40002800, @@ -183,7 +189,7 @@ stm32f410 = { "alarm_intn": 41, "wkup_intn": 3 }, - "type": "periperal" + "type": "peripheral" }, "SCB": { "base": 0xe000ed00, @@ -196,7 +202,7 @@ stm32f410 = { "kwargs": { "intn": 35 }, - "type": "periperal" + "type": "peripheral" }, "SPI2": { "base": 0x40003800, @@ -204,7 +210,7 @@ stm32f410 = { "kwargs": { "intn": 36 }, - "type": "periperal" + "type": "peripheral" }, "SPI5": { "base": 0x40015000, @@ -212,7 +218,7 @@ stm32f410 = { "kwargs": { "intn": 85 }, - "type": "periperal" + "type": "peripheral" }, "SRAM": { "base": 0x20000000, @@ -228,7 +234,7 @@ stm32f410 = { "SYSCFG": { "base": 0x40013800, "struct": "STM32F4xxSyscfgV2", - "type": "periperal" + "type": "peripheral" }, "SYSTEM": { "base": 0x1fff0000, @@ -249,12 +255,12 @@ stm32f410 = { "trg_com_tim11_intn": 26, "up_intn": 25 }, - "type": "periperal" + "type": "peripheral" }, "TIM11": { "base": 0x40014800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM5": { "base": 0x40000c00, @@ -262,7 +268,7 @@ stm32f410 = { "kwargs": { "intn": 50 }, - "type": "periperal" + "type": "peripheral" }, "TIM6": { "base": 0x40001000, @@ -270,12 +276,12 @@ stm32f410 = { "kwargs": { "dac_intn": 54 }, - "type": "periperal" + "type": "peripheral" }, "TIM9": { "base": 0x40014000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "USART1": { "base": 0x40011000, @@ -283,7 +289,7 @@ stm32f410 = { "kwargs": { "intn": 37 }, - "type": "periperal" + "type": "peripheral" }, "USART2": { "base": 0x40004400, @@ -291,7 +297,7 @@ stm32f410 = { "kwargs": { "intn": 38 }, - "type": "periperal" + "type": "peripheral" }, "USART6": { "base": 0x40011400, @@ -299,7 +305,7 @@ stm32f410 = { "kwargs": { "intn": 71 }, - "type": "periperal" + "type": "peripheral" }, "WWDG": { "base": 0x40002c00, @@ -307,6 +313,6 @@ stm32f410 = { "kwargs": { "intn": 0 }, - "type": "periperal" + "type": "peripheral" } } \ No newline at end of file diff --git a/qiling/extensions/mcu/stm32f4/stm32f411.py b/qiling/extensions/mcu/stm32f4/stm32f411.py index d941cd6e..e5f535a1 100644 --- a/qiling/extensions/mcu/stm32f4/stm32f411.py +++ b/qiling/extensions/mcu/stm32f4/stm32f411.py @@ -7,17 +7,20 @@ stm32f411 = { "ADC1": { "base": 0x40012000, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "CRC": { "base": 0x40023000, "struct": "STM32F4xxCrc", - "type": "periperal" + "type": "peripheral" }, "DBGMCU": { "base": 0xe0042000, "struct": "STM32F4xxDbgmcu", - "type": "periperal" + "kwargs": { + "dev_id": 0x413, + }, + "type": "core peripheral" }, "DMA1": { "base": 0x40026000, @@ -32,7 +35,7 @@ stm32f411 = { "stream6_intn": 17, "stream7_intn": 47 }, - "type": "periperal" + "type": "peripheral" }, "DMA2": { "base": 0x40026400, @@ -47,12 +50,12 @@ stm32f411 = { "stream6_intn": 69, "stream7_intn": 70 }, - "type": "periperal" + "type": "peripheral" }, "EXTI": { "base": 0x40013c00, "struct": "STM32F4xxExti", - "type": "periperal" + "type": "peripheral" }, "FLASH": { "base": 0x8000000, @@ -70,37 +73,37 @@ stm32f411 = { "kwargs": { "intn": 4, }, - "type": "periperal" + "type": "peripheral" }, "GPIOA": { "base": 0x40020000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOB": { "base": 0x40020400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOC": { "base": 0x40020800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOD": { "base": 0x40020c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOE": { "base": 0x40021000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOH": { "base": 0x40021c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "I2C1": { "base": 0x40005400, @@ -109,7 +112,7 @@ stm32f411 = { "er_intn": 32, "ev_intn": 31 }, - "type": "periperal" + "type": "peripheral" }, "I2C2": { "base": 0x40005800, @@ -118,7 +121,7 @@ stm32f411 = { "er_intn": 34, "ev_intn": 33 }, - "type": "periperal" + "type": "peripheral" }, "I2C3": { "base": 0x40005c00, @@ -127,22 +130,22 @@ stm32f411 = { "er_intn": 73, "ev_intn": 72 }, - "type": "periperal" + "type": "peripheral" }, "I2S2ext": { "base": 0x40003400, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "I2S3ext": { "base": 0x40004000, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "IWDG": { "base": 0x40003000, "struct": "STM32F4xxIwdg", - "type": "periperal" + "type": "peripheral" }, "NVIC": { "base": 0xe000e100, @@ -162,13 +165,13 @@ stm32f411 = { }, "PPB": { "base": 0xe0000000, - "size": 0x10000, + "size": 0x100000, "type": "mmio" }, "PWR": { "base": 0x40007000, "struct": "STM32F4xxPwr", - "type": "periperal" + "type": "peripheral" }, "RCC": { "base": 0x40023800, @@ -176,7 +179,7 @@ stm32f411 = { "kwargs": { "intn": 5 }, - "type": "periperal" + "type": "peripheral" }, "RTC": { "base": 0x40002800, @@ -185,7 +188,7 @@ stm32f411 = { "alarm_intn": 41, "wkup_intn": 3 }, - "type": "periperal" + "type": "peripheral" }, "SCB": { "base": 0xe000ed00, @@ -198,7 +201,7 @@ stm32f411 = { "kwargs": { "intn": 49 }, - "type": "periperal" + "type": "peripheral" }, "SPI1": { "base": 0x40013000, @@ -206,7 +209,7 @@ stm32f411 = { "kwargs": { "intn": 35 }, - "type": "periperal" + "type": "peripheral" }, "SPI2": { "base": 0x40003800, @@ -214,7 +217,7 @@ stm32f411 = { "kwargs": { "intn": 36 }, - "type": "periperal" + "type": "peripheral" }, "SPI3": { "base": 0x40003c00, @@ -222,7 +225,7 @@ stm32f411 = { "kwargs": { "intn": 51 }, - "type": "periperal" + "type": "peripheral" }, "SPI4": { "base": 0x40013400, @@ -230,7 +233,7 @@ stm32f411 = { "kwargs": { "intn": 84 }, - "type": "periperal" + "type": "peripheral" }, "SPI5": { "base": 0x40015000, @@ -238,7 +241,7 @@ stm32f411 = { "kwargs": { "intn": 85 }, - "type": "periperal" + "type": "peripheral" }, "SRAM": { "base": 0x20000000, @@ -254,7 +257,7 @@ stm32f411 = { "SYSCFG": { "base": 0x40013800, "struct": "STM32F4xxSyscfg", - "type": "periperal" + "type": "peripheral" }, "SYSTEM": { "base": 0x1fff0000, @@ -275,17 +278,17 @@ stm32f411 = { "trg_com_tim11_intn": 26, "up_tim10_intn": 25 }, - "type": "periperal" + "type": "peripheral" }, "TIM10": { "base": 0x40014400, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM11": { "base": 0x40014800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM2": { "base": 0x40000000, @@ -293,7 +296,7 @@ stm32f411 = { "kwargs": { "intn": 28 }, - "type": "periperal" + "type": "peripheral" }, "TIM3": { "base": 0x40000400, @@ -301,7 +304,7 @@ stm32f411 = { "kwargs": { "intn": 29 }, - "type": "periperal" + "type": "peripheral" }, "TIM4": { "base": 0x40000800, @@ -309,7 +312,7 @@ stm32f411 = { "kwargs": { "intn": 30 }, - "type": "periperal" + "type": "peripheral" }, "TIM5": { "base": 0x40000c00, @@ -317,12 +320,12 @@ stm32f411 = { "kwargs": { "intn": 50 }, - "type": "periperal" + "type": "peripheral" }, "TIM9": { "base": 0x40014000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "USART1": { "base": 0x40011000, @@ -330,7 +333,7 @@ stm32f411 = { "kwargs": { "intn": 37 }, - "type": "periperal" + "type": "peripheral" }, "USART2": { "base": 0x40004400, @@ -338,7 +341,7 @@ stm32f411 = { "kwargs": { "intn": 38 }, - "type": "periperal" + "type": "peripheral" }, "USART6": { "base": 0x40011400, @@ -346,7 +349,7 @@ stm32f411 = { "kwargs": { "intn": 71 }, - "type": "periperal" + "type": "peripheral" }, "WWDG": { "base": 0x40002c00, @@ -354,6 +357,6 @@ stm32f411 = { "kwargs": { "intn": 0 }, - "type": "periperal" + "type": "peripheral" } } \ No newline at end of file diff --git a/qiling/extensions/mcu/stm32f4/stm32f412.py b/qiling/extensions/mcu/stm32f4/stm32f412.py index 2cd3739e..626908ba 100644 --- a/qiling/extensions/mcu/stm32f4/stm32f412.py +++ b/qiling/extensions/mcu/stm32f4/stm32f412.py @@ -7,7 +7,7 @@ stm32f412 = { "ADC1": { "base": 0x40012000, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "CAN1": { "base": 0x40006400, @@ -18,7 +18,7 @@ stm32f412 = { "sce_intn": 22, "tx_intn": 19 }, - "type": "periperal" + "type": "peripheral" }, "CAN2": { "base": 0x40006800, @@ -29,17 +29,20 @@ stm32f412 = { "sce_intn": 66, "tx_intn": 63 }, - "type": "periperal" + "type": "peripheral" }, "CRC": { "base": 0x40023000, "struct": "STM32F4xxCrc", - "type": "periperal" + "type": "peripheral" }, "DBGMCU": { "base": 0xe0042000, "struct": "STM32F4xxDbgmcu", - "type": "periperal" + "kwargs": { + "dev_id": 0x413, + }, + "type": "core peripheral" }, "DMA1": { "base": 0x40026000, @@ -54,7 +57,7 @@ stm32f412 = { "stream6_intn": 17, "stream7_intn": 47 }, - "type": "periperal" + "type": "peripheral" }, "DMA2": { "base": 0x40026400, @@ -69,12 +72,12 @@ stm32f412 = { "stream6_intn": 69, "stream7_intn": 70 }, - "type": "periperal" + "type": "peripheral" }, "EXTI": { "base": 0x40013c00, "struct": "STM32F4xxExti", - "type": "periperal" + "type": "peripheral" }, "FLASH": { "base": 0x8000000, @@ -86,6 +89,14 @@ stm32f412 = { "size": 0x400, "type": "memory" }, + "FLASH INTERFACE": { + "base": 0x40023c00, + "struct": "STM32F4xxFlash", + "kwargs": { + "intn": 4, + }, + "type": "peripheral" + }, "FMPI2C1": { "base": 0x40006000, "struct": "STM32F4xxFmpi2c", @@ -93,47 +104,47 @@ stm32f412 = { "er_intn": 96, "ev_intn": 95 }, - "type": "periperal" + "type": "peripheral" }, "GPIOA": { "base": 0x40020000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOB": { "base": 0x40020400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOC": { "base": 0x40020800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOD": { "base": 0x40020c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOE": { "base": 0x40021000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOF": { "base": 0x40021400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOG": { "base": 0x40021800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOH": { "base": 0x40021c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "I2C1": { "base": 0x40005400, @@ -142,7 +153,7 @@ stm32f412 = { "er_intn": 32, "ev_intn": 31 }, - "type": "periperal" + "type": "peripheral" }, "I2C2": { "base": 0x40005800, @@ -151,7 +162,7 @@ stm32f412 = { "er_intn": 34, "ev_intn": 33 }, - "type": "periperal" + "type": "peripheral" }, "I2C3": { "base": 0x40005c00, @@ -160,22 +171,22 @@ stm32f412 = { "er_intn": 73, "ev_intn": 72 }, - "type": "periperal" + "type": "peripheral" }, "I2S2ext": { "base": 0x40003400, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "I2S3ext": { "base": 0x40004000, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "IWDG": { "base": 0x40003000, "struct": "STM32F4xxIwdg", - "type": "periperal" + "type": "peripheral" }, "NVIC": { "base": 0xe000e100, @@ -195,13 +206,13 @@ stm32f412 = { }, "PPB": { "base": 0xe0000000, - "size": 0x10000, + "size": 0x100000, "type": "mmio" }, "PWR": { "base": 0x40007000, "struct": "STM32F4xxPwr", - "type": "periperal" + "type": "peripheral" }, "QUADSPI": { "base": 0xa0001000, @@ -209,7 +220,7 @@ stm32f412 = { "kwargs": { "intn": 92 }, - "type": "periperal" + "type": "peripheral" }, "RCC": { "base": 0x40023800, @@ -217,7 +228,7 @@ stm32f412 = { "kwargs": { "intn": 5 }, - "type": "periperal" + "type": "peripheral" }, "RNG": { "base": 0x50060800, @@ -225,7 +236,7 @@ stm32f412 = { "kwargs": { "intn": 80 }, - "type": "periperal" + "type": "peripheral" }, "RTC": { "base": 0x40002800, @@ -234,7 +245,7 @@ stm32f412 = { "alarm_intn": 41, "wkup_intn": 3 }, - "type": "periperal" + "type": "peripheral" }, "SCB": { "base": 0xe000ed00, @@ -247,7 +258,7 @@ stm32f412 = { "kwargs": { "intn": 49 }, - "type": "periperal" + "type": "peripheral" }, "SPI1": { "base": 0x40013000, @@ -255,7 +266,7 @@ stm32f412 = { "kwargs": { "intn": 35 }, - "type": "periperal" + "type": "peripheral" }, "SPI2": { "base": 0x40003800, @@ -263,7 +274,7 @@ stm32f412 = { "kwargs": { "intn": 36 }, - "type": "periperal" + "type": "peripheral" }, "SPI3": { "base": 0x40003c00, @@ -271,7 +282,7 @@ stm32f412 = { "kwargs": { "intn": 51 }, - "type": "periperal" + "type": "peripheral" }, "SPI4": { "base": 0x40013400, @@ -279,7 +290,7 @@ stm32f412 = { "kwargs": { "intn": 84 }, - "type": "periperal" + "type": "peripheral" }, "SPI5": { "base": 0x40015000, @@ -287,7 +298,7 @@ stm32f412 = { "kwargs": { "intn": 85 }, - "type": "periperal" + "type": "peripheral" }, "SRAM": { "base": 0x20000000, @@ -303,7 +314,7 @@ stm32f412 = { "SYSCFG": { "base": 0x40013800, "struct": "STM32F4xxSyscfgV2", - "type": "periperal" + "type": "peripheral" }, "SYSTEM": { "base": 0x1fff0000, @@ -324,32 +335,32 @@ stm32f412 = { "trg_com_tim11_intn": 26, "up_tim10_intn": 25 }, - "type": "periperal" + "type": "peripheral" }, "TIM10": { "base": 0x40014400, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM11": { "base": 0x40014800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM12": { "base": 0x40001800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM13": { "base": 0x40001c00, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM14": { "base": 0x40002000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM2": { "base": 0x40000000, @@ -357,7 +368,7 @@ stm32f412 = { "kwargs": { "intn": 28 }, - "type": "periperal" + "type": "peripheral" }, "TIM3": { "base": 0x40000400, @@ -365,7 +376,7 @@ stm32f412 = { "kwargs": { "intn": 29 }, - "type": "periperal" + "type": "peripheral" }, "TIM4": { "base": 0x40000800, @@ -373,7 +384,7 @@ stm32f412 = { "kwargs": { "intn": 30 }, - "type": "periperal" + "type": "peripheral" }, "TIM5": { "base": 0x40000c00, @@ -381,7 +392,7 @@ stm32f412 = { "kwargs": { "intn": 50 }, - "type": "periperal" + "type": "peripheral" }, "TIM6": { "base": 0x40001000, @@ -389,7 +400,7 @@ stm32f412 = { "kwargs": { "intn": 54 }, - "type": "periperal" + "type": "peripheral" }, "TIM7": { "base": 0x40001400, @@ -397,7 +408,7 @@ stm32f412 = { "kwargs": { "intn": 55 }, - "type": "periperal" + "type": "peripheral" }, "TIM8": { "base": 0x40010400, @@ -408,12 +419,12 @@ stm32f412 = { "trg_com_tim14_intn": 45, "up_tim13_intn": 44 }, - "type": "periperal" + "type": "peripheral" }, "TIM9": { "base": 0x40014000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "USART1": { "base": 0x40011000, @@ -421,7 +432,7 @@ stm32f412 = { "kwargs": { "intn": 37 }, - "type": "periperal" + "type": "peripheral" }, "USART2": { "base": 0x40004400, @@ -429,7 +440,7 @@ stm32f412 = { "kwargs": { "intn": 38 }, - "type": "periperal" + "type": "peripheral" }, "USART3": { "base": 0x40004800, @@ -437,7 +448,7 @@ stm32f412 = { "kwargs": { "intn": 39 }, - "type": "periperal" + "type": "peripheral" }, "USART6": { "base": 0x40011400, @@ -445,7 +456,7 @@ stm32f412 = { "kwargs": { "intn": 71 }, - "type": "periperal" + "type": "peripheral" }, "WWDG": { "base": 0x40002c00, @@ -453,6 +464,6 @@ stm32f412 = { "kwargs": { "intn": 0 }, - "type": "periperal" + "type": "peripheral" } } \ No newline at end of file diff --git a/qiling/extensions/mcu/stm32f4/stm32f413.py b/qiling/extensions/mcu/stm32f4/stm32f413.py index fd44be41..1c092091 100644 --- a/qiling/extensions/mcu/stm32f4/stm32f413.py +++ b/qiling/extensions/mcu/stm32f4/stm32f413.py @@ -7,7 +7,7 @@ stm32f413 = { "ADC1": { "base": 0x40012000, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "CAN1": { "base": 0x40006400, @@ -18,7 +18,7 @@ stm32f413 = { "sce_intn": 22, "tx_intn": 19 }, - "type": "periperal" + "type": "peripheral" }, "CAN2": { "base": 0x40006800, @@ -29,7 +29,7 @@ stm32f413 = { "sce_intn": 66, "tx_intn": 63 }, - "type": "periperal" + "type": "peripheral" }, "CAN3": { "base": 0x40006c00, @@ -40,27 +40,25 @@ stm32f413 = { "sce_intn": 77, "tx_intn": 74 }, - "type": "periperal" + "type": "peripheral" }, "CRC": { "base": 0x40023000, "struct": "STM32F4xxCrc", - "type": "periperal" - }, - "DAC": { - "base": 0x40007400, - "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DAC1": { "base": 0x40007400, "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DBGMCU": { "base": 0xe0042000, "struct": "STM32F4xxDbgmcu", - "type": "periperal" + "kwargs": { + "dev_id": 0x413, + }, + "type": "core peripheral" }, "DMA1": { "base": 0x40026000, @@ -75,7 +73,7 @@ stm32f413 = { "stream6_intn": 17, "stream7_intn": 47 }, - "type": "periperal" + "type": "peripheral" }, "DMA2": { "base": 0x40026400, @@ -90,12 +88,12 @@ stm32f413 = { "stream6_intn": 69, "stream7_intn": 70 }, - "type": "periperal" + "type": "peripheral" }, "EXTI": { "base": 0x40013c00, "struct": "STM32F4xxExti", - "type": "periperal" + "type": "peripheral" }, "FLASH": { "base": 0x8000000, @@ -107,6 +105,14 @@ stm32f413 = { "size": 0x400, "type": "memory" }, + "FLASH INTERFACE": { + "base": 0x40023c00, + "struct": "STM32F4xxFlash", + "kwargs": { + "intn": 4, + }, + "type": "peripheral" + }, "FMPI2C1": { "base": 0x40006000, "struct": "STM32F4xxFmpi2c", @@ -114,47 +120,47 @@ stm32f413 = { "er_intn": 96, "ev_intn": 95 }, - "type": "periperal" + "type": "peripheral" }, "GPIOA": { "base": 0x40020000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOB": { "base": 0x40020400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOC": { "base": 0x40020800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOD": { "base": 0x40020c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOE": { "base": 0x40021000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOF": { "base": 0x40021400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOG": { "base": 0x40021800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOH": { "base": 0x40021c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "I2C1": { "base": 0x40005400, @@ -163,7 +169,7 @@ stm32f413 = { "er_intn": 32, "ev_intn": 31 }, - "type": "periperal" + "type": "peripheral" }, "I2C2": { "base": 0x40005800, @@ -172,7 +178,7 @@ stm32f413 = { "er_intn": 34, "ev_intn": 33 }, - "type": "periperal" + "type": "peripheral" }, "I2C3": { "base": 0x40005c00, @@ -181,22 +187,22 @@ stm32f413 = { "er_intn": 73, "ev_intn": 72 }, - "type": "periperal" + "type": "peripheral" }, "I2S2ext": { "base": 0x40003400, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "I2S3ext": { "base": 0x40004000, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "IWDG": { "base": 0x40003000, "struct": "STM32F4xxIwdg", - "type": "periperal" + "type": "peripheral" }, "LPTIM1": { "base": 0x40002400, @@ -204,7 +210,7 @@ stm32f413 = { "kwargs": { "intn": 97 }, - "type": "periperal" + "type": "peripheral" }, "NVIC": { "base": 0xe000e100, @@ -224,13 +230,13 @@ stm32f413 = { }, "PPB": { "base": 0xe0000000, - "size": 0x10000, + "size": 0x100000, "type": "mmio" }, "PWR": { "base": 0x40007000, "struct": "STM32F4xxPwr", - "type": "periperal" + "type": "peripheral" }, "QUADSPI": { "base": 0xa0001000, @@ -238,7 +244,7 @@ stm32f413 = { "kwargs": { "intn": 92 }, - "type": "periperal" + "type": "peripheral" }, "RCC": { "base": 0x40023800, @@ -246,7 +252,7 @@ stm32f413 = { "kwargs": { "intn": 5 }, - "type": "periperal" + "type": "peripheral" }, "RNG": { "base": 0x50060800, @@ -254,7 +260,7 @@ stm32f413 = { "kwargs": { "intn": 80 }, - "type": "periperal" + "type": "peripheral" }, "RTC": { "base": 0x40002800, @@ -263,7 +269,7 @@ stm32f413 = { "alarm_intn": 41, "wkup_intn": 3 }, - "type": "periperal" + "type": "peripheral" }, "SAI1": { "base": 0x40015800, @@ -271,7 +277,7 @@ stm32f413 = { "kwargs": { "intn": 87 }, - "type": "periperal" + "type": "peripheral" }, "SCB": { "base": 0xe000ed00, @@ -284,7 +290,7 @@ stm32f413 = { "kwargs": { "intn": 49 }, - "type": "periperal" + "type": "peripheral" }, "SPI1": { "base": 0x40013000, @@ -292,7 +298,7 @@ stm32f413 = { "kwargs": { "intn": 35 }, - "type": "periperal" + "type": "peripheral" }, "SPI2": { "base": 0x40003800, @@ -300,7 +306,7 @@ stm32f413 = { "kwargs": { "intn": 36 }, - "type": "periperal" + "type": "peripheral" }, "SPI3": { "base": 0x40003c00, @@ -308,7 +314,7 @@ stm32f413 = { "kwargs": { "intn": 51 }, - "type": "periperal" + "type": "peripheral" }, "SPI4": { "base": 0x40013400, @@ -316,7 +322,7 @@ stm32f413 = { "kwargs": { "intn": 84 }, - "type": "periperal" + "type": "peripheral" }, "SPI5": { "base": 0x40015000, @@ -324,7 +330,7 @@ stm32f413 = { "kwargs": { "intn": 85 }, - "type": "periperal" + "type": "peripheral" }, "SRAM": { "base": 0x20000000, @@ -340,7 +346,7 @@ stm32f413 = { "SYSCFG": { "base": 0x40013800, "struct": "STM32F4xxSyscfgV1", - "type": "periperal" + "type": "peripheral" }, "SYSTEM": { "base": 0x1fff0000, @@ -361,32 +367,32 @@ stm32f413 = { "trg_com_tim11_intn": 26, "up_tim10_intn": 25 }, - "type": "periperal" + "type": "peripheral" }, "TIM10": { "base": 0x40014400, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM11": { "base": 0x40014800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM12": { "base": 0x40001800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM13": { "base": 0x40001c00, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM14": { "base": 0x40002000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM2": { "base": 0x40000000, @@ -394,7 +400,7 @@ stm32f413 = { "kwargs": { "intn": 28 }, - "type": "periperal" + "type": "peripheral" }, "TIM3": { "base": 0x40000400, @@ -402,7 +408,7 @@ stm32f413 = { "kwargs": { "intn": 29 }, - "type": "periperal" + "type": "peripheral" }, "TIM4": { "base": 0x40000800, @@ -410,7 +416,7 @@ stm32f413 = { "kwargs": { "intn": 30 }, - "type": "periperal" + "type": "peripheral" }, "TIM5": { "base": 0x40000c00, @@ -418,7 +424,7 @@ stm32f413 = { "kwargs": { "intn": 50 }, - "type": "periperal" + "type": "peripheral" }, "TIM6": { "base": 0x40001000, @@ -426,7 +432,7 @@ stm32f413 = { "kwargs": { "dac_intn": 54 }, - "type": "periperal" + "type": "peripheral" }, "TIM7": { "base": 0x40001400, @@ -434,7 +440,7 @@ stm32f413 = { "kwargs": { "intn": 55 }, - "type": "periperal" + "type": "peripheral" }, "TIM8": { "base": 0x40010400, @@ -445,12 +451,12 @@ stm32f413 = { "trg_com_tim14_intn": 45, "up_tim13_intn": 44 }, - "type": "periperal" + "type": "peripheral" }, "TIM9": { "base": 0x40014000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "UART10": { "base": 0x40011c00, @@ -458,7 +464,7 @@ stm32f413 = { "kwargs": { "intn": 89 }, - "type": "periperal" + "type": "peripheral" }, "UART4": { "base": 0x40004c00, @@ -466,7 +472,7 @@ stm32f413 = { "kwargs": { "intn": 52 }, - "type": "periperal" + "type": "peripheral" }, "UART5": { "base": 0x40005000, @@ -474,7 +480,7 @@ stm32f413 = { "kwargs": { "intn": 53 }, - "type": "periperal" + "type": "peripheral" }, "UART7": { "base": 0x40007800, @@ -482,7 +488,7 @@ stm32f413 = { "kwargs": { "intn": 82 }, - "type": "periperal" + "type": "peripheral" }, "UART8": { "base": 0x40007c00, @@ -490,7 +496,7 @@ stm32f413 = { "kwargs": { "intn": 83 }, - "type": "periperal" + "type": "peripheral" }, "UART9": { "base": 0x40011800, @@ -498,7 +504,7 @@ stm32f413 = { "kwargs": { "intn": 88 }, - "type": "periperal" + "type": "peripheral" }, "USART1": { "base": 0x40011000, @@ -506,7 +512,7 @@ stm32f413 = { "kwargs": { "intn": 37 }, - "type": "periperal" + "type": "peripheral" }, "USART2": { "base": 0x40004400, @@ -514,7 +520,7 @@ stm32f413 = { "kwargs": { "intn": 38 }, - "type": "periperal" + "type": "peripheral" }, "USART3": { "base": 0x40004800, @@ -522,7 +528,7 @@ stm32f413 = { "kwargs": { "intn": 39 }, - "type": "periperal" + "type": "peripheral" }, "USART6": { "base": 0x40011400, @@ -530,7 +536,7 @@ stm32f413 = { "kwargs": { "intn": 71 }, - "type": "periperal" + "type": "peripheral" }, "WWDG": { "base": 0x40002c00, @@ -538,6 +544,6 @@ stm32f413 = { "kwargs": { "intn": 0 }, - "type": "periperal" + "type": "peripheral" } } \ No newline at end of file diff --git a/qiling/extensions/mcu/stm32f4/stm32f415.py b/qiling/extensions/mcu/stm32f4/stm32f415.py index 2a4954ed..f068c1ee 100644 --- a/qiling/extensions/mcu/stm32f4/stm32f415.py +++ b/qiling/extensions/mcu/stm32f4/stm32f415.py @@ -7,17 +7,17 @@ stm32f415 = { "ADC1": { "base": 0x40012000, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "ADC2": { "base": 0x40012100, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "ADC3": { "base": 0x40012200, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "CAN1": { "base": 0x40006400, @@ -28,7 +28,7 @@ stm32f415 = { "sce_intn": 22, "tx_intn": 19 }, - "type": "periperal" + "type": "peripheral" }, "CAN2": { "base": 0x40006800, @@ -39,12 +39,12 @@ stm32f415 = { "sce_intn": 66, "tx_intn": 63 }, - "type": "periperal" + "type": "peripheral" }, "CRC": { "base": 0x40023000, "struct": "STM32F4xxCrc", - "type": "periperal" + "type": "peripheral" }, "CRYP": { "base": 0x50060000, @@ -52,22 +52,20 @@ stm32f415 = { "kwargs": { "intn": 79 }, - "type": "periperal" - }, - "DAC": { - "base": 0x40007400, - "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DAC1": { "base": 0x40007400, "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DBGMCU": { "base": 0xe0042000, "struct": "STM32F4xxDbgmcu", - "type": "periperal" + "kwargs": { + "dev_id": 0x413, + }, + "type": "core peripheral" }, "DMA1": { "base": 0x40026000, @@ -82,7 +80,7 @@ stm32f415 = { "stream6_intn": 17, "stream7_intn": 47 }, - "type": "periperal" + "type": "peripheral" }, "DMA2": { "base": 0x40026400, @@ -97,12 +95,12 @@ stm32f415 = { "stream6_intn": 69, "stream7_intn": 70 }, - "type": "periperal" + "type": "peripheral" }, "EXTI": { "base": 0x40013c00, "struct": "STM32F4xxExti", - "type": "periperal" + "type": "peripheral" }, "FLASH": { "base": 0x8000000, @@ -114,50 +112,58 @@ stm32f415 = { "size": 0x400, "type": "memory" }, + "FLASH INTERFACE": { + "base": 0x40023c00, + "struct": "STM32F4xxFlash", + "kwargs": { + "intn": 4, + }, + "type": "peripheral" + }, "GPIOA": { "base": 0x40020000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOB": { "base": 0x40020400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOC": { "base": 0x40020800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOD": { "base": 0x40020c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOE": { "base": 0x40021000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOF": { "base": 0x40021400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOG": { "base": 0x40021800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOH": { "base": 0x40021c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOI": { "base": 0x40022000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "HASH": { "base": 0x50060400, @@ -165,7 +171,7 @@ stm32f415 = { "kwargs": { "rng_intn": 80 }, - "type": "periperal" + "type": "peripheral" }, "I2C1": { "base": 0x40005400, @@ -174,7 +180,7 @@ stm32f415 = { "er_intn": 32, "ev_intn": 31 }, - "type": "periperal" + "type": "peripheral" }, "I2C2": { "base": 0x40005800, @@ -183,7 +189,7 @@ stm32f415 = { "er_intn": 34, "ev_intn": 33 }, - "type": "periperal" + "type": "peripheral" }, "I2C3": { "base": 0x40005c00, @@ -192,22 +198,22 @@ stm32f415 = { "er_intn": 73, "ev_intn": 72 }, - "type": "periperal" + "type": "peripheral" }, "I2S2ext": { "base": 0x40003400, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "I2S3ext": { "base": 0x40004000, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "IWDG": { "base": 0x40003000, "struct": "STM32F4xxIwdg", - "type": "periperal" + "type": "peripheral" }, "NVIC": { "base": 0xe000e100, @@ -227,13 +233,13 @@ stm32f415 = { }, "PPB": { "base": 0xe0000000, - "size": 0x10000, + "size": 0x100000, "type": "mmio" }, "PWR": { "base": 0x40007000, "struct": "STM32F4xxPwr", - "type": "periperal" + "type": "peripheral" }, "RCC": { "base": 0x40023800, @@ -241,12 +247,12 @@ stm32f415 = { "kwargs": { "intn": 5 }, - "type": "periperal" + "type": "peripheral" }, "RNG": { "base": 0x50060800, "struct": "STM32F4xxRng", - "type": "periperal" + "type": "peripheral" }, "RTC": { "base": 0x40002800, @@ -255,7 +261,7 @@ stm32f415 = { "alarm_intn": 41, "wkup_intn": 3 }, - "type": "periperal" + "type": "peripheral" }, "SCB": { "base": 0xe000ed00, @@ -268,7 +274,7 @@ stm32f415 = { "kwargs": { "intn": 49 }, - "type": "periperal" + "type": "peripheral" }, "SPI1": { "base": 0x40013000, @@ -276,7 +282,7 @@ stm32f415 = { "kwargs": { "intn": 35 }, - "type": "periperal" + "type": "peripheral" }, "SPI2": { "base": 0x40003800, @@ -284,7 +290,7 @@ stm32f415 = { "kwargs": { "intn": 36 }, - "type": "periperal" + "type": "peripheral" }, "SPI3": { "base": 0x40003c00, @@ -292,7 +298,7 @@ stm32f415 = { "kwargs": { "intn": 51 }, - "type": "periperal" + "type": "peripheral" }, "SRAM": { "base": 0x20000000, @@ -308,7 +314,7 @@ stm32f415 = { "SYSCFG": { "base": 0x40013800, "struct": "STM32F4xxSyscfg", - "type": "periperal" + "type": "peripheral" }, "SYSTEM": { "base": 0x1fff0000, @@ -329,32 +335,32 @@ stm32f415 = { "trg_com_tim11_intn": 26, "up_tim10_intn": 25 }, - "type": "periperal" + "type": "peripheral" }, "TIM10": { "base": 0x40014400, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM11": { "base": 0x40014800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM12": { "base": 0x40001800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM13": { "base": 0x40001c00, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM14": { "base": 0x40002000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM2": { "base": 0x40000000, @@ -362,7 +368,7 @@ stm32f415 = { "kwargs": { "intn": 28 }, - "type": "periperal" + "type": "peripheral" }, "TIM3": { "base": 0x40000400, @@ -370,7 +376,7 @@ stm32f415 = { "kwargs": { "intn": 29 }, - "type": "periperal" + "type": "peripheral" }, "TIM4": { "base": 0x40000800, @@ -378,7 +384,7 @@ stm32f415 = { "kwargs": { "intn": 30 }, - "type": "periperal" + "type": "peripheral" }, "TIM5": { "base": 0x40000c00, @@ -386,7 +392,7 @@ stm32f415 = { "kwargs": { "intn": 50 }, - "type": "periperal" + "type": "peripheral" }, "TIM6": { "base": 0x40001000, @@ -394,7 +400,7 @@ stm32f415 = { "kwargs": { "dac_intn": 54 }, - "type": "periperal" + "type": "peripheral" }, "TIM7": { "base": 0x40001400, @@ -402,7 +408,7 @@ stm32f415 = { "kwargs": { "intn": 55 }, - "type": "periperal" + "type": "peripheral" }, "TIM8": { "base": 0x40010400, @@ -413,12 +419,12 @@ stm32f415 = { "trg_com_tim14_intn": 45, "up_tim13_intn": 44 }, - "type": "periperal" + "type": "peripheral" }, "TIM9": { "base": 0x40014000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "UART4": { "base": 0x40004c00, @@ -426,7 +432,7 @@ stm32f415 = { "kwargs": { "intn": 52 }, - "type": "periperal" + "type": "peripheral" }, "UART5": { "base": 0x40005000, @@ -434,7 +440,7 @@ stm32f415 = { "kwargs": { "intn": 53 }, - "type": "periperal" + "type": "peripheral" }, "USART1": { "base": 0x40011000, @@ -442,7 +448,7 @@ stm32f415 = { "kwargs": { "intn": 37 }, - "type": "periperal" + "type": "peripheral" }, "USART2": { "base": 0x40004400, @@ -450,7 +456,7 @@ stm32f415 = { "kwargs": { "intn": 38 }, - "type": "periperal" + "type": "peripheral" }, "USART3": { "base": 0x40004800, @@ -458,7 +464,7 @@ stm32f415 = { "kwargs": { "intn": 39 }, - "type": "periperal" + "type": "peripheral" }, "USART6": { "base": 0x40011400, @@ -466,7 +472,7 @@ stm32f415 = { "kwargs": { "intn": 71 }, - "type": "periperal" + "type": "peripheral" }, "WWDG": { "base": 0x40002c00, @@ -474,6 +480,6 @@ stm32f415 = { "kwargs": { "intn": 0 }, - "type": "periperal" + "type": "peripheral" } } \ No newline at end of file diff --git a/qiling/extensions/mcu/stm32f4/stm32f417.py b/qiling/extensions/mcu/stm32f4/stm32f417.py index 369bbcb9..9803f2a7 100644 --- a/qiling/extensions/mcu/stm32f4/stm32f417.py +++ b/qiling/extensions/mcu/stm32f4/stm32f417.py @@ -7,17 +7,17 @@ stm32f417 = { "ADC1": { "base": 0x40012000, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "ADC2": { "base": 0x40012100, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "ADC3": { "base": 0x40012200, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "CAN1": { "base": 0x40006400, @@ -28,7 +28,7 @@ stm32f417 = { "sce_intn": 22, "tx_intn": 19 }, - "type": "periperal" + "type": "peripheral" }, "CAN2": { "base": 0x40006800, @@ -39,12 +39,12 @@ stm32f417 = { "sce_intn": 66, "tx_intn": 63 }, - "type": "periperal" + "type": "peripheral" }, "CRC": { "base": 0x40023000, "struct": "STM32F4xxCrc", - "type": "periperal" + "type": "peripheral" }, "CRYP": { "base": 0x50060000, @@ -52,22 +52,20 @@ stm32f417 = { "kwargs": { "intn": 79 }, - "type": "periperal" - }, - "DAC": { - "base": 0x40007400, - "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DAC1": { "base": 0x40007400, "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DBGMCU": { "base": 0xe0042000, "struct": "STM32F4xxDbgmcu", - "type": "periperal" + "kwargs": { + "dev_id": 0x413, + }, + "type": "core peripheral" }, "DCMI": { "base": 0x50050000, @@ -75,7 +73,7 @@ stm32f417 = { "kwargs": { "intn": 78 }, - "type": "periperal" + "type": "peripheral" }, "DMA1": { "base": 0x40026000, @@ -90,7 +88,7 @@ stm32f417 = { "stream6_intn": 17, "stream7_intn": 47 }, - "type": "periperal" + "type": "peripheral" }, "DMA2": { "base": 0x40026400, @@ -105,7 +103,7 @@ stm32f417 = { "stream6_intn": 69, "stream7_intn": 70 }, - "type": "periperal" + "type": "peripheral" }, "ETH": { "base": 0x40028000, @@ -114,12 +112,12 @@ stm32f417 = { "intn": 61, "wkup_intn": 62 }, - "type": "periperal" + "type": "peripheral" }, "EXTI": { "base": 0x40013c00, "struct": "STM32F4xxExti", - "type": "periperal" + "type": "peripheral" }, "FLASH": { "base": 0x8000000, @@ -131,50 +129,58 @@ stm32f417 = { "size": 0x400, "type": "memory" }, + "FLASH INTERFACE": { + "base": 0x40023c00, + "struct": "STM32F4xxFlash", + "kwargs": { + "intn": 4, + }, + "type": "peripheral" + }, "GPIOA": { "base": 0x40020000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOB": { "base": 0x40020400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOC": { "base": 0x40020800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOD": { "base": 0x40020c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOE": { "base": 0x40021000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOF": { "base": 0x40021400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOG": { "base": 0x40021800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOH": { "base": 0x40021c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOI": { "base": 0x40022000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "HASH": { "base": 0x50060400, @@ -182,7 +188,7 @@ stm32f417 = { "kwargs": { "rng_intn": 80 }, - "type": "periperal" + "type": "peripheral" }, "I2C1": { "base": 0x40005400, @@ -191,7 +197,7 @@ stm32f417 = { "er_intn": 32, "ev_intn": 31 }, - "type": "periperal" + "type": "peripheral" }, "I2C2": { "base": 0x40005800, @@ -200,7 +206,7 @@ stm32f417 = { "er_intn": 34, "ev_intn": 33 }, - "type": "periperal" + "type": "peripheral" }, "I2C3": { "base": 0x40005c00, @@ -209,22 +215,22 @@ stm32f417 = { "er_intn": 73, "ev_intn": 72 }, - "type": "periperal" + "type": "peripheral" }, "I2S2ext": { "base": 0x40003400, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "I2S3ext": { "base": 0x40004000, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "IWDG": { "base": 0x40003000, "struct": "STM32F4xxIwdg", - "type": "periperal" + "type": "peripheral" }, "NVIC": { "base": 0xe000e100, @@ -244,13 +250,13 @@ stm32f417 = { }, "PPB": { "base": 0xe0000000, - "size": 0x10000, + "size": 0x100000, "type": "mmio" }, "PWR": { "base": 0x40007000, "struct": "STM32F4xxPwr", - "type": "periperal" + "type": "peripheral" }, "RCC": { "base": 0x40023800, @@ -258,12 +264,12 @@ stm32f417 = { "kwargs": { "intn": 5 }, - "type": "periperal" + "type": "peripheral" }, "RNG": { "base": 0x50060800, "struct": "STM32F4xxRng", - "type": "periperal" + "type": "peripheral" }, "RTC": { "base": 0x40002800, @@ -272,7 +278,7 @@ stm32f417 = { "alarm_intn": 41, "wkup_intn": 3 }, - "type": "periperal" + "type": "peripheral" }, "SCB": { "base": 0xe000ed00, @@ -285,7 +291,7 @@ stm32f417 = { "kwargs": { "intn": 49 }, - "type": "periperal" + "type": "peripheral" }, "SPI1": { "base": 0x40013000, @@ -293,7 +299,7 @@ stm32f417 = { "kwargs": { "intn": 35 }, - "type": "periperal" + "type": "peripheral" }, "SPI2": { "base": 0x40003800, @@ -301,7 +307,7 @@ stm32f417 = { "kwargs": { "intn": 36 }, - "type": "periperal" + "type": "peripheral" }, "SPI3": { "base": 0x40003c00, @@ -309,7 +315,7 @@ stm32f417 = { "kwargs": { "intn": 51 }, - "type": "periperal" + "type": "peripheral" }, "SRAM": { "base": 0x20000000, @@ -325,7 +331,7 @@ stm32f417 = { "SYSCFG": { "base": 0x40013800, "struct": "STM32F4xxSyscfg", - "type": "periperal" + "type": "peripheral" }, "SYSTEM": { "base": 0x1fff0000, @@ -346,32 +352,32 @@ stm32f417 = { "trg_com_tim11_intn": 26, "up_tim10_intn": 25 }, - "type": "periperal" + "type": "peripheral" }, "TIM10": { "base": 0x40014400, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM11": { "base": 0x40014800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM12": { "base": 0x40001800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM13": { "base": 0x40001c00, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM14": { "base": 0x40002000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM2": { "base": 0x40000000, @@ -379,7 +385,7 @@ stm32f417 = { "kwargs": { "intn": 28 }, - "type": "periperal" + "type": "peripheral" }, "TIM3": { "base": 0x40000400, @@ -387,7 +393,7 @@ stm32f417 = { "kwargs": { "intn": 29 }, - "type": "periperal" + "type": "peripheral" }, "TIM4": { "base": 0x40000800, @@ -395,7 +401,7 @@ stm32f417 = { "kwargs": { "intn": 30 }, - "type": "periperal" + "type": "peripheral" }, "TIM5": { "base": 0x40000c00, @@ -403,7 +409,7 @@ stm32f417 = { "kwargs": { "intn": 50 }, - "type": "periperal" + "type": "peripheral" }, "TIM6": { "base": 0x40001000, @@ -411,7 +417,7 @@ stm32f417 = { "kwargs": { "dac_intn": 54 }, - "type": "periperal" + "type": "peripheral" }, "TIM7": { "base": 0x40001400, @@ -419,7 +425,7 @@ stm32f417 = { "kwargs": { "intn": 55 }, - "type": "periperal" + "type": "peripheral" }, "TIM8": { "base": 0x40010400, @@ -430,12 +436,12 @@ stm32f417 = { "trg_com_tim14_intn": 45, "up_tim13_intn": 44 }, - "type": "periperal" + "type": "peripheral" }, "TIM9": { "base": 0x40014000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "UART4": { "base": 0x40004c00, @@ -443,7 +449,7 @@ stm32f417 = { "kwargs": { "intn": 52 }, - "type": "periperal" + "type": "peripheral" }, "UART5": { "base": 0x40005000, @@ -451,7 +457,7 @@ stm32f417 = { "kwargs": { "intn": 53 }, - "type": "periperal" + "type": "peripheral" }, "USART1": { "base": 0x40011000, @@ -459,7 +465,7 @@ stm32f417 = { "kwargs": { "intn": 37 }, - "type": "periperal" + "type": "peripheral" }, "USART2": { "base": 0x40004400, @@ -467,7 +473,7 @@ stm32f417 = { "kwargs": { "intn": 38 }, - "type": "periperal" + "type": "peripheral" }, "USART3": { "base": 0x40004800, @@ -475,7 +481,7 @@ stm32f417 = { "kwargs": { "intn": 39 }, - "type": "periperal" + "type": "peripheral" }, "USART6": { "base": 0x40011400, @@ -483,7 +489,7 @@ stm32f417 = { "kwargs": { "intn": 71 }, - "type": "periperal" + "type": "peripheral" }, "WWDG": { "base": 0x40002c00, @@ -491,6 +497,6 @@ stm32f417 = { "kwargs": { "intn": 0 }, - "type": "periperal" + "type": "peripheral" } } \ No newline at end of file diff --git a/qiling/extensions/mcu/stm32f4/stm32f423.py b/qiling/extensions/mcu/stm32f4/stm32f423.py index eecdcde7..6cbd1f8c 100644 --- a/qiling/extensions/mcu/stm32f4/stm32f423.py +++ b/qiling/extensions/mcu/stm32f4/stm32f423.py @@ -7,7 +7,7 @@ stm32f423 = { "ADC1": { "base": 0x40012000, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "AES": { "base": 0x50060000, @@ -15,7 +15,7 @@ stm32f423 = { "kwargs": { "intn": 79 }, - "type": "periperal" + "type": "peripheral" }, "CAN1": { "base": 0x40006400, @@ -26,7 +26,7 @@ stm32f423 = { "sce_intn": 22, "tx_intn": 19 }, - "type": "periperal" + "type": "peripheral" }, "CAN2": { "base": 0x40006800, @@ -37,7 +37,7 @@ stm32f423 = { "sce_intn": 66, "tx_intn": 63 }, - "type": "periperal" + "type": "peripheral" }, "CAN3": { "base": 0x40006c00, @@ -48,27 +48,25 @@ stm32f423 = { "sce_intn": 77, "tx_intn": 74 }, - "type": "periperal" + "type": "peripheral" }, "CRC": { "base": 0x40023000, "struct": "STM32F4xxCrc", - "type": "periperal" - }, - "DAC": { - "base": 0x40007400, - "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DAC1": { "base": 0x40007400, "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DBGMCU": { "base": 0xe0042000, "struct": "STM32F4xxDbgmcu", - "type": "periperal" + "kwargs": { + "dev_id": 0x413, + }, + "type": "core peripheral" }, "DMA1": { "base": 0x40026000, @@ -83,7 +81,7 @@ stm32f423 = { "stream6_intn": 17, "stream7_intn": 47 }, - "type": "periperal" + "type": "peripheral" }, "DMA2": { "base": 0x40026400, @@ -98,12 +96,12 @@ stm32f423 = { "stream6_intn": 69, "stream7_intn": 70 }, - "type": "periperal" + "type": "peripheral" }, "EXTI": { "base": 0x40013c00, "struct": "STM32F4xxExti", - "type": "periperal" + "type": "peripheral" }, "FLASH": { "base": 0x8000000, @@ -115,6 +113,14 @@ stm32f423 = { "size": 0x400, "type": "memory" }, + "FLASH INTERFACE": { + "base": 0x40023c00, + "struct": "STM32F4xxFlash", + "kwargs": { + "intn": 4, + }, + "type": "peripheral" + }, "FMPI2C1": { "base": 0x40006000, "struct": "STM32F4xxFmpi2c", @@ -122,47 +128,47 @@ stm32f423 = { "er_intn": 96, "ev_intn": 95 }, - "type": "periperal" + "type": "peripheral" }, "GPIOA": { "base": 0x40020000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOB": { "base": 0x40020400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOC": { "base": 0x40020800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOD": { "base": 0x40020c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOE": { "base": 0x40021000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOF": { "base": 0x40021400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOG": { "base": 0x40021800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOH": { "base": 0x40021c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "I2C1": { "base": 0x40005400, @@ -171,7 +177,7 @@ stm32f423 = { "er_intn": 32, "ev_intn": 31 }, - "type": "periperal" + "type": "peripheral" }, "I2C2": { "base": 0x40005800, @@ -180,7 +186,7 @@ stm32f423 = { "er_intn": 34, "ev_intn": 33 }, - "type": "periperal" + "type": "peripheral" }, "I2C3": { "base": 0x40005c00, @@ -189,22 +195,22 @@ stm32f423 = { "er_intn": 73, "ev_intn": 72 }, - "type": "periperal" + "type": "peripheral" }, "I2S2ext": { "base": 0x40003400, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "I2S3ext": { "base": 0x40004000, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "IWDG": { "base": 0x40003000, "struct": "STM32F4xxIwdg", - "type": "periperal" + "type": "peripheral" }, "LPTIM1": { "base": 0x40002400, @@ -212,7 +218,7 @@ stm32f423 = { "kwargs": { "intn": 97 }, - "type": "periperal" + "type": "peripheral" }, "NVIC": { "base": 0xe000e100, @@ -232,13 +238,13 @@ stm32f423 = { }, "PPB": { "base": 0xe0000000, - "size": 0x10000, + "size": 0x100000, "type": "mmio" }, "PWR": { "base": 0x40007000, "struct": "STM32F4xxPwr", - "type": "periperal" + "type": "peripheral" }, "QUADSPI": { "base": 0xa0001000, @@ -246,7 +252,7 @@ stm32f423 = { "kwargs": { "intn": 92 }, - "type": "periperal" + "type": "peripheral" }, "RCC": { "base": 0x40023800, @@ -254,7 +260,7 @@ stm32f423 = { "kwargs": { "intn": 5 }, - "type": "periperal" + "type": "peripheral" }, "RNG": { "base": 0x50060800, @@ -262,7 +268,7 @@ stm32f423 = { "kwargs": { "intn": 80 }, - "type": "periperal" + "type": "peripheral" }, "RTC": { "base": 0x40002800, @@ -271,7 +277,7 @@ stm32f423 = { "alarm_intn": 41, "wkup_intn": 3 }, - "type": "periperal" + "type": "peripheral" }, "SAI1": { "base": 0x40015800, @@ -279,7 +285,7 @@ stm32f423 = { "kwargs": { "intn": 87 }, - "type": "periperal" + "type": "peripheral" }, "SCB": { "base": 0xe000ed00, @@ -292,7 +298,7 @@ stm32f423 = { "kwargs": { "intn": 49 }, - "type": "periperal" + "type": "peripheral" }, "SPI1": { "base": 0x40013000, @@ -300,7 +306,7 @@ stm32f423 = { "kwargs": { "intn": 35 }, - "type": "periperal" + "type": "peripheral" }, "SPI2": { "base": 0x40003800, @@ -308,7 +314,7 @@ stm32f423 = { "kwargs": { "intn": 36 }, - "type": "periperal" + "type": "peripheral" }, "SPI3": { "base": 0x40003c00, @@ -316,7 +322,7 @@ stm32f423 = { "kwargs": { "intn": 51 }, - "type": "periperal" + "type": "peripheral" }, "SPI4": { "base": 0x40013400, @@ -324,7 +330,7 @@ stm32f423 = { "kwargs": { "intn": 84 }, - "type": "periperal" + "type": "peripheral" }, "SPI5": { "base": 0x40015000, @@ -332,7 +338,7 @@ stm32f423 = { "kwargs": { "intn": 85 }, - "type": "periperal" + "type": "peripheral" }, "SRAM": { "base": 0x20000000, @@ -348,7 +354,7 @@ stm32f423 = { "SYSCFG": { "base": 0x40013800, "struct": "STM32F4xxSyscfgV1", - "type": "periperal" + "type": "peripheral" }, "SYSTEM": { "base": 0x1fff0000, @@ -369,32 +375,32 @@ stm32f423 = { "trg_com_tim11_intn": 26, "up_tim10_intn": 25 }, - "type": "periperal" + "type": "peripheral" }, "TIM10": { "base": 0x40014400, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM11": { "base": 0x40014800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM12": { "base": 0x40001800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM13": { "base": 0x40001c00, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM14": { "base": 0x40002000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM2": { "base": 0x40000000, @@ -402,7 +408,7 @@ stm32f423 = { "kwargs": { "intn": 28 }, - "type": "periperal" + "type": "peripheral" }, "TIM3": { "base": 0x40000400, @@ -410,7 +416,7 @@ stm32f423 = { "kwargs": { "intn": 29 }, - "type": "periperal" + "type": "peripheral" }, "TIM4": { "base": 0x40000800, @@ -418,7 +424,7 @@ stm32f423 = { "kwargs": { "intn": 30 }, - "type": "periperal" + "type": "peripheral" }, "TIM5": { "base": 0x40000c00, @@ -426,7 +432,7 @@ stm32f423 = { "kwargs": { "intn": 50 }, - "type": "periperal" + "type": "peripheral" }, "TIM6": { "base": 0x40001000, @@ -434,7 +440,7 @@ stm32f423 = { "kwargs": { "dac_intn": 54 }, - "type": "periperal" + "type": "peripheral" }, "TIM7": { "base": 0x40001400, @@ -442,7 +448,7 @@ stm32f423 = { "kwargs": { "intn": 55 }, - "type": "periperal" + "type": "peripheral" }, "TIM8": { "base": 0x40010400, @@ -453,12 +459,12 @@ stm32f423 = { "trg_com_tim14_intn": 45, "up_tim13_intn": 44 }, - "type": "periperal" + "type": "peripheral" }, "TIM9": { "base": 0x40014000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "UART10": { "base": 0x40011c00, @@ -466,7 +472,7 @@ stm32f423 = { "kwargs": { "intn": 89 }, - "type": "periperal" + "type": "peripheral" }, "UART4": { "base": 0x40004c00, @@ -474,7 +480,7 @@ stm32f423 = { "kwargs": { "intn": 52 }, - "type": "periperal" + "type": "peripheral" }, "UART5": { "base": 0x40005000, @@ -482,7 +488,7 @@ stm32f423 = { "kwargs": { "intn": 53 }, - "type": "periperal" + "type": "peripheral" }, "UART7": { "base": 0x40007800, @@ -490,7 +496,7 @@ stm32f423 = { "kwargs": { "intn": 82 }, - "type": "periperal" + "type": "peripheral" }, "UART8": { "base": 0x40007c00, @@ -498,7 +504,7 @@ stm32f423 = { "kwargs": { "intn": 83 }, - "type": "periperal" + "type": "peripheral" }, "UART9": { "base": 0x40011800, @@ -506,7 +512,7 @@ stm32f423 = { "kwargs": { "intn": 88 }, - "type": "periperal" + "type": "peripheral" }, "USART1": { "base": 0x40011000, @@ -514,7 +520,7 @@ stm32f423 = { "kwargs": { "intn": 37 }, - "type": "periperal" + "type": "peripheral" }, "USART2": { "base": 0x40004400, @@ -522,7 +528,7 @@ stm32f423 = { "kwargs": { "intn": 38 }, - "type": "periperal" + "type": "peripheral" }, "USART3": { "base": 0x40004800, @@ -530,7 +536,7 @@ stm32f423 = { "kwargs": { "intn": 39 }, - "type": "periperal" + "type": "peripheral" }, "USART6": { "base": 0x40011400, @@ -538,7 +544,7 @@ stm32f423 = { "kwargs": { "intn": 71 }, - "type": "periperal" + "type": "peripheral" }, "WWDG": { "base": 0x40002c00, @@ -546,6 +552,6 @@ stm32f423 = { "kwargs": { "intn": 0 }, - "type": "periperal" + "type": "peripheral" } } \ No newline at end of file diff --git a/qiling/extensions/mcu/stm32f4/stm32f427.py b/qiling/extensions/mcu/stm32f4/stm32f427.py index 0d82a28c..0cbc30e2 100644 --- a/qiling/extensions/mcu/stm32f4/stm32f427.py +++ b/qiling/extensions/mcu/stm32f4/stm32f427.py @@ -7,17 +7,17 @@ stm32f427 = { "ADC1": { "base": 0x40012000, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "ADC2": { "base": 0x40012100, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "ADC3": { "base": 0x40012200, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "CAN1": { "base": 0x40006400, @@ -28,7 +28,7 @@ stm32f427 = { "sce_intn": 22, "tx_intn": 19 }, - "type": "periperal" + "type": "peripheral" }, "CAN2": { "base": 0x40006800, @@ -39,27 +39,25 @@ stm32f427 = { "sce_intn": 66, "tx_intn": 63 }, - "type": "periperal" + "type": "peripheral" }, "CRC": { "base": 0x40023000, "struct": "STM32F4xxCrc", - "type": "periperal" - }, - "DAC": { - "base": 0x40007400, - "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DAC1": { "base": 0x40007400, "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DBGMCU": { "base": 0xe0042000, "struct": "STM32F4xxDbgmcu", - "type": "periperal" + "kwargs": { + "dev_id": 0x413, + }, + "type": "core peripheral" }, "DCMI": { "base": 0x50050000, @@ -67,7 +65,7 @@ stm32f427 = { "kwargs": { "intn": 78 }, - "type": "periperal" + "type": "peripheral" }, "DMA1": { "base": 0x40026000, @@ -82,7 +80,7 @@ stm32f427 = { "stream6_intn": 17, "stream7_intn": 47 }, - "type": "periperal" + "type": "peripheral" }, "DMA2": { "base": 0x40026400, @@ -97,7 +95,7 @@ stm32f427 = { "stream6_intn": 69, "stream7_intn": 70 }, - "type": "periperal" + "type": "peripheral" }, "DMA2D": { "base": 0x4002b000, @@ -105,7 +103,7 @@ stm32f427 = { "kwargs": { "intn": 90 }, - "type": "periperal" + "type": "peripheral" }, "ETH": { "base": 0x40028000, @@ -114,12 +112,12 @@ stm32f427 = { "intn": 61, "wkup_intn": 62 }, - "type": "periperal" + "type": "peripheral" }, "EXTI": { "base": 0x40013c00, "struct": "STM32F4xxExti", - "type": "periperal" + "type": "peripheral" }, "FLASH": { "base": 0x8000000, @@ -131,60 +129,68 @@ stm32f427 = { "size": 0x400, "type": "memory" }, + "FLASH INTERFACE": { + "base": 0x40023c00, + "struct": "STM32F4xxFlash", + "kwargs": { + "intn": 4, + }, + "type": "peripheral" + }, "GPIOA": { "base": 0x40020000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOB": { "base": 0x40020400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOC": { "base": 0x40020800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOD": { "base": 0x40020c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOE": { "base": 0x40021000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOF": { "base": 0x40021400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOG": { "base": 0x40021800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOH": { "base": 0x40021c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOI": { "base": 0x40022000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOJ": { "base": 0x40022400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOK": { "base": 0x40022800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "I2C1": { "base": 0x40005400, @@ -193,7 +199,7 @@ stm32f427 = { "er_intn": 32, "ev_intn": 31 }, - "type": "periperal" + "type": "peripheral" }, "I2C2": { "base": 0x40005800, @@ -202,7 +208,7 @@ stm32f427 = { "er_intn": 34, "ev_intn": 33 }, - "type": "periperal" + "type": "peripheral" }, "I2C3": { "base": 0x40005c00, @@ -211,22 +217,22 @@ stm32f427 = { "er_intn": 73, "ev_intn": 72 }, - "type": "periperal" + "type": "peripheral" }, "I2S2ext": { "base": 0x40003400, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "I2S3ext": { "base": 0x40004000, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "IWDG": { "base": 0x40003000, "struct": "STM32F4xxIwdg", - "type": "periperal" + "type": "peripheral" }, "NVIC": { "base": 0xe000e100, @@ -246,13 +252,13 @@ stm32f427 = { }, "PPB": { "base": 0xe0000000, - "size": 0x10000, + "size": 0x100000, "type": "mmio" }, "PWR": { "base": 0x40007000, "struct": "STM32F4xxPwr", - "type": "periperal" + "type": "peripheral" }, "RCC": { "base": 0x40023800, @@ -260,12 +266,12 @@ stm32f427 = { "kwargs": { "intn": 5 }, - "type": "periperal" + "type": "peripheral" }, "RNG": { "base": 0x50060800, "struct": "STM32F4xxRng", - "type": "periperal" + "type": "peripheral" }, "RTC": { "base": 0x40002800, @@ -274,7 +280,7 @@ stm32f427 = { "alarm_intn": 41, "wkup_intn": 3 }, - "type": "periperal" + "type": "peripheral" }, "SAI1": { "base": 0x40015800, @@ -282,7 +288,7 @@ stm32f427 = { "kwargs": { "intn": 87 }, - "type": "periperal" + "type": "peripheral" }, "SCB": { "base": 0xe000ed00, @@ -295,7 +301,7 @@ stm32f427 = { "kwargs": { "intn": 49 }, - "type": "periperal" + "type": "peripheral" }, "SPI1": { "base": 0x40013000, @@ -303,7 +309,7 @@ stm32f427 = { "kwargs": { "intn": 35 }, - "type": "periperal" + "type": "peripheral" }, "SPI2": { "base": 0x40003800, @@ -311,7 +317,7 @@ stm32f427 = { "kwargs": { "intn": 36 }, - "type": "periperal" + "type": "peripheral" }, "SPI3": { "base": 0x40003c00, @@ -319,7 +325,7 @@ stm32f427 = { "kwargs": { "intn": 51 }, - "type": "periperal" + "type": "peripheral" }, "SPI4": { "base": 0x40013400, @@ -327,7 +333,7 @@ stm32f427 = { "kwargs": { "intn": 84 }, - "type": "periperal" + "type": "peripheral" }, "SPI5": { "base": 0x40015000, @@ -335,7 +341,7 @@ stm32f427 = { "kwargs": { "intn": 85 }, - "type": "periperal" + "type": "peripheral" }, "SPI6": { "base": 0x40015400, @@ -343,7 +349,7 @@ stm32f427 = { "kwargs": { "intn": 86 }, - "type": "periperal" + "type": "peripheral" }, "SRAM": { "base": 0x20000000, @@ -359,7 +365,7 @@ stm32f427 = { "SYSCFG": { "base": 0x40013800, "struct": "STM32F4xxSyscfg", - "type": "periperal" + "type": "peripheral" }, "SYSTEM": { "base": 0x1fff0000, @@ -380,32 +386,32 @@ stm32f427 = { "trg_com_tim11_intn": 26, "up_tim10_intn": 25 }, - "type": "periperal" + "type": "peripheral" }, "TIM10": { "base": 0x40014400, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM11": { "base": 0x40014800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM12": { "base": 0x40001800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM13": { "base": 0x40001c00, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM14": { "base": 0x40002000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM2": { "base": 0x40000000, @@ -413,7 +419,7 @@ stm32f427 = { "kwargs": { "intn": 28 }, - "type": "periperal" + "type": "peripheral" }, "TIM3": { "base": 0x40000400, @@ -421,7 +427,7 @@ stm32f427 = { "kwargs": { "intn": 29 }, - "type": "periperal" + "type": "peripheral" }, "TIM4": { "base": 0x40000800, @@ -429,7 +435,7 @@ stm32f427 = { "kwargs": { "intn": 30 }, - "type": "periperal" + "type": "peripheral" }, "TIM5": { "base": 0x40000c00, @@ -437,7 +443,7 @@ stm32f427 = { "kwargs": { "intn": 50 }, - "type": "periperal" + "type": "peripheral" }, "TIM6": { "base": 0x40001000, @@ -445,7 +451,7 @@ stm32f427 = { "kwargs": { "dac_intn": 54 }, - "type": "periperal" + "type": "peripheral" }, "TIM7": { "base": 0x40001400, @@ -453,7 +459,7 @@ stm32f427 = { "kwargs": { "intn": 55 }, - "type": "periperal" + "type": "peripheral" }, "TIM8": { "base": 0x40010400, @@ -464,12 +470,12 @@ stm32f427 = { "trg_com_tim14_intn": 45, "up_tim13_intn": 44 }, - "type": "periperal" + "type": "peripheral" }, "TIM9": { "base": 0x40014000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "UART4": { "base": 0x40004c00, @@ -477,7 +483,7 @@ stm32f427 = { "kwargs": { "intn": 52 }, - "type": "periperal" + "type": "peripheral" }, "UART5": { "base": 0x40005000, @@ -485,7 +491,7 @@ stm32f427 = { "kwargs": { "intn": 53 }, - "type": "periperal" + "type": "peripheral" }, "UART7": { "base": 0x40007800, @@ -493,7 +499,7 @@ stm32f427 = { "kwargs": { "intn": 82 }, - "type": "periperal" + "type": "peripheral" }, "UART8": { "base": 0x40007c00, @@ -501,7 +507,7 @@ stm32f427 = { "kwargs": { "intn": 83 }, - "type": "periperal" + "type": "peripheral" }, "USART1": { "base": 0x40011000, @@ -509,7 +515,7 @@ stm32f427 = { "kwargs": { "intn": 37 }, - "type": "periperal" + "type": "peripheral" }, "USART2": { "base": 0x40004400, @@ -517,7 +523,7 @@ stm32f427 = { "kwargs": { "intn": 38 }, - "type": "periperal" + "type": "peripheral" }, "USART3": { "base": 0x40004800, @@ -525,7 +531,7 @@ stm32f427 = { "kwargs": { "intn": 39 }, - "type": "periperal" + "type": "peripheral" }, "USART6": { "base": 0x40011400, @@ -533,7 +539,7 @@ stm32f427 = { "kwargs": { "intn": 71 }, - "type": "periperal" + "type": "peripheral" }, "WWDG": { "base": 0x40002c00, @@ -541,6 +547,6 @@ stm32f427 = { "kwargs": { "intn": 0 }, - "type": "periperal" + "type": "peripheral" } } \ No newline at end of file diff --git a/qiling/extensions/mcu/stm32f4/stm32f429.py b/qiling/extensions/mcu/stm32f4/stm32f429.py index 84c2ed44..966683fa 100644 --- a/qiling/extensions/mcu/stm32f4/stm32f429.py +++ b/qiling/extensions/mcu/stm32f4/stm32f429.py @@ -7,17 +7,17 @@ stm32f429 = { "ADC1": { "base": 0x40012000, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "ADC2": { "base": 0x40012100, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "ADC3": { "base": 0x40012200, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "CAN1": { "base": 0x40006400, @@ -28,7 +28,7 @@ stm32f429 = { "sce_intn": 22, "tx_intn": 19 }, - "type": "periperal" + "type": "peripheral" }, "CAN2": { "base": 0x40006800, @@ -39,27 +39,25 @@ stm32f429 = { "sce_intn": 66, "tx_intn": 63 }, - "type": "periperal" + "type": "peripheral" }, "CRC": { "base": 0x40023000, "struct": "STM32F4xxCrc", - "type": "periperal" - }, - "DAC": { - "base": 0x40007400, - "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DAC1": { "base": 0x40007400, "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DBGMCU": { "base": 0xe0042000, "struct": "STM32F4xxDbgmcu", - "type": "periperal" + "kwargs": { + "dev_id": 0x413, + }, + "type": "core peripheral" }, "DCMI": { "base": 0x50050000, @@ -67,7 +65,7 @@ stm32f429 = { "kwargs": { "intn": 78 }, - "type": "periperal" + "type": "peripheral" }, "DMA1": { "base": 0x40026000, @@ -82,7 +80,7 @@ stm32f429 = { "stream6_intn": 17, "stream7_intn": 47 }, - "type": "periperal" + "type": "peripheral" }, "DMA2": { "base": 0x40026400, @@ -97,7 +95,7 @@ stm32f429 = { "stream6_intn": 69, "stream7_intn": 70 }, - "type": "periperal" + "type": "peripheral" }, "DMA2D": { "base": 0x4002b000, @@ -105,7 +103,7 @@ stm32f429 = { "kwargs": { "intn": 90 }, - "type": "periperal" + "type": "peripheral" }, "ETH": { "base": 0x40028000, @@ -114,12 +112,12 @@ stm32f429 = { "intn": 61, "wkup_intn": 62 }, - "type": "periperal" + "type": "peripheral" }, "EXTI": { "base": 0x40013c00, "struct": "STM32F4xxExti", - "type": "periperal" + "type": "peripheral" }, "FLASH": { "base": 0x8000000, @@ -131,60 +129,68 @@ stm32f429 = { "size": 0x400, "type": "memory" }, + "FLASH INTERFACE": { + "base": 0x40023c00, + "struct": "STM32F4xxFlash", + "kwargs": { + "intn": 4, + }, + "type": "peripheral" + }, "GPIOA": { "base": 0x40020000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOB": { "base": 0x40020400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOC": { "base": 0x40020800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOD": { "base": 0x40020c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOE": { "base": 0x40021000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOF": { "base": 0x40021400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOG": { "base": 0x40021800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOH": { "base": 0x40021c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOI": { "base": 0x40022000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOJ": { "base": 0x40022400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOK": { "base": 0x40022800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "I2C1": { "base": 0x40005400, @@ -193,7 +199,7 @@ stm32f429 = { "er_intn": 32, "ev_intn": 31 }, - "type": "periperal" + "type": "peripheral" }, "I2C2": { "base": 0x40005800, @@ -202,7 +208,7 @@ stm32f429 = { "er_intn": 34, "ev_intn": 33 }, - "type": "periperal" + "type": "peripheral" }, "I2C3": { "base": 0x40005c00, @@ -211,22 +217,22 @@ stm32f429 = { "er_intn": 73, "ev_intn": 72 }, - "type": "periperal" + "type": "peripheral" }, "I2S2ext": { "base": 0x40003400, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "I2S3ext": { "base": 0x40004000, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "IWDG": { "base": 0x40003000, "struct": "STM32F4xxIwdg", - "type": "periperal" + "type": "peripheral" }, "LTDC": { "base": 0x40016800, @@ -235,7 +241,7 @@ stm32f429 = { "er_intn": 89, "intn": 88 }, - "type": "periperal" + "type": "peripheral" }, "NVIC": { "base": 0xe000e100, @@ -255,13 +261,13 @@ stm32f429 = { }, "PPB": { "base": 0xe0000000, - "size": 0x10000, + "size": 0x100000, "type": "mmio" }, "PWR": { "base": 0x40007000, "struct": "STM32F4xxPwr", - "type": "periperal" + "type": "peripheral" }, "RCC": { "base": 0x40023800, @@ -269,12 +275,12 @@ stm32f429 = { "kwargs": { "intn": 5 }, - "type": "periperal" + "type": "peripheral" }, "RNG": { "base": 0x50060800, "struct": "STM32F4xxRng", - "type": "periperal" + "type": "peripheral" }, "RTC": { "base": 0x40002800, @@ -283,7 +289,7 @@ stm32f429 = { "alarm_intn": 41, "wkup_intn": 3 }, - "type": "periperal" + "type": "peripheral" }, "SAI1": { "base": 0x40015800, @@ -291,7 +297,7 @@ stm32f429 = { "kwargs": { "intn": 87 }, - "type": "periperal" + "type": "peripheral" }, "SCB": { "base": 0xe000ed00, @@ -304,7 +310,7 @@ stm32f429 = { "kwargs": { "intn": 49 }, - "type": "periperal" + "type": "peripheral" }, "SPI1": { "base": 0x40013000, @@ -312,7 +318,7 @@ stm32f429 = { "kwargs": { "intn": 35 }, - "type": "periperal" + "type": "peripheral" }, "SPI2": { "base": 0x40003800, @@ -320,7 +326,7 @@ stm32f429 = { "kwargs": { "intn": 36 }, - "type": "periperal" + "type": "peripheral" }, "SPI3": { "base": 0x40003c00, @@ -328,7 +334,7 @@ stm32f429 = { "kwargs": { "intn": 51 }, - "type": "periperal" + "type": "peripheral" }, "SPI4": { "base": 0x40013400, @@ -336,7 +342,7 @@ stm32f429 = { "kwargs": { "intn": 84 }, - "type": "periperal" + "type": "peripheral" }, "SPI5": { "base": 0x40015000, @@ -344,7 +350,7 @@ stm32f429 = { "kwargs": { "intn": 85 }, - "type": "periperal" + "type": "peripheral" }, "SPI6": { "base": 0x40015400, @@ -352,7 +358,7 @@ stm32f429 = { "kwargs": { "intn": 86 }, - "type": "periperal" + "type": "peripheral" }, "SRAM": { "base": 0x20000000, @@ -368,7 +374,7 @@ stm32f429 = { "SYSCFG": { "base": 0x40013800, "struct": "STM32F4xxSyscfg", - "type": "periperal" + "type": "peripheral" }, "SYSTEM": { "base": 0x1fff0000, @@ -389,32 +395,32 @@ stm32f429 = { "trg_com_tim11_intn": 26, "up_tim10_intn": 25 }, - "type": "periperal" + "type": "peripheral" }, "TIM10": { "base": 0x40014400, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM11": { "base": 0x40014800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM12": { "base": 0x40001800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM13": { "base": 0x40001c00, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM14": { "base": 0x40002000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM2": { "base": 0x40000000, @@ -422,7 +428,7 @@ stm32f429 = { "kwargs": { "intn": 28 }, - "type": "periperal" + "type": "peripheral" }, "TIM3": { "base": 0x40000400, @@ -430,7 +436,7 @@ stm32f429 = { "kwargs": { "intn": 29 }, - "type": "periperal" + "type": "peripheral" }, "TIM4": { "base": 0x40000800, @@ -438,7 +444,7 @@ stm32f429 = { "kwargs": { "intn": 30 }, - "type": "periperal" + "type": "peripheral" }, "TIM5": { "base": 0x40000c00, @@ -446,7 +452,7 @@ stm32f429 = { "kwargs": { "intn": 50 }, - "type": "periperal" + "type": "peripheral" }, "TIM6": { "base": 0x40001000, @@ -454,7 +460,7 @@ stm32f429 = { "kwargs": { "dac_intn": 54 }, - "type": "periperal" + "type": "peripheral" }, "TIM7": { "base": 0x40001400, @@ -462,7 +468,7 @@ stm32f429 = { "kwargs": { "intn": 55 }, - "type": "periperal" + "type": "peripheral" }, "TIM8": { "base": 0x40010400, @@ -473,12 +479,12 @@ stm32f429 = { "trg_com_tim14_intn": 45, "up_tim13_intn": 44 }, - "type": "periperal" + "type": "peripheral" }, "TIM9": { "base": 0x40014000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "UART4": { "base": 0x40004c00, @@ -486,7 +492,7 @@ stm32f429 = { "kwargs": { "intn": 52 }, - "type": "periperal" + "type": "peripheral" }, "UART5": { "base": 0x40005000, @@ -494,7 +500,7 @@ stm32f429 = { "kwargs": { "intn": 53 }, - "type": "periperal" + "type": "peripheral" }, "UART7": { "base": 0x40007800, @@ -502,7 +508,7 @@ stm32f429 = { "kwargs": { "intn": 82 }, - "type": "periperal" + "type": "peripheral" }, "UART8": { "base": 0x40007c00, @@ -510,7 +516,7 @@ stm32f429 = { "kwargs": { "intn": 83 }, - "type": "periperal" + "type": "peripheral" }, "USART1": { "base": 0x40011000, @@ -518,7 +524,7 @@ stm32f429 = { "kwargs": { "intn": 37 }, - "type": "periperal" + "type": "peripheral" }, "USART2": { "base": 0x40004400, @@ -526,7 +532,7 @@ stm32f429 = { "kwargs": { "intn": 38 }, - "type": "periperal" + "type": "peripheral" }, "USART3": { "base": 0x40004800, @@ -534,7 +540,7 @@ stm32f429 = { "kwargs": { "intn": 39 }, - "type": "periperal" + "type": "peripheral" }, "USART6": { "base": 0x40011400, @@ -542,7 +548,7 @@ stm32f429 = { "kwargs": { "intn": 71 }, - "type": "periperal" + "type": "peripheral" }, "WWDG": { "base": 0x40002c00, @@ -550,6 +556,6 @@ stm32f429 = { "kwargs": { "intn": 0 }, - "type": "periperal" + "type": "peripheral" } } \ No newline at end of file diff --git a/qiling/extensions/mcu/stm32f4/stm32f437.py b/qiling/extensions/mcu/stm32f4/stm32f437.py index 4cf5c665..c0d46148 100644 --- a/qiling/extensions/mcu/stm32f4/stm32f437.py +++ b/qiling/extensions/mcu/stm32f4/stm32f437.py @@ -7,17 +7,17 @@ stm32f437 = { "ADC1": { "base": 0x40012000, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "ADC2": { "base": 0x40012100, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "ADC3": { "base": 0x40012200, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "CAN1": { "base": 0x40006400, @@ -28,7 +28,7 @@ stm32f437 = { "sce_intn": 22, "tx_intn": 19 }, - "type": "periperal" + "type": "peripheral" }, "CAN2": { "base": 0x40006800, @@ -39,12 +39,12 @@ stm32f437 = { "sce_intn": 66, "tx_intn": 63 }, - "type": "periperal" + "type": "peripheral" }, "CRC": { "base": 0x40023000, "struct": "STM32F4xxCrc", - "type": "periperal" + "type": "peripheral" }, "CRYP": { "base": 0x50060000, @@ -52,22 +52,20 @@ stm32f437 = { "kwargs": { "intn": 79 }, - "type": "periperal" - }, - "DAC": { - "base": 0x40007400, - "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DAC1": { "base": 0x40007400, "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DBGMCU": { "base": 0xe0042000, "struct": "STM32F4xxDbgmcu", - "type": "periperal" + "kwargs": { + "dev_id": 0x413, + }, + "type": "core peripheral" }, "DCMI": { "base": 0x50050000, @@ -75,7 +73,7 @@ stm32f437 = { "kwargs": { "intn": 78 }, - "type": "periperal" + "type": "peripheral" }, "DMA1": { "base": 0x40026000, @@ -90,7 +88,7 @@ stm32f437 = { "stream6_intn": 17, "stream7_intn": 47 }, - "type": "periperal" + "type": "peripheral" }, "DMA2": { "base": 0x40026400, @@ -105,7 +103,7 @@ stm32f437 = { "stream6_intn": 69, "stream7_intn": 70 }, - "type": "periperal" + "type": "peripheral" }, "DMA2D": { "base": 0x4002b000, @@ -113,7 +111,7 @@ stm32f437 = { "kwargs": { "intn": 90 }, - "type": "periperal" + "type": "peripheral" }, "ETH": { "base": 0x40028000, @@ -122,12 +120,12 @@ stm32f437 = { "intn": 61, "wkup_intn": 62 }, - "type": "periperal" + "type": "peripheral" }, "EXTI": { "base": 0x40013c00, "struct": "STM32F4xxExti", - "type": "periperal" + "type": "peripheral" }, "FLASH": { "base": 0x8000000, @@ -139,60 +137,68 @@ stm32f437 = { "size": 0x400, "type": "memory" }, + "FLASH INTERFACE": { + "base": 0x40023c00, + "struct": "STM32F4xxFlash", + "kwargs": { + "intn": 4, + }, + "type": "peripheral" + }, "GPIOA": { "base": 0x40020000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOB": { "base": 0x40020400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOC": { "base": 0x40020800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOD": { "base": 0x40020c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOE": { "base": 0x40021000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOF": { "base": 0x40021400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOG": { "base": 0x40021800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOH": { "base": 0x40021c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOI": { "base": 0x40022000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOJ": { "base": 0x40022400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOK": { "base": 0x40022800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "HASH": { "base": 0x50060400, @@ -200,7 +206,7 @@ stm32f437 = { "kwargs": { "rng_intn": 80 }, - "type": "periperal" + "type": "peripheral" }, "I2C1": { "base": 0x40005400, @@ -209,7 +215,7 @@ stm32f437 = { "er_intn": 32, "ev_intn": 31 }, - "type": "periperal" + "type": "peripheral" }, "I2C2": { "base": 0x40005800, @@ -218,7 +224,7 @@ stm32f437 = { "er_intn": 34, "ev_intn": 33 }, - "type": "periperal" + "type": "peripheral" }, "I2C3": { "base": 0x40005c00, @@ -227,22 +233,22 @@ stm32f437 = { "er_intn": 73, "ev_intn": 72 }, - "type": "periperal" + "type": "peripheral" }, "I2S2ext": { "base": 0x40003400, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "I2S3ext": { "base": 0x40004000, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "IWDG": { "base": 0x40003000, "struct": "STM32F4xxIwdg", - "type": "periperal" + "type": "peripheral" }, "NVIC": { "base": 0xe000e100, @@ -262,13 +268,13 @@ stm32f437 = { }, "PPB": { "base": 0xe0000000, - "size": 0x10000, + "size": 0x100000, "type": "mmio" }, "PWR": { "base": 0x40007000, "struct": "STM32F4xxPwr", - "type": "periperal" + "type": "peripheral" }, "RCC": { "base": 0x40023800, @@ -276,12 +282,12 @@ stm32f437 = { "kwargs": { "intn": 5 }, - "type": "periperal" + "type": "peripheral" }, "RNG": { "base": 0x50060800, "struct": "STM32F4xxRng", - "type": "periperal" + "type": "peripheral" }, "RTC": { "base": 0x40002800, @@ -290,7 +296,7 @@ stm32f437 = { "alarm_intn": 41, "wkup_intn": 3 }, - "type": "periperal" + "type": "peripheral" }, "SAI1": { "base": 0x40015800, @@ -298,7 +304,7 @@ stm32f437 = { "kwargs": { "intn": 87 }, - "type": "periperal" + "type": "peripheral" }, "SCB": { "base": 0xe000ed00, @@ -311,7 +317,7 @@ stm32f437 = { "kwargs": { "intn": 49 }, - "type": "periperal" + "type": "peripheral" }, "SPI1": { "base": 0x40013000, @@ -319,7 +325,7 @@ stm32f437 = { "kwargs": { "intn": 35 }, - "type": "periperal" + "type": "peripheral" }, "SPI2": { "base": 0x40003800, @@ -327,7 +333,7 @@ stm32f437 = { "kwargs": { "intn": 36 }, - "type": "periperal" + "type": "peripheral" }, "SPI3": { "base": 0x40003c00, @@ -335,7 +341,7 @@ stm32f437 = { "kwargs": { "intn": 51 }, - "type": "periperal" + "type": "peripheral" }, "SPI4": { "base": 0x40013400, @@ -343,7 +349,7 @@ stm32f437 = { "kwargs": { "intn": 84 }, - "type": "periperal" + "type": "peripheral" }, "SPI5": { "base": 0x40015000, @@ -351,7 +357,7 @@ stm32f437 = { "kwargs": { "intn": 85 }, - "type": "periperal" + "type": "peripheral" }, "SPI6": { "base": 0x40015400, @@ -359,7 +365,7 @@ stm32f437 = { "kwargs": { "intn": 86 }, - "type": "periperal" + "type": "peripheral" }, "SRAM": { "base": 0x20000000, @@ -375,7 +381,7 @@ stm32f437 = { "SYSCFG": { "base": 0x40013800, "struct": "STM32F4xxSyscfg", - "type": "periperal" + "type": "peripheral" }, "SYSTEM": { "base": 0x1fff0000, @@ -396,32 +402,32 @@ stm32f437 = { "trg_com_tim11_intn": 26, "up_tim10_intn": 25 }, - "type": "periperal" + "type": "peripheral" }, "TIM10": { "base": 0x40014400, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM11": { "base": 0x40014800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM12": { "base": 0x40001800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM13": { "base": 0x40001c00, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM14": { "base": 0x40002000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM2": { "base": 0x40000000, @@ -429,7 +435,7 @@ stm32f437 = { "kwargs": { "intn": 28 }, - "type": "periperal" + "type": "peripheral" }, "TIM3": { "base": 0x40000400, @@ -437,7 +443,7 @@ stm32f437 = { "kwargs": { "intn": 29 }, - "type": "periperal" + "type": "peripheral" }, "TIM4": { "base": 0x40000800, @@ -445,7 +451,7 @@ stm32f437 = { "kwargs": { "intn": 30 }, - "type": "periperal" + "type": "peripheral" }, "TIM5": { "base": 0x40000c00, @@ -453,7 +459,7 @@ stm32f437 = { "kwargs": { "intn": 50 }, - "type": "periperal" + "type": "peripheral" }, "TIM6": { "base": 0x40001000, @@ -461,7 +467,7 @@ stm32f437 = { "kwargs": { "dac_intn": 54 }, - "type": "periperal" + "type": "peripheral" }, "TIM7": { "base": 0x40001400, @@ -469,7 +475,7 @@ stm32f437 = { "kwargs": { "intn": 55 }, - "type": "periperal" + "type": "peripheral" }, "TIM8": { "base": 0x40010400, @@ -480,12 +486,12 @@ stm32f437 = { "trg_com_tim14_intn": 45, "up_tim13_intn": 44 }, - "type": "periperal" + "type": "peripheral" }, "TIM9": { "base": 0x40014000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "UART4": { "base": 0x40004c00, @@ -493,7 +499,7 @@ stm32f437 = { "kwargs": { "intn": 52 }, - "type": "periperal" + "type": "peripheral" }, "UART5": { "base": 0x40005000, @@ -501,7 +507,7 @@ stm32f437 = { "kwargs": { "intn": 53 }, - "type": "periperal" + "type": "peripheral" }, "UART7": { "base": 0x40007800, @@ -509,7 +515,7 @@ stm32f437 = { "kwargs": { "intn": 82 }, - "type": "periperal" + "type": "peripheral" }, "UART8": { "base": 0x40007c00, @@ -517,7 +523,7 @@ stm32f437 = { "kwargs": { "intn": 83 }, - "type": "periperal" + "type": "peripheral" }, "USART1": { "base": 0x40011000, @@ -525,7 +531,7 @@ stm32f437 = { "kwargs": { "intn": 37 }, - "type": "periperal" + "type": "peripheral" }, "USART2": { "base": 0x40004400, @@ -533,7 +539,7 @@ stm32f437 = { "kwargs": { "intn": 38 }, - "type": "periperal" + "type": "peripheral" }, "USART3": { "base": 0x40004800, @@ -541,7 +547,7 @@ stm32f437 = { "kwargs": { "intn": 39 }, - "type": "periperal" + "type": "peripheral" }, "USART6": { "base": 0x40011400, @@ -549,7 +555,7 @@ stm32f437 = { "kwargs": { "intn": 71 }, - "type": "periperal" + "type": "peripheral" }, "WWDG": { "base": 0x40002c00, @@ -557,6 +563,6 @@ stm32f437 = { "kwargs": { "intn": 0 }, - "type": "periperal" + "type": "peripheral" } } \ No newline at end of file diff --git a/qiling/extensions/mcu/stm32f4/stm32f439.py b/qiling/extensions/mcu/stm32f4/stm32f439.py index bcd80ecf..de768a51 100644 --- a/qiling/extensions/mcu/stm32f4/stm32f439.py +++ b/qiling/extensions/mcu/stm32f4/stm32f439.py @@ -7,17 +7,17 @@ stm32f439 = { "ADC1": { "base": 0x40012000, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "ADC2": { "base": 0x40012100, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "ADC3": { "base": 0x40012200, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "CAN1": { "base": 0x40006400, @@ -28,7 +28,7 @@ stm32f439 = { "sce_intn": 22, "tx_intn": 19 }, - "type": "periperal" + "type": "peripheral" }, "CAN2": { "base": 0x40006800, @@ -39,12 +39,12 @@ stm32f439 = { "sce_intn": 66, "tx_intn": 63 }, - "type": "periperal" + "type": "peripheral" }, "CRC": { "base": 0x40023000, "struct": "STM32F4xxCrc", - "type": "periperal" + "type": "peripheral" }, "CRYP": { "base": 0x50060000, @@ -52,22 +52,20 @@ stm32f439 = { "kwargs": { "intn": 79 }, - "type": "periperal" - }, - "DAC": { - "base": 0x40007400, - "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DAC1": { "base": 0x40007400, "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DBGMCU": { "base": 0xe0042000, "struct": "STM32F4xxDbgmcu", - "type": "periperal" + "kwargs": { + "dev_id": 0x413, + }, + "type": "core peripheral" }, "DCMI": { "base": 0x50050000, @@ -75,7 +73,7 @@ stm32f439 = { "kwargs": { "intn": 78 }, - "type": "periperal" + "type": "peripheral" }, "DMA1": { "base": 0x40026000, @@ -90,7 +88,7 @@ stm32f439 = { "stream6_intn": 17, "stream7_intn": 47 }, - "type": "periperal" + "type": "peripheral" }, "DMA2": { "base": 0x40026400, @@ -105,7 +103,7 @@ stm32f439 = { "stream6_intn": 69, "stream7_intn": 70 }, - "type": "periperal" + "type": "peripheral" }, "DMA2D": { "base": 0x4002b000, @@ -113,7 +111,7 @@ stm32f439 = { "kwargs": { "intn": 90 }, - "type": "periperal" + "type": "peripheral" }, "ETH": { "base": 0x40028000, @@ -122,12 +120,12 @@ stm32f439 = { "intn": 61, "wkup_intn": 62 }, - "type": "periperal" + "type": "peripheral" }, "EXTI": { "base": 0x40013c00, "struct": "STM32F4xxExti", - "type": "periperal" + "type": "peripheral" }, "FLASH": { "base": 0x8000000, @@ -139,60 +137,68 @@ stm32f439 = { "size": 0x400, "type": "memory" }, + "FLASH INTERFACE": { + "base": 0x40023c00, + "struct": "STM32F4xxFlash", + "kwargs": { + "intn": 4, + }, + "type": "peripheral" + }, "GPIOA": { "base": 0x40020000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOB": { "base": 0x40020400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOC": { "base": 0x40020800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOD": { "base": 0x40020c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOE": { "base": 0x40021000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOF": { "base": 0x40021400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOG": { "base": 0x40021800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOH": { "base": 0x40021c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOI": { "base": 0x40022000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOJ": { "base": 0x40022400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOK": { "base": 0x40022800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "HASH": { "base": 0x50060400, @@ -200,7 +206,7 @@ stm32f439 = { "kwargs": { "rng_intn": 80 }, - "type": "periperal" + "type": "peripheral" }, "I2C1": { "base": 0x40005400, @@ -209,7 +215,7 @@ stm32f439 = { "er_intn": 32, "ev_intn": 31 }, - "type": "periperal" + "type": "peripheral" }, "I2C2": { "base": 0x40005800, @@ -218,7 +224,7 @@ stm32f439 = { "er_intn": 34, "ev_intn": 33 }, - "type": "periperal" + "type": "peripheral" }, "I2C3": { "base": 0x40005c00, @@ -227,22 +233,22 @@ stm32f439 = { "er_intn": 73, "ev_intn": 72 }, - "type": "periperal" + "type": "peripheral" }, "I2S2ext": { "base": 0x40003400, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "I2S3ext": { "base": 0x40004000, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "IWDG": { "base": 0x40003000, "struct": "STM32F4xxIwdg", - "type": "periperal" + "type": "peripheral" }, "LTDC": { "base": 0x40016800, @@ -251,7 +257,7 @@ stm32f439 = { "er_intn": 89, "intn": 88 }, - "type": "periperal" + "type": "peripheral" }, "NVIC": { "base": 0xe000e100, @@ -271,13 +277,13 @@ stm32f439 = { }, "PPB": { "base": 0xe0000000, - "size": 0x10000, + "size": 0x100000, "type": "mmio" }, "PWR": { "base": 0x40007000, "struct": "STM32F4xxPwr", - "type": "periperal" + "type": "peripheral" }, "RCC": { "base": 0x40023800, @@ -285,12 +291,12 @@ stm32f439 = { "kwargs": { "intn": 5 }, - "type": "periperal" + "type": "peripheral" }, "RNG": { "base": 0x50060800, "struct": "STM32F4xxRng", - "type": "periperal" + "type": "peripheral" }, "RTC": { "base": 0x40002800, @@ -299,7 +305,7 @@ stm32f439 = { "alarm_intn": 41, "wkup_intn": 3 }, - "type": "periperal" + "type": "peripheral" }, "SAI1": { "base": 0x40015800, @@ -307,7 +313,7 @@ stm32f439 = { "kwargs": { "intn": 87 }, - "type": "periperal" + "type": "peripheral" }, "SCB": { "base": 0xe000ed00, @@ -320,7 +326,7 @@ stm32f439 = { "kwargs": { "intn": 49 }, - "type": "periperal" + "type": "peripheral" }, "SPI1": { "base": 0x40013000, @@ -328,7 +334,7 @@ stm32f439 = { "kwargs": { "intn": 35 }, - "type": "periperal" + "type": "peripheral" }, "SPI2": { "base": 0x40003800, @@ -336,7 +342,7 @@ stm32f439 = { "kwargs": { "intn": 36 }, - "type": "periperal" + "type": "peripheral" }, "SPI3": { "base": 0x40003c00, @@ -344,7 +350,7 @@ stm32f439 = { "kwargs": { "intn": 51 }, - "type": "periperal" + "type": "peripheral" }, "SPI4": { "base": 0x40013400, @@ -352,7 +358,7 @@ stm32f439 = { "kwargs": { "intn": 84 }, - "type": "periperal" + "type": "peripheral" }, "SPI5": { "base": 0x40015000, @@ -360,7 +366,7 @@ stm32f439 = { "kwargs": { "intn": 85 }, - "type": "periperal" + "type": "peripheral" }, "SPI6": { "base": 0x40015400, @@ -368,7 +374,7 @@ stm32f439 = { "kwargs": { "intn": 86 }, - "type": "periperal" + "type": "peripheral" }, "SRAM": { "base": 0x20000000, @@ -384,7 +390,7 @@ stm32f439 = { "SYSCFG": { "base": 0x40013800, "struct": "STM32F4xxSyscfg", - "type": "periperal" + "type": "peripheral" }, "SYSTEM": { "base": 0x1fff0000, @@ -405,32 +411,32 @@ stm32f439 = { "trg_com_tim11_intn": 26, "up_tim10_intn": 25 }, - "type": "periperal" + "type": "peripheral" }, "TIM10": { "base": 0x40014400, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM11": { "base": 0x40014800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM12": { "base": 0x40001800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM13": { "base": 0x40001c00, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM14": { "base": 0x40002000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM2": { "base": 0x40000000, @@ -438,7 +444,7 @@ stm32f439 = { "kwargs": { "intn": 28 }, - "type": "periperal" + "type": "peripheral" }, "TIM3": { "base": 0x40000400, @@ -446,7 +452,7 @@ stm32f439 = { "kwargs": { "intn": 29 }, - "type": "periperal" + "type": "peripheral" }, "TIM4": { "base": 0x40000800, @@ -454,7 +460,7 @@ stm32f439 = { "kwargs": { "intn": 30 }, - "type": "periperal" + "type": "peripheral" }, "TIM5": { "base": 0x40000c00, @@ -462,7 +468,7 @@ stm32f439 = { "kwargs": { "intn": 50 }, - "type": "periperal" + "type": "peripheral" }, "TIM6": { "base": 0x40001000, @@ -470,7 +476,7 @@ stm32f439 = { "kwargs": { "dac_intn": 54 }, - "type": "periperal" + "type": "peripheral" }, "TIM7": { "base": 0x40001400, @@ -478,7 +484,7 @@ stm32f439 = { "kwargs": { "intn": 55 }, - "type": "periperal" + "type": "peripheral" }, "TIM8": { "base": 0x40010400, @@ -489,12 +495,12 @@ stm32f439 = { "trg_com_tim14_intn": 45, "up_tim13_intn": 44 }, - "type": "periperal" + "type": "peripheral" }, "TIM9": { "base": 0x40014000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "UART4": { "base": 0x40004c00, @@ -502,7 +508,7 @@ stm32f439 = { "kwargs": { "intn": 52 }, - "type": "periperal" + "type": "peripheral" }, "UART5": { "base": 0x40005000, @@ -510,7 +516,7 @@ stm32f439 = { "kwargs": { "intn": 53 }, - "type": "periperal" + "type": "peripheral" }, "UART7": { "base": 0x40007800, @@ -518,7 +524,7 @@ stm32f439 = { "kwargs": { "intn": 82 }, - "type": "periperal" + "type": "peripheral" }, "UART8": { "base": 0x40007c00, @@ -526,7 +532,7 @@ stm32f439 = { "kwargs": { "intn": 83 }, - "type": "periperal" + "type": "peripheral" }, "USART1": { "base": 0x40011000, @@ -534,7 +540,7 @@ stm32f439 = { "kwargs": { "intn": 37 }, - "type": "periperal" + "type": "peripheral" }, "USART2": { "base": 0x40004400, @@ -542,7 +548,7 @@ stm32f439 = { "kwargs": { "intn": 38 }, - "type": "periperal" + "type": "peripheral" }, "USART3": { "base": 0x40004800, @@ -550,7 +556,7 @@ stm32f439 = { "kwargs": { "intn": 39 }, - "type": "periperal" + "type": "peripheral" }, "USART6": { "base": 0x40011400, @@ -558,7 +564,7 @@ stm32f439 = { "kwargs": { "intn": 71 }, - "type": "periperal" + "type": "peripheral" }, "WWDG": { "base": 0x40002c00, @@ -566,6 +572,6 @@ stm32f439 = { "kwargs": { "intn": 0 }, - "type": "periperal" + "type": "peripheral" } } \ No newline at end of file diff --git a/qiling/extensions/mcu/stm32f4/stm32f446.py b/qiling/extensions/mcu/stm32f4/stm32f446.py index 9a7f6301..d5a9395f 100644 --- a/qiling/extensions/mcu/stm32f4/stm32f446.py +++ b/qiling/extensions/mcu/stm32f4/stm32f446.py @@ -7,17 +7,17 @@ stm32f446 = { "ADC1": { "base": 0x40012000, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "ADC2": { "base": 0x40012100, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "ADC3": { "base": 0x40012200, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "CAN1": { "base": 0x40006400, @@ -28,7 +28,7 @@ stm32f446 = { "sce_intn": 22, "tx_intn": 19 }, - "type": "periperal" + "type": "peripheral" }, "CAN2": { "base": 0x40006800, @@ -39,7 +39,7 @@ stm32f446 = { "sce_intn": 66, "tx_intn": 63 }, - "type": "periperal" + "type": "peripheral" }, "CEC": { "base": 0x40006c00, @@ -47,27 +47,25 @@ stm32f446 = { "kwargs": { "intn": 93 }, - "type": "periperal" + "type": "peripheral" }, "CRC": { "base": 0x40023000, "struct": "STM32F4xxCrc", - "type": "periperal" - }, - "DAC": { - "base": 0x40007400, - "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DAC1": { "base": 0x40007400, "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DBGMCU": { "base": 0xe0042000, "struct": "STM32F4xxDbgmcu", - "type": "periperal" + "kwargs": { + "dev_id": 0x413, + }, + "type": "core peripheral" }, "DCMI": { "base": 0x50050000, @@ -75,7 +73,7 @@ stm32f446 = { "kwargs": { "intn": 78 }, - "type": "periperal" + "type": "peripheral" }, "DMA1": { "base": 0x40026000, @@ -90,7 +88,7 @@ stm32f446 = { "stream6_intn": 17, "stream7_intn": 47 }, - "type": "periperal" + "type": "peripheral" }, "DMA2": { "base": 0x40026400, @@ -105,12 +103,12 @@ stm32f446 = { "stream6_intn": 69, "stream7_intn": 70 }, - "type": "periperal" + "type": "peripheral" }, "EXTI": { "base": 0x40013c00, "struct": "STM32F4xxExti", - "type": "periperal" + "type": "peripheral" }, "FLASH": { "base": 0x8000000, @@ -122,6 +120,14 @@ stm32f446 = { "size": 0x400, "type": "memory" }, + "FLASH INTERFACE": { + "base": 0x40023c00, + "struct": "STM32F4xxFlash", + "kwargs": { + "intn": 4, + }, + "type": "peripheral" + }, "FMPI2C1": { "base": 0x40006000, "struct": "STM32F4xxFmpi2c", @@ -129,47 +135,47 @@ stm32f446 = { "er_intn": 96, "ev_intn": 95 }, - "type": "periperal" + "type": "peripheral" }, "GPIOA": { "base": 0x40020000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOB": { "base": 0x40020400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOC": { "base": 0x40020800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOD": { "base": 0x40020c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOE": { "base": 0x40021000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOF": { "base": 0x40021400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOG": { "base": 0x40021800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOH": { "base": 0x40021c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "I2C1": { "base": 0x40005400, @@ -178,7 +184,7 @@ stm32f446 = { "er_intn": 32, "ev_intn": 31 }, - "type": "periperal" + "type": "peripheral" }, "I2C2": { "base": 0x40005800, @@ -187,7 +193,7 @@ stm32f446 = { "er_intn": 34, "ev_intn": 33 }, - "type": "periperal" + "type": "peripheral" }, "I2C3": { "base": 0x40005c00, @@ -196,12 +202,12 @@ stm32f446 = { "er_intn": 73, "ev_intn": 72 }, - "type": "periperal" + "type": "peripheral" }, "IWDG": { "base": 0x40003000, "struct": "STM32F4xxIwdg", - "type": "periperal" + "type": "peripheral" }, "NVIC": { "base": 0xe000e100, @@ -221,13 +227,13 @@ stm32f446 = { }, "PPB": { "base": 0xe0000000, - "size": 0x10000, + "size": 0x100000, "type": "mmio" }, "PWR": { "base": 0x40007000, "struct": "STM32F4xxPwr", - "type": "periperal" + "type": "peripheral" }, "QUADSPI": { "base": 0xa0001000, @@ -235,7 +241,7 @@ stm32f446 = { "kwargs": { "intn": 92 }, - "type": "periperal" + "type": "peripheral" }, "RCC": { "base": 0x40023800, @@ -243,7 +249,7 @@ stm32f446 = { "kwargs": { "intn": 5 }, - "type": "periperal" + "type": "peripheral" }, "RTC": { "base": 0x40002800, @@ -252,7 +258,7 @@ stm32f446 = { "alarm_intn": 41, "wkup_intn": 3 }, - "type": "periperal" + "type": "peripheral" }, "SAI1": { "base": 0x40015800, @@ -260,7 +266,7 @@ stm32f446 = { "kwargs": { "intn": 87 }, - "type": "periperal" + "type": "peripheral" }, "SAI2": { "base": 0x40015c00, @@ -268,7 +274,7 @@ stm32f446 = { "kwargs": { "intn": 91 }, - "type": "periperal" + "type": "peripheral" }, "SCB": { "base": 0xe000ed00, @@ -281,12 +287,12 @@ stm32f446 = { "kwargs": { "intn": 49 }, - "type": "periperal" + "type": "peripheral" }, "SPDIFRX": { "base": 0x40004000, "struct": "STM32F446Spdifrx", - "type": "periperal" + "type": "peripheral" }, "SPI1": { "base": 0x40013000, @@ -294,7 +300,7 @@ stm32f446 = { "kwargs": { "intn": 35 }, - "type": "periperal" + "type": "peripheral" }, "SPI2": { "base": 0x40003800, @@ -302,7 +308,7 @@ stm32f446 = { "kwargs": { "intn": 36 }, - "type": "periperal" + "type": "peripheral" }, "SPI3": { "base": 0x40003c00, @@ -310,7 +316,7 @@ stm32f446 = { "kwargs": { "intn": 51 }, - "type": "periperal" + "type": "peripheral" }, "SPI4": { "base": 0x40013400, @@ -318,7 +324,7 @@ stm32f446 = { "kwargs": { "intn": 84 }, - "type": "periperal" + "type": "peripheral" }, "SRAM": { "base": 0x20000000, @@ -334,7 +340,7 @@ stm32f446 = { "SYSCFG": { "base": 0x40013800, "struct": "STM32F446Syscfg", - "type": "periperal" + "type": "peripheral" }, "SYSTEM": { "base": 0x1fff0000, @@ -355,32 +361,32 @@ stm32f446 = { "trg_com_tim11_intn": 26, "up_tim10_intn": 25 }, - "type": "periperal" + "type": "peripheral" }, "TIM10": { "base": 0x40014400, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM11": { "base": 0x40014800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM12": { "base": 0x40001800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM13": { "base": 0x40001c00, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM14": { "base": 0x40002000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM2": { "base": 0x40000000, @@ -388,7 +394,7 @@ stm32f446 = { "kwargs": { "intn": 28 }, - "type": "periperal" + "type": "peripheral" }, "TIM3": { "base": 0x40000400, @@ -396,7 +402,7 @@ stm32f446 = { "kwargs": { "intn": 29 }, - "type": "periperal" + "type": "peripheral" }, "TIM4": { "base": 0x40000800, @@ -404,7 +410,7 @@ stm32f446 = { "kwargs": { "intn": 30 }, - "type": "periperal" + "type": "peripheral" }, "TIM5": { "base": 0x40000c00, @@ -412,7 +418,7 @@ stm32f446 = { "kwargs": { "intn": 50 }, - "type": "periperal" + "type": "peripheral" }, "TIM6": { "base": 0x40001000, @@ -420,7 +426,7 @@ stm32f446 = { "kwargs": { "dac_intn": 54 }, - "type": "periperal" + "type": "peripheral" }, "TIM7": { "base": 0x40001400, @@ -428,7 +434,7 @@ stm32f446 = { "kwargs": { "intn": 55 }, - "type": "periperal" + "type": "peripheral" }, "TIM8": { "base": 0x40010400, @@ -439,12 +445,12 @@ stm32f446 = { "trg_com_tim14_intn": 45, "up_tim13_intn": 44 }, - "type": "periperal" + "type": "peripheral" }, "TIM9": { "base": 0x40014000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "UART4": { "base": 0x40004c00, @@ -452,7 +458,7 @@ stm32f446 = { "kwargs": { "intn": 52 }, - "type": "periperal" + "type": "peripheral" }, "UART5": { "base": 0x40005000, @@ -460,7 +466,7 @@ stm32f446 = { "kwargs": { "intn": 53 }, - "type": "periperal" + "type": "peripheral" }, "USART1": { "base": 0x40011000, @@ -468,7 +474,7 @@ stm32f446 = { "kwargs": { "intn": 37 }, - "type": "periperal" + "type": "peripheral" }, "USART2": { "base": 0x40004400, @@ -476,7 +482,7 @@ stm32f446 = { "kwargs": { "intn": 38 }, - "type": "periperal" + "type": "peripheral" }, "USART3": { "base": 0x40004800, @@ -484,7 +490,7 @@ stm32f446 = { "kwargs": { "intn": 39 }, - "type": "periperal" + "type": "peripheral" }, "USART6": { "base": 0x40011400, @@ -492,7 +498,7 @@ stm32f446 = { "kwargs": { "intn": 71 }, - "type": "periperal" + "type": "peripheral" }, "WWDG": { "base": 0x40002c00, @@ -500,6 +506,6 @@ stm32f446 = { "kwargs": { "intn": 0 }, - "type": "periperal" + "type": "peripheral" } } \ No newline at end of file diff --git a/qiling/extensions/mcu/stm32f4/stm32f469.py b/qiling/extensions/mcu/stm32f4/stm32f469.py index 14588854..57668d94 100644 --- a/qiling/extensions/mcu/stm32f4/stm32f469.py +++ b/qiling/extensions/mcu/stm32f4/stm32f469.py @@ -7,17 +7,17 @@ stm32f469 = { "ADC1": { "base": 0x40012000, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "ADC2": { "base": 0x40012100, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "ADC3": { "base": 0x40012200, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "CAN1": { "base": 0x40006400, @@ -28,7 +28,7 @@ stm32f469 = { "sce_intn": 22, "tx_intn": 19 }, - "type": "periperal" + "type": "peripheral" }, "CAN2": { "base": 0x40006800, @@ -39,27 +39,25 @@ stm32f469 = { "sce_intn": 66, "tx_intn": 63 }, - "type": "periperal" + "type": "peripheral" }, "CRC": { "base": 0x40023000, "struct": "STM32F4xxCrc", - "type": "periperal" - }, - "DAC": { - "base": 0x40007400, - "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DAC1": { "base": 0x40007400, "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DBGMCU": { "base": 0xe0042000, "struct": "STM32F4xxDbgmcu", - "type": "periperal" + "kwargs": { + "dev_id": 0x413, + }, + "type": "core peripheral" }, "DCMI": { "base": 0x50050000, @@ -67,7 +65,7 @@ stm32f469 = { "kwargs": { "intn": 78 }, - "type": "periperal" + "type": "peripheral" }, "DMA1": { "base": 0x40026000, @@ -82,7 +80,7 @@ stm32f469 = { "stream6_intn": 17, "stream7_intn": 47 }, - "type": "periperal" + "type": "peripheral" }, "DMA2": { "base": 0x40026400, @@ -97,7 +95,7 @@ stm32f469 = { "stream6_intn": 69, "stream7_intn": 70 }, - "type": "periperal" + "type": "peripheral" }, "DMA2D": { "base": 0x4002b000, @@ -105,7 +103,7 @@ stm32f469 = { "kwargs": { "intn": 90 }, - "type": "periperal" + "type": "peripheral" }, "DSI": { "base": 0x40016c00, @@ -113,7 +111,7 @@ stm32f469 = { "kwargs": { "intn": 92 }, - "type": "periperal" + "type": "peripheral" }, "ETH": { "base": 0x40028000, @@ -122,12 +120,12 @@ stm32f469 = { "intn": 61, "wkup_intn": 62 }, - "type": "periperal" + "type": "peripheral" }, "EXTI": { "base": 0x40013c00, "struct": "STM32F4xxExti", - "type": "periperal" + "type": "peripheral" }, "FLASH": { "base": 0x8000000, @@ -139,60 +137,68 @@ stm32f469 = { "size": 0x400, "type": "memory" }, + "FLASH INTERFACE": { + "base": 0x40023c00, + "struct": "STM32F4xxFlash", + "kwargs": { + "intn": 4, + }, + "type": "peripheral" + }, "GPIOA": { "base": 0x40020000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOB": { "base": 0x40020400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOC": { "base": 0x40020800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOD": { "base": 0x40020c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOE": { "base": 0x40021000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOF": { "base": 0x40021400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOG": { "base": 0x40021800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOH": { "base": 0x40021c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOI": { "base": 0x40022000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOJ": { "base": 0x40022400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOK": { "base": 0x40022800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "I2C1": { "base": 0x40005400, @@ -201,7 +207,7 @@ stm32f469 = { "er_intn": 32, "ev_intn": 31 }, - "type": "periperal" + "type": "peripheral" }, "I2C2": { "base": 0x40005800, @@ -210,7 +216,7 @@ stm32f469 = { "er_intn": 34, "ev_intn": 33 }, - "type": "periperal" + "type": "peripheral" }, "I2C3": { "base": 0x40005c00, @@ -219,22 +225,22 @@ stm32f469 = { "er_intn": 73, "ev_intn": 72 }, - "type": "periperal" + "type": "peripheral" }, "I2S2ext": { "base": 0x40003400, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "I2S3ext": { "base": 0x40004000, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "IWDG": { "base": 0x40003000, "struct": "STM32F4xxIwdg", - "type": "periperal" + "type": "peripheral" }, "LTDC": { "base": 0x40016800, @@ -243,7 +249,7 @@ stm32f469 = { "er_intn": 89, "intn": 88 }, - "type": "periperal" + "type": "peripheral" }, "NVIC": { "base": 0xe000e100, @@ -263,13 +269,13 @@ stm32f469 = { }, "PPB": { "base": 0xe0000000, - "size": 0x10000, + "size": 0x100000, "type": "mmio" }, "PWR": { "base": 0x40007000, "struct": "STM32F4xxPwr", - "type": "periperal" + "type": "peripheral" }, "QUADSPI": { "base": 0xa0001000, @@ -277,7 +283,7 @@ stm32f469 = { "kwargs": { "intn": 91 }, - "type": "periperal" + "type": "peripheral" }, "RCC": { "base": 0x40023800, @@ -285,12 +291,12 @@ stm32f469 = { "kwargs": { "intn": 5 }, - "type": "periperal" + "type": "peripheral" }, "RNG": { "base": 0x50060800, "struct": "STM32F4xxRng", - "type": "periperal" + "type": "peripheral" }, "RTC": { "base": 0x40002800, @@ -299,7 +305,7 @@ stm32f469 = { "alarm_intn": 41, "wkup_intn": 3 }, - "type": "periperal" + "type": "peripheral" }, "SAI1": { "base": 0x40015800, @@ -307,7 +313,7 @@ stm32f469 = { "kwargs": { "intn": 87 }, - "type": "periperal" + "type": "peripheral" }, "SCB": { "base": 0xe000ed00, @@ -320,7 +326,7 @@ stm32f469 = { "kwargs": { "intn": 49 }, - "type": "periperal" + "type": "peripheral" }, "SPI1": { "base": 0x40013000, @@ -328,7 +334,7 @@ stm32f469 = { "kwargs": { "intn": 35 }, - "type": "periperal" + "type": "peripheral" }, "SPI2": { "base": 0x40003800, @@ -336,7 +342,7 @@ stm32f469 = { "kwargs": { "intn": 36 }, - "type": "periperal" + "type": "peripheral" }, "SPI3": { "base": 0x40003c00, @@ -344,7 +350,7 @@ stm32f469 = { "kwargs": { "intn": 51 }, - "type": "periperal" + "type": "peripheral" }, "SPI4": { "base": 0x40013400, @@ -352,7 +358,7 @@ stm32f469 = { "kwargs": { "intn": 84 }, - "type": "periperal" + "type": "peripheral" }, "SPI5": { "base": 0x40015000, @@ -360,7 +366,7 @@ stm32f469 = { "kwargs": { "intn": 85 }, - "type": "periperal" + "type": "peripheral" }, "SPI6": { "base": 0x40015400, @@ -368,7 +374,7 @@ stm32f469 = { "kwargs": { "intn": 86 }, - "type": "periperal" + "type": "peripheral" }, "SRAM": { "base": 0x20000000, @@ -384,7 +390,7 @@ stm32f469 = { "SYSCFG": { "base": 0x40013800, "struct": "STM32F4xxSyscfg", - "type": "periperal" + "type": "peripheral" }, "SYSTEM": { "base": 0x1fff0000, @@ -405,32 +411,32 @@ stm32f469 = { "trg_com_tim11_intn": 26, "up_tim10_intn": 25 }, - "type": "periperal" + "type": "peripheral" }, "TIM10": { "base": 0x40014400, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM11": { "base": 0x40014800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM12": { "base": 0x40001800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM13": { "base": 0x40001c00, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM14": { "base": 0x40002000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM2": { "base": 0x40000000, @@ -438,7 +444,7 @@ stm32f469 = { "kwargs": { "intn": 28 }, - "type": "periperal" + "type": "peripheral" }, "TIM3": { "base": 0x40000400, @@ -446,7 +452,7 @@ stm32f469 = { "kwargs": { "intn": 29 }, - "type": "periperal" + "type": "peripheral" }, "TIM4": { "base": 0x40000800, @@ -454,7 +460,7 @@ stm32f469 = { "kwargs": { "intn": 30 }, - "type": "periperal" + "type": "peripheral" }, "TIM5": { "base": 0x40000c00, @@ -462,7 +468,7 @@ stm32f469 = { "kwargs": { "intn": 50 }, - "type": "periperal" + "type": "peripheral" }, "TIM6": { "base": 0x40001000, @@ -470,7 +476,7 @@ stm32f469 = { "kwargs": { "dac_intn": 54 }, - "type": "periperal" + "type": "peripheral" }, "TIM7": { "base": 0x40001400, @@ -478,7 +484,7 @@ stm32f469 = { "kwargs": { "intn": 55 }, - "type": "periperal" + "type": "peripheral" }, "TIM8": { "base": 0x40010400, @@ -489,12 +495,12 @@ stm32f469 = { "trg_com_tim14_intn": 45, "up_tim13_intn": 44 }, - "type": "periperal" + "type": "peripheral" }, "TIM9": { "base": 0x40014000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "UART4": { "base": 0x40004c00, @@ -502,7 +508,7 @@ stm32f469 = { "kwargs": { "intn": 52 }, - "type": "periperal" + "type": "peripheral" }, "UART5": { "base": 0x40005000, @@ -510,7 +516,7 @@ stm32f469 = { "kwargs": { "intn": 53 }, - "type": "periperal" + "type": "peripheral" }, "UART7": { "base": 0x40007800, @@ -518,7 +524,7 @@ stm32f469 = { "kwargs": { "intn": 82 }, - "type": "periperal" + "type": "peripheral" }, "UART8": { "base": 0x40007c00, @@ -526,7 +532,7 @@ stm32f469 = { "kwargs": { "intn": 83 }, - "type": "periperal" + "type": "peripheral" }, "USART1": { "base": 0x40011000, @@ -534,7 +540,7 @@ stm32f469 = { "kwargs": { "intn": 37 }, - "type": "periperal" + "type": "peripheral" }, "USART2": { "base": 0x40004400, @@ -542,7 +548,7 @@ stm32f469 = { "kwargs": { "intn": 38 }, - "type": "periperal" + "type": "peripheral" }, "USART3": { "base": 0x40004800, @@ -550,7 +556,7 @@ stm32f469 = { "kwargs": { "intn": 39 }, - "type": "periperal" + "type": "peripheral" }, "USART6": { "base": 0x40011400, @@ -558,7 +564,7 @@ stm32f469 = { "kwargs": { "intn": 71 }, - "type": "periperal" + "type": "peripheral" }, "WWDG": { "base": 0x40002c00, @@ -566,6 +572,6 @@ stm32f469 = { "kwargs": { "intn": 0 }, - "type": "periperal" + "type": "peripheral" } } \ No newline at end of file diff --git a/qiling/extensions/mcu/stm32f4/stm32f479.py b/qiling/extensions/mcu/stm32f4/stm32f479.py index 52eb5216..f0bc9e29 100644 --- a/qiling/extensions/mcu/stm32f4/stm32f479.py +++ b/qiling/extensions/mcu/stm32f4/stm32f479.py @@ -7,17 +7,17 @@ stm32f479 = { "ADC1": { "base": 0x40012000, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "ADC2": { "base": 0x40012100, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "ADC3": { "base": 0x40012200, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "CAN1": { "base": 0x40006400, @@ -28,7 +28,7 @@ stm32f479 = { "sce_intn": 22, "tx_intn": 19 }, - "type": "periperal" + "type": "peripheral" }, "CAN2": { "base": 0x40006800, @@ -39,12 +39,12 @@ stm32f479 = { "sce_intn": 66, "tx_intn": 63 }, - "type": "periperal" + "type": "peripheral" }, "CRC": { "base": 0x40023000, "struct": "STM32F4xxCrc", - "type": "periperal" + "type": "peripheral" }, "CRYP": { "base": 0x50060000, @@ -52,22 +52,20 @@ stm32f479 = { "kwargs": { "intn": 79 }, - "type": "periperal" - }, - "DAC": { - "base": 0x40007400, - "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DAC1": { "base": 0x40007400, "struct": "STM32F4xxDac", - "type": "periperal" + "type": "peripheral" }, "DBGMCU": { "base": 0xe0042000, "struct": "STM32F4xxDbgmcu", - "type": "periperal" + "kwargs": { + "dev_id": 0x413, + }, + "type": "core peripheral" }, "DCMI": { "base": 0x50050000, @@ -75,7 +73,7 @@ stm32f479 = { "kwargs": { "intn": 78 }, - "type": "periperal" + "type": "peripheral" }, "DMA1": { "base": 0x40026000, @@ -90,7 +88,7 @@ stm32f479 = { "stream6_intn": 17, "stream7_intn": 47 }, - "type": "periperal" + "type": "peripheral" }, "DMA2": { "base": 0x40026400, @@ -105,7 +103,7 @@ stm32f479 = { "stream6_intn": 69, "stream7_intn": 70 }, - "type": "periperal" + "type": "peripheral" }, "DMA2D": { "base": 0x4002b000, @@ -113,7 +111,7 @@ stm32f479 = { "kwargs": { "intn": 90 }, - "type": "periperal" + "type": "peripheral" }, "DSI": { "base": 0x40016c00, @@ -121,7 +119,7 @@ stm32f479 = { "kwargs": { "intn": 92 }, - "type": "periperal" + "type": "peripheral" }, "ETH": { "base": 0x40028000, @@ -130,12 +128,12 @@ stm32f479 = { "intn": 61, "wkup_intn": 62 }, - "type": "periperal" + "type": "peripheral" }, "EXTI": { "base": 0x40013c00, "struct": "STM32F4xxExti", - "type": "periperal" + "type": "peripheral" }, "FLASH": { "base": 0x8000000, @@ -147,60 +145,68 @@ stm32f479 = { "size": 0x400, "type": "memory" }, + "FLASH INTERFACE": { + "base": 0x40023c00, + "struct": "STM32F4xxFlash", + "kwargs": { + "intn": 4, + }, + "type": "peripheral" + }, "GPIOA": { "base": 0x40020000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOB": { "base": 0x40020400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOC": { "base": 0x40020800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOD": { "base": 0x40020c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOE": { "base": 0x40021000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOF": { "base": 0x40021400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOG": { "base": 0x40021800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOH": { "base": 0x40021c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOI": { "base": 0x40022000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOJ": { "base": 0x40022400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOK": { "base": 0x40022800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "HASH": { "base": 0x50060400, @@ -208,7 +214,7 @@ stm32f479 = { "kwargs": { "rng_intn": 80 }, - "type": "periperal" + "type": "peripheral" }, "I2C1": { "base": 0x40005400, @@ -217,7 +223,7 @@ stm32f479 = { "er_intn": 32, "ev_intn": 31 }, - "type": "periperal" + "type": "peripheral" }, "I2C2": { "base": 0x40005800, @@ -226,7 +232,7 @@ stm32f479 = { "er_intn": 34, "ev_intn": 33 }, - "type": "periperal" + "type": "peripheral" }, "I2C3": { "base": 0x40005c00, @@ -235,22 +241,22 @@ stm32f479 = { "er_intn": 73, "ev_intn": 72 }, - "type": "periperal" + "type": "peripheral" }, "I2S2ext": { "base": 0x40003400, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "I2S3ext": { "base": 0x40004000, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "IWDG": { "base": 0x40003000, "struct": "STM32F4xxIwdg", - "type": "periperal" + "type": "peripheral" }, "LTDC": { "base": 0x40016800, @@ -259,7 +265,7 @@ stm32f479 = { "er_intn": 89, "intn": 88 }, - "type": "periperal" + "type": "peripheral" }, "NVIC": { "base": 0xe000e100, @@ -279,13 +285,13 @@ stm32f479 = { }, "PPB": { "base": 0xe0000000, - "size": 0x10000, + "size": 0x100000, "type": "mmio" }, "PWR": { "base": 0x40007000, "struct": "STM32F4xxPwr", - "type": "periperal" + "type": "peripheral" }, "QUADSPI": { "base": 0xa0001000, @@ -293,7 +299,7 @@ stm32f479 = { "kwargs": { "intn": 91 }, - "type": "periperal" + "type": "peripheral" }, "RCC": { "base": 0x40023800, @@ -301,12 +307,12 @@ stm32f479 = { "kwargs": { "intn": 5 }, - "type": "periperal" + "type": "peripheral" }, "RNG": { "base": 0x50060800, "struct": "STM32F4xxRng", - "type": "periperal" + "type": "peripheral" }, "RTC": { "base": 0x40002800, @@ -315,7 +321,7 @@ stm32f479 = { "alarm_intn": 41, "wkup_intn": 3 }, - "type": "periperal" + "type": "peripheral" }, "SAI1": { "base": 0x40015800, @@ -323,7 +329,7 @@ stm32f479 = { "kwargs": { "intn": 87 }, - "type": "periperal" + "type": "peripheral" }, "SCB": { "base": 0xe000ed00, @@ -336,7 +342,7 @@ stm32f479 = { "kwargs": { "intn": 49 }, - "type": "periperal" + "type": "peripheral" }, "SPI1": { "base": 0x40013000, @@ -344,7 +350,7 @@ stm32f479 = { "kwargs": { "intn": 35 }, - "type": "periperal" + "type": "peripheral" }, "SPI2": { "base": 0x40003800, @@ -352,7 +358,7 @@ stm32f479 = { "kwargs": { "intn": 36 }, - "type": "periperal" + "type": "peripheral" }, "SPI3": { "base": 0x40003c00, @@ -360,7 +366,7 @@ stm32f479 = { "kwargs": { "intn": 51 }, - "type": "periperal" + "type": "peripheral" }, "SPI4": { "base": 0x40013400, @@ -368,7 +374,7 @@ stm32f479 = { "kwargs": { "intn": 84 }, - "type": "periperal" + "type": "peripheral" }, "SPI5": { "base": 0x40015000, @@ -376,7 +382,7 @@ stm32f479 = { "kwargs": { "intn": 85 }, - "type": "periperal" + "type": "peripheral" }, "SPI6": { "base": 0x40015400, @@ -384,7 +390,7 @@ stm32f479 = { "kwargs": { "intn": 86 }, - "type": "periperal" + "type": "peripheral" }, "SRAM": { "base": 0x20000000, @@ -400,7 +406,7 @@ stm32f479 = { "SYSCFG": { "base": 0x40013800, "struct": "STM32F4xxSyscfg", - "type": "periperal" + "type": "peripheral" }, "SYSTEM": { "base": 0x1fff0000, @@ -421,32 +427,32 @@ stm32f479 = { "trg_com_tim11_intn": 26, "up_tim10_intn": 25 }, - "type": "periperal" + "type": "peripheral" }, "TIM10": { "base": 0x40014400, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM11": { "base": 0x40014800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM12": { "base": 0x40001800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM13": { "base": 0x40001c00, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM14": { "base": 0x40002000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM2": { "base": 0x40000000, @@ -454,7 +460,7 @@ stm32f479 = { "kwargs": { "intn": 28 }, - "type": "periperal" + "type": "peripheral" }, "TIM3": { "base": 0x40000400, @@ -462,7 +468,7 @@ stm32f479 = { "kwargs": { "intn": 29 }, - "type": "periperal" + "type": "peripheral" }, "TIM4": { "base": 0x40000800, @@ -470,7 +476,7 @@ stm32f479 = { "kwargs": { "intn": 30 }, - "type": "periperal" + "type": "peripheral" }, "TIM5": { "base": 0x40000c00, @@ -478,7 +484,7 @@ stm32f479 = { "kwargs": { "intn": 50 }, - "type": "periperal" + "type": "peripheral" }, "TIM6": { "base": 0x40001000, @@ -486,7 +492,7 @@ stm32f479 = { "kwargs": { "dac_intn": 54 }, - "type": "periperal" + "type": "peripheral" }, "TIM7": { "base": 0x40001400, @@ -494,7 +500,7 @@ stm32f479 = { "kwargs": { "intn": 55 }, - "type": "periperal" + "type": "peripheral" }, "TIM8": { "base": 0x40010400, @@ -505,12 +511,12 @@ stm32f479 = { "trg_com_tim14_intn": 45, "up_tim13_intn": 44 }, - "type": "periperal" + "type": "peripheral" }, "TIM9": { "base": 0x40014000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "UART4": { "base": 0x40004c00, @@ -518,7 +524,7 @@ stm32f479 = { "kwargs": { "intn": 52 }, - "type": "periperal" + "type": "peripheral" }, "UART5": { "base": 0x40005000, @@ -526,7 +532,7 @@ stm32f479 = { "kwargs": { "intn": 53 }, - "type": "periperal" + "type": "peripheral" }, "UART7": { "base": 0x40007800, @@ -534,7 +540,7 @@ stm32f479 = { "kwargs": { "intn": 82 }, - "type": "periperal" + "type": "peripheral" }, "UART8": { "base": 0x40007c00, @@ -542,7 +548,7 @@ stm32f479 = { "kwargs": { "intn": 83 }, - "type": "periperal" + "type": "peripheral" }, "USART1": { "base": 0x40011000, @@ -550,7 +556,7 @@ stm32f479 = { "kwargs": { "intn": 37 }, - "type": "periperal" + "type": "peripheral" }, "USART2": { "base": 0x40004400, @@ -558,7 +564,7 @@ stm32f479 = { "kwargs": { "intn": 38 }, - "type": "periperal" + "type": "peripheral" }, "USART3": { "base": 0x40004800, @@ -566,7 +572,7 @@ stm32f479 = { "kwargs": { "intn": 39 }, - "type": "periperal" + "type": "peripheral" }, "USART6": { "base": 0x40011400, @@ -574,7 +580,7 @@ stm32f479 = { "kwargs": { "intn": 71 }, - "type": "periperal" + "type": "peripheral" }, "WWDG": { "base": 0x40002c00, @@ -582,6 +588,6 @@ stm32f479 = { "kwargs": { "intn": 0 }, - "type": "periperal" + "type": "peripheral" } } \ No newline at end of file diff --git a/qiling/hw/gpio/gd32vf1xx_gpio.py b/qiling/hw/gpio/gd32vf1xx_gpio.py index ef086dff..45057f5b 100644 --- a/qiling/hw/gpio/gd32vf1xx_gpio.py +++ b/qiling/hw/gpio/gd32vf1xx_gpio.py @@ -77,13 +77,13 @@ class GD32VF1xxGpio(QlPeripheral, GpioHooks): self.ql.log.debug(f'[{self.label}] Set P{self.label[-1].upper()}{i}') self.gpio.OCTL |= 1 << i - self.hook_set_func[i]() + self.call_hook_set(i) def reset_pin(self, i): self.ql.log.debug(f'[{self.label}] Reset P{self.label[-1].upper()}{i}') self.gpio.OCTL &= ~(1 << i) - self.hook_reset_func[i]() + self.call_hook_reset(i) def pin(self, index): return (self.gpio.OCTL >> index) & 1 \ No newline at end of file diff --git a/qiling/hw/gpio/hooks.py b/qiling/hw/gpio/hooks.py index ea877f6f..f1695bee 100644 --- a/qiling/hw/gpio/hooks.py +++ b/qiling/hw/gpio/hooks.py @@ -7,17 +7,27 @@ class GpioHooks: def __init__(self, ql, pin_num): self.ql = ql - self.hook_set_func = [lambda: ...] * pin_num - self.hook_reset_func = [lambda: ...] * pin_num + self.hook_set_func = [None] * pin_num + self.hook_reset_func = [None] * pin_num - def hook_set(self, pin, func): - self.hook_set_func[pin] = func + def hook_set(self, pin, func, *args, **kwargs): + self.hook_set_func[pin] = (func, args, kwargs) - def hook_reset(self, pin, func): - self.hook_reset_func[pin] = func + def hook_reset(self, pin, func, *args, **kwargs): + self.hook_reset_func[pin] = (func, args, kwargs) def hook_del_set(self, pin): - self.hook_set_func[pin] = lambda: ... + self.hook_set_func[pin] = None def hook_del_reset(self, pin): - self.hook_reset_func[pin] = lambda: ... + self.hook_reset_func[pin] = None + + def call_hook_set(self, pin): + if self.hook_set_func[pin]: + func, args, kwargs = self.hook_set_func[pin] + func(*args, **kwargs) + + def call_hook_reset(self, pin): + if self.hook_reset_func[pin]: + func, args, kwargs = self.hook_reset_func[pin] + func(*args, **kwargs) \ No newline at end of file diff --git a/qiling/hw/gpio/stm32f4xx_gpio.py b/qiling/hw/gpio/stm32f4xx_gpio.py index 52ef372c..89ad20de 100644 --- a/qiling/hw/gpio/stm32f4xx_gpio.py +++ b/qiling/hw/gpio/stm32f4xx_gpio.py @@ -109,13 +109,13 @@ class STM32F4xxGpio(QlPeripheral, GpioHooks): self.ql.log.debug(f'[{self.label}] Set P{self.label[-1].upper()}{i}') self.gpio.ODR |= 1 << i - self.hook_set_func[i]() + self.call_hook_set(i) def reset_pin(self, i): self.ql.log.debug(f'[{self.label}] Reset P{self.label[-1].upper()}{i}') self.gpio.ODR &= ~(1 << i) - self.hook_reset_func[i]() + self.call_hook_reset(i) def pin(self, index): return (self.gpio.ODR >> index) & 1 diff --git a/qiling/hw/math/stm32f4xx_crc.py b/qiling/hw/math/stm32f4xx_crc.py index 7e90a199..bfe13688 100644 --- a/qiling/hw/math/stm32f4xx_crc.py +++ b/qiling/hw/math/stm32f4xx_crc.py @@ -8,8 +8,8 @@ from qiling.hw.peripheral import QlPeripheral class STM32F4xxCrc(QlPeripheral): - class Type(ctypes.Structure): - """ the structure available in : + class Type(ctypes.Structure): + """ the structure available in : stm32f413xx.h stm32f407xx.h stm32f469xx.h @@ -35,10 +35,41 @@ class STM32F4xxCrc(QlPeripheral): stm32f411xe.h """ - _fields_ = [ + _fields_ = [ ('DR' , ctypes.c_uint32), # CRC Data register, Address offset: 0x00 ('IDR' , ctypes.c_uint8), # CRC Independent data register, Address offset: 0x04 ('RESERVED0', ctypes.c_uint8), # Reserved, 0x05 ('RESERVED1', ctypes.c_uint8), # Reserved, 0x06 ('CR' , ctypes.c_uint32), # CRC Control register, Address offset: 0x08 - ] + ] + + def __init__(self, ql, label): + super().__init__(ql, label) + + self.crc = self.struct( + DR = 0xffffffff, + ) + + @QlPeripheral.monitor() + def read(self, offset: int, size: int) -> int: + buf = ctypes.create_string_buffer(size) + ctypes.memmove(buf, ctypes.addressof(self.crc) + offset, size) + return int.from_bytes(buf.raw, byteorder='little') + + @QlPeripheral.monitor() + def write(self, offset: int, size: int, value: int): + if offset == self.struct.CR.offset: + if value & 1: # RESET bit + self.crc.DR = 0xffffffff + return + + elif offset == self.struct.DR.offset: + for i in range(31, -1, -1): + if self.crc.DR & 0x80000000: + self.crc.DR <<= 1 + self.crc.DR ^= 0x04c11db7 + else: + self.crc.DR <<= 1 + + if value & (1 << i): + self.crc.DR ^= 0x04c11db7 diff --git a/qiling/hw/misc/__init__.py b/qiling/hw/misc/__init__.py index 6447d87b..9a290150 100644 --- a/qiling/hw/misc/__init__.py +++ b/qiling/hw/misc/__init__.py @@ -12,4 +12,5 @@ from .stm32f4xx_rcc_derive import ( ) from .stm32f4xx_syscfg import STM32F4xxSyscfg from .stm32f4xx_flash import STM32F4xxFlash +from .stm32f4xx_dbg import STM32F4xxDbgmcu from .gd32vf1xx_rcu import GD32VF1xxRcu diff --git a/qiling/hw/misc/stm32f4xx_dbg.py b/qiling/hw/misc/stm32f4xx_dbg.py new file mode 100644 index 00000000..e17217e0 --- /dev/null +++ b/qiling/hw/misc/stm32f4xx_dbg.py @@ -0,0 +1,63 @@ +#!/usr/bin/env python3 +# +# Cross Platform and Multi Architecture Advanced Binary Emulation Framework +# + +import ctypes + +from qiling.core import Qiling +from qiling.hw.peripheral import QlPeripheral + + +class STM32F4xxDbgmcu(QlPeripheral): + class Type(ctypes.Structure): + """ the structure available in : + stm32f401xc + stm32f401xe + stm32f405xx + stm32f407xx + stm32f410cx + stm32f410rx + stm32f410tx + stm32f411xe + stm32f412cx + stm32f412rx + stm32f412vx + stm32f412zx + stm32f413xx + stm32f415xx + stm32f417xx + stm32f423xx + stm32f427xx + stm32f429xx + stm32f437xx + stm32f439xx + stm32f446xx + stm32f469xx + stm32f479xx + """ + + _fields_ = [ + ("IDCODE", ctypes.c_uint32), #MCU device ID code, Address offset: 0x00 + ("CR" , ctypes.c_uint32), #Debug MCU configuration register, Address offset: 0x04 + ("APB1FZ", ctypes.c_uint32), #Debug MCU APB1 freeze register, Address offset: 0x08 + ("APB2FZ", ctypes.c_uint32), #Debug MCU APB2 freeze register, Address offset: 0x0C + ] + + def __init__(self, ql: Qiling, label: str, dev_id: int = 0x400): + super().__init__(ql, label) + + self.dbg = self.struct( + IDCODE = dev_id, + ) + + @QlPeripheral.monitor() + def read(self, offset: int, size: int) -> int: + buf = ctypes.create_string_buffer(size) + ctypes.memmove(buf, ctypes.addressof(self.dbg) + offset, size) + return int.from_bytes(buf.raw, byteorder='little') + + @QlPeripheral.monitor() + def write(self, offset: int, size: int, value: int): + data = (value).to_bytes(size, 'little') + ctypes.memmove(ctypes.addressof(self.dbg) + offset, data, size) diff --git a/tests/profiles/stm32f411.yml b/tests/profiles/stm32f411.yml index acd3fc28..10a303a4 100644 --- a/tests/profiles/stm32f411.yml +++ b/tests/profiles/stm32f411.yml @@ -2,17 +2,20 @@ "ADC1": { "base": 0x40012000, "struct": "STM32F4xxAdc", - "type": "periperal" + "type": "peripheral" }, "CRC": { "base": 0x40023000, "struct": "STM32F4xxCrc", - "type": "periperal" + "type": "peripheral" }, "DBGMCU": { "base": 0xe0042000, "struct": "STM32F4xxDbgmcu", - "type": "periperal" + "kwargs": { + "dev_id": 0x413, + }, + "type": "core peripheral" }, "DMA1": { "base": 0x40026000, @@ -27,7 +30,7 @@ "stream6_intn": 17, "stream7_intn": 47 }, - "type": "periperal" + "type": "peripheral" }, "DMA2": { "base": 0x40026400, @@ -42,12 +45,12 @@ "stream6_intn": 69, "stream7_intn": 70 }, - "type": "periperal" + "type": "peripheral" }, "EXTI": { "base": 0x40013c00, "struct": "STM32F4xxExti", - "type": "periperal" + "type": "peripheral" }, "FLASH": { "base": 0x8000000, @@ -62,32 +65,32 @@ "GPIOA": { "base": 0x40020000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOB": { "base": 0x40020400, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOC": { "base": 0x40020800, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOD": { "base": 0x40020c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOE": { "base": 0x40021000, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "GPIOH": { "base": 0x40021c00, "struct": "STM32F4xxGpio", - "type": "periperal" + "type": "peripheral" }, "I2C1": { "base": 0x40005400, @@ -96,7 +99,7 @@ "er_intn": 32, "ev_intn": 31 }, - "type": "periperal" + "type": "peripheral" }, "I2C2": { "base": 0x40005800, @@ -105,7 +108,7 @@ "er_intn": 34, "ev_intn": 33 }, - "type": "periperal" + "type": "peripheral" }, "I2C3": { "base": 0x40005c00, @@ -114,22 +117,22 @@ "er_intn": 73, "ev_intn": 72 }, - "type": "periperal" + "type": "peripheral" }, "I2S2ext": { "base": 0x40003400, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "I2S3ext": { "base": 0x40004000, "struct": "STM32F4xxSpi", - "type": "periperal" + "type": "peripheral" }, "IWDG": { "base": 0x40003000, "struct": "STM32F4xxIwdg", - "type": "periperal" + "type": "peripheral" }, "NVIC": { "base": 0xe000e100, @@ -155,7 +158,7 @@ "PWR": { "base": 0x40007000, "struct": "STM32F4xxPwr", - "type": "periperal" + "type": "peripheral" }, "RCC": { "base": 0x40023800, @@ -163,7 +166,7 @@ "kwargs": { "intn": 5 }, - "type": "periperal" + "type": "peripheral" }, "RTC": { "base": 0x40002800, @@ -172,7 +175,7 @@ "alarm_intn": 41, "wkup_intn": 3 }, - "type": "periperal" + "type": "peripheral" }, "SCB": { "base": 0xe000ed00, @@ -185,7 +188,7 @@ "kwargs": { "intn": 49 }, - "type": "periperal" + "type": "peripheral" }, "SPI1": { "base": 0x40013000, @@ -193,7 +196,7 @@ "kwargs": { "intn": 35 }, - "type": "periperal" + "type": "peripheral" }, "SPI2": { "base": 0x40003800, @@ -201,7 +204,7 @@ "kwargs": { "intn": 36 }, - "type": "periperal" + "type": "peripheral" }, "SPI3": { "base": 0x40003c00, @@ -209,7 +212,7 @@ "kwargs": { "intn": 51 }, - "type": "periperal" + "type": "peripheral" }, "SPI4": { "base": 0x40013400, @@ -217,7 +220,7 @@ "kwargs": { "intn": 84 }, - "type": "periperal" + "type": "peripheral" }, "SPI5": { "base": 0x40015000, @@ -225,7 +228,7 @@ "kwargs": { "intn": 85 }, - "type": "periperal" + "type": "peripheral" }, "SRAM": { "base": 0x20000000, @@ -241,7 +244,7 @@ "SYSCFG": { "base": 0x40013800, "struct": "STM32F4xxSyscfg", - "type": "periperal" + "type": "peripheral" }, "SYSTEM": { "base": 0x1fff0000, @@ -262,17 +265,17 @@ "trg_com_tim11_intn": 26, "up_tim10_intn": 25 }, - "type": "periperal" + "type": "peripheral" }, "TIM10": { "base": 0x40014400, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM11": { "base": 0x40014800, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "TIM2": { "base": 0x40000000, @@ -280,7 +283,7 @@ "kwargs": { "intn": 28 }, - "type": "periperal" + "type": "peripheral" }, "TIM3": { "base": 0x40000400, @@ -288,7 +291,7 @@ "kwargs": { "intn": 29 }, - "type": "periperal" + "type": "peripheral" }, "TIM4": { "base": 0x40000800, @@ -296,7 +299,7 @@ "kwargs": { "intn": 30 }, - "type": "periperal" + "type": "peripheral" }, "TIM5": { "base": 0x40000c00, @@ -304,12 +307,12 @@ "kwargs": { "intn": 50 }, - "type": "periperal" + "type": "peripheral" }, "TIM9": { "base": 0x40014000, "struct": "STM32F4xxTim", - "type": "periperal" + "type": "peripheral" }, "USART1": { "base": 0x40011000, @@ -317,7 +320,7 @@ "kwargs": { "intn": 37 }, - "type": "periperal" + "type": "peripheral" }, "USART2": { "base": 0x40004400, @@ -325,7 +328,7 @@ "kwargs": { "intn": 38 }, - "type": "periperal" + "type": "peripheral" }, "USART6": { "base": 0x40011400, @@ -333,7 +336,7 @@ "kwargs": { "intn": 71 }, - "type": "periperal" + "type": "peripheral" }, "WWDG": { "base": 0x40002c00, @@ -341,6 +344,6 @@ "kwargs": { "intn": 0 }, - "type": "periperal" + "type": "peripheral" } } \ No newline at end of file diff --git a/tests/test_mcu.py b/tests/test_mcu.py index c3d2f3c8..01e7bec0 100644 --- a/tests/test_mcu.py +++ b/tests/test_mcu.py @@ -319,6 +319,34 @@ class MCUTest(unittest.TestCase): del ql + def test_mcu_crc_stm32f407(self): + ql = Qiling(["../examples/rootfs/mcu/stm32f407/ai-sine-test.elf"], + archtype="cortex_m", env=stm32f407, verbose=QL_VERBOSE.DEFAULT) + + ql.hw.create('rcc') + ql.hw.create('pwr') + ql.hw.create('flash interface') + ql.hw.create('gpioa') + ql.hw.create('gpiob') + ql.hw.create('gpiod') + ql.hw.create('spi1') + ql.hw.create('crc') + + flag = False + def indicator(ql): + nonlocal flag + ql.log.info('PA7 set') + flag = True + + ql.hw.gpioa.hook_set(7, indicator, ql) + ql.hw.systick.ratio = 1000 + + ql.run(count=600000) + self.assertTrue(flag) + + del ql + + if __name__ == "__main__": unittest.main()