syzkaller/pkg/ifuzz/insns.go
2017-06-03 10:41:09 +02:00

2176 lines
823 KiB
Go

// AUTOGENERATED FILE
package ifuzz
var Insns = []*Insn{
&Insn{Name: "FADD", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: true, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FMUL", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: true, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FCOMP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: true, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FSUB", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: true, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FSUBR", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: true, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FDIV", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: true, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FDIVR", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: true, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FADD", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FMUL", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FCOM", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: true, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FCOM", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FCOM", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FCOMP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FCOMP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FCOMP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xde}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FSUB", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FSUBR", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FDIV", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FDIVR", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FLD", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: true, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FST", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: true, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FSTP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: true, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FSTP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FSTP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FSTP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FSTP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FSTPNCE", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FLDENV", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FLDCW", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: true, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FNSTENV", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FNSTCW", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: true, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FLD", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FXCH", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FXCH", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FXCH", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FNOP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 2, Rm: 0, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FCHS", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 4, Rm: 0, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FABS", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 4, Rm: 1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FTST", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 4, Rm: 4, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FXAM", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 4, Rm: 5, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FLD1", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 5, Rm: 0, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FLDL2T", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 5, Rm: 1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FLDL2E", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 5, Rm: 2, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FLDPI", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 5, Rm: 3, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FLDLG2", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 5, Rm: 4, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FLDLN2", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 5, Rm: 5, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FLDZ", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 5, Rm: 6, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "F2XM1", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: 0, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FYL2X", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: 1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FPTAN", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: 2, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FPATAN", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: 3, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FXTRACT", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: 4, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FPREM1", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: 5, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FDECSTP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: 6, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FINCSTP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: 7, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FPREM", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 7, Rm: 0, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FYL2XP1", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 7, Rm: 1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FSQRT", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 7, Rm: 2, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FSINCOS", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 7, Rm: 3, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FRNDINT", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 7, Rm: 4, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FSCALE", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 7, Rm: 5, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FSIN", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 7, Rm: 6, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FCOS", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 7, Rm: 7, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FIADD", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xda}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: true, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FIMUL", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xda}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: true, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FICOM", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xda}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: true, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FICOMP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xda}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: true, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FISUB", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xda}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: true, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FISUBR", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xda}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: true, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FIDIV", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xda}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: true, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FIDIVR", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xda}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: true, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FCMOVB", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xda}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FCMOVE", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xda}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FCMOVBE", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xda}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FCMOVU", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xda}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FUCOMPP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xda}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 5, Rm: 1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FILD", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: true, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FISTTP", Extension: "SSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: true, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FIST", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: true, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FISTP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: true, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FLD", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FCMOVNB", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FCMOVNE", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FCMOVNBE", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FCMOVNU", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FNCLEX", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 4, Rm: 2, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FNINIT", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 4, Rm: 3, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FSETPM287_NOP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 4, Rm: 4, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FENI8087_NOP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 4, Rm: 0, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FDISI8087_NOP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 4, Rm: 1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FUCOMI", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FCOMI", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FADD", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FMUL", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FSUB", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FSUBR", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FDIV", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FDIVR", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FSUBR", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FSUB", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FDIVR", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FDIV", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FLD", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FISTTP", Extension: "SSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FST", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FRSTOR", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FNSAVE", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FNSTSW", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: true, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FFREE", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FUCOM", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FUCOMP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FIADD", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xde}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: true, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FIMUL", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xde}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: true, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FICOM", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xde}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: true, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FICOMP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xde}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: true, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FISUB", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xde}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: true, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FISUBR", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xde}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: true, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FIDIV", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xde}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: true, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FIDIVR", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xde}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: true, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FADDP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xde}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FMULP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xde}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FCOMPP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xde}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 3, Rm: 1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FSUBRP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xde}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FSUBP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xde}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FDIVRP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xde}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FDIVP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xde}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FILD", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: true, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FISTTP", Extension: "SSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: true, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FIST", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: true, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FISTP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: true, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FBLD", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FILD", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FBSTP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FISTP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FFREEP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FNSTSW", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 4, Rm: 0, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FUCOMIP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FCOMIP", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xdf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADD_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x80}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x80}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "OR_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x80}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "OR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x80}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADC_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x80}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADC", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x80}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SBB_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x80}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SBB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x80}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "AND_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x80}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "AND", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x80}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SUB_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x80}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SUB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x80}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XOR_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x80}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XOR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x80}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x80}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADD_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x81}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x81}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "OR_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x81}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "OR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x81}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADC_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x81}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADC", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x81}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SBB_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x81}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SBB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x81}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "AND_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x81}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "AND", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x81}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SUB_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x81}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SUB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x81}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XOR_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x81}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XOR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x81}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x81}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADD_LOCK", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x82}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADD", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x82}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "OR_LOCK", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x82}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "OR", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x82}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADC_LOCK", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x82}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADC", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x82}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SBB_LOCK", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x82}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SBB", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x82}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "AND_LOCK", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x82}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "AND", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x82}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SUB_LOCK", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x82}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SUB", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x82}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XOR_LOCK", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x82}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XOR", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x82}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMP", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x82}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADD_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x83}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x83}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "OR_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x83}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "OR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x83}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADC_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x83}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADC", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x83}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SBB_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x83}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SBB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x83}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "AND_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x83}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "AND", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x83}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SUB_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x83}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SUB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x83}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XOR_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x83}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XOR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x83}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x83}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "POP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x8f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ROL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xc0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ROL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xc1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ROR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xc0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ROR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xc1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ROR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ROR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ROR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ROR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ROL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ROL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ROL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ROL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RCL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xc0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RCR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xc0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xc0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xc0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xc0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SAR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xc0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RCL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xc1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RCR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xc1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xc1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xc1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xc1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SAR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xc1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RCL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RCR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SAR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RCL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RCR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SAR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RCL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RCR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SAR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RCL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RCR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SAR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "TEST", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "TEST", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOT_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf6}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOT", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NEG_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf6}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NEG", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MUL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "IMUL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "DIV", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "IDIV", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "TEST", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "TEST", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOT_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf7}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOT", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NEG_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf7}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NEG", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MUL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "IMUL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "DIV", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "IDIV", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "INC_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xfe}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "INC", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xfe}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "DEC_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xfe}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "DEC", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xfe}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "INC_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xff}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "INC", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xff}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "DEC_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xff}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "DEC", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xff}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CALL_NEAR", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xe8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CALL_NEAR", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xe8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 4, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CALL_NEAR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xff}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JMP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xff}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JMP_FAR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xff}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUSH", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xff}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SLDT", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "STR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LLDT", Extension: "BASE", Mode: 15, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LTR", Extension: "BASE", Mode: 15, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "VERR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "VERW", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LGDT", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LGDT", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SMSW", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LMSW", Extension: "BASE", Mode: 15, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BT", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xba}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BTS_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xba}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BTS", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xba}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BTR_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xba}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BTR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xba}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BTC_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xba}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BTC", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xba}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "VMCLEAR", Extension: "VTX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc7}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "VMPTRLD", Extension: "VTX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "VMPTRST", Extension: "VTX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "VMXON", Extension: "VTX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc7}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMPXCHG8B_LOCK", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc7}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMPXCHG8B_LOCK", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc7}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMPXCHG8B", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMPXCHG8B", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMPXCHG16B_LOCK", Extension: "LONGMODE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc7}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMPXCHG16B", Extension: "LONGMODE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOV", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xc6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOV", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xc7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSRLW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x71}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSRAW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x71}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSLLW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x71}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSRLW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x71}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSRAW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x71}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSLLW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x71}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSRLD", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x72}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSRAD", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x72}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSLLD", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x72}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSRLD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x72}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSRAD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x72}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSLLD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x72}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSRLQ", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x73}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSLLQ", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x73}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSRLQ", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x73}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSRLDQ", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x73}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSLLQ", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x73}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSLLDQ", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x73}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FXSAVE", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xae}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FXRSTOR", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xae}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FXSAVE64", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xae}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FXRSTOR64", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xae}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LDMXCSR", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xae}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "STMXCSR", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xae}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PREFETCHNTA", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x18}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PREFETCHT0", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x18}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PREFETCHT1", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x18}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PREFETCHT2", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x18}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x18}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x18}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x18}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x18}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x18}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x18}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x18}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x18}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x19}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "VMCALL", Extension: "VTX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 0, Rm: 1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "VMLAUNCH", Extension: "VTX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 0, Rm: 2, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "VMRESUME", Extension: "VTX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 0, Rm: 3, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "VMXOFF", Extension: "VTX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 0, Rm: 4, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SGDT", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SGDT", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LIDT", Extension: "BASE", Mode: 1, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LIDT", Extension: "BASE", Mode: 14, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MONITOR", Extension: "SSE3", Mode: 15, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 1, Rm: 0, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MWAIT", Extension: "SSE3", Mode: 15, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 1, Rm: 1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SIDT", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SIDT", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "INVLPG", Extension: "BASE", Mode: 15, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SWAPGS", Extension: "LONGMODE", Mode: 1, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 7, Rm: 0, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RDTSCP", Extension: "RDTSCP", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 7, Rm: 1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SFENCE", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xae}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CLFLUSH", Extension: "CLFSH", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xae}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LFENCE", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xae}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MFENCE", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xae}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVHLPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x12}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVLPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x12}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVLHPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x16}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVHPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x16}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADD_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x0}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADD_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x1}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x4}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUSH", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "POP", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "OR_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x8}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "OR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "OR_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x9}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "OR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "OR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "OR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "OR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "OR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUSH", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xe}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADC_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x10}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADC", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x10}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADC_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x11}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADC", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x11}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADC", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x12}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADC", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x13}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADC", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x14}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADC", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x15}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUSH", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x16}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "POP", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x17}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SBB_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x18}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SBB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x18}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SBB_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x19}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SBB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x19}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SBB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x1a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SBB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x1b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SBB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x1c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SBB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x1d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUSH", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x1e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "POP", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x1f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "AND_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x20}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "AND", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x20}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "AND_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x21}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "AND", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x21}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "AND", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x22}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "AND", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x23}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "AND", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x24}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "AND", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x25}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "DAA", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x27}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SUB_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x28}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SUB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x28}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SUB_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x29}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SUB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x29}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SUB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x2a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SUB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x2b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SUB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x2c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SUB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x2d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "DAS", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x2f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XOR_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x30}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XOR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x30}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XOR_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x31}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XOR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x31}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XOR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x32}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XOR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x33}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XOR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x34}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XOR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x35}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "AAA", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x37}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x38}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x39}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x3a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x3b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x3c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x3d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "AAS", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x3f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "INC", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x40}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -1, Srm: true, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "DEC", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x48}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -1, Srm: true, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUSH", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x50}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -1, Srm: true, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "POP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x58}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -1, Srm: true, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUSHA", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x60}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUSHAD", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x60}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "POPA", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x61}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "POPAD", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x61}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BOUND", Extension: "BASE", Mode: 12, Priv: false, Pseudo: false, Opcode: []uint8{0x62}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BOUND", Extension: "BASE", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0x62}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ARPL", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x63}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVSXD", Extension: "LONGMODE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x63}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUSH", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x68}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "IMUL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x69}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUSH", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x6a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "IMUL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x6b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_INSB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x6c}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_INSB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x6c}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "INSB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x6c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_INSW", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x6d}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_INSW", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x6d}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "INSW", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x6d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_INSD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x6d}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_INSD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x6d}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "INSD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x6d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_OUTSB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x6e}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_OUTSB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x6e}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "OUTSB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x6e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_OUTSW", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x6f}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_OUTSW", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x6f}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "OUTSW", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x6f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_OUTSD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x6f}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_OUTSD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x6f}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "OUTSD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x6f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JO", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x70}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JO", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x70}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNO", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x71}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNO", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x71}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JB", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x72}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JB", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x72}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNB", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x73}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNB", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x73}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JZ", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x74}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JZ", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x74}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNZ", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x75}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNZ", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x75}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JBE", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x76}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JBE", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x76}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNBE", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x77}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNBE", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x77}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JS", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x78}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JS", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x78}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNS", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x79}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNS", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x79}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JP", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x7a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JP", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x7a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNP", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x7b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNP", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x7b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JL", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x7c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JL", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x7c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNL", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x7d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNL", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x7d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JLE", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x7e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JLE", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x7e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNLE", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x7f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNLE", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x7f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "TEST", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x84}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "TEST", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x85}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XCHG", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x86}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XCHG", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x86}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XCHG", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x87}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XCHG", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x87}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOV", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x88}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOV", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x89}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOV", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x8a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOV", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x8b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOV", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x8c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LEA", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x8d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOV", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x8e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x90}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: 0, Srm: true, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PAUSE", Extension: "PAUSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x90}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: 0, Srm: true, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x90}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: 0, Srm: true, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XCHG", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x90}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -1, Srm: true, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CBW", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x98}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CDQE", Extension: "LONGMODE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x98}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CWDE", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x98}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CWD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x99}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CQO", Extension: "LONGMODE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x99}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CDQ", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x99}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CALL_FAR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xff}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CALL_FAR", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x9a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 2, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FWAIT", Extension: "X87", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x9b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUSHF", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x9c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUSHFD", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x9c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUSHFQ", Extension: "LONGMODE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x9c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "POPF", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x9d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "POPFD", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0x9d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "POPFQ", Extension: "LONGMODE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x9d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SAHF", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x9e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LAHF", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x9f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOV", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -2, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOV", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -2, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOV", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -2, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOV", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -2, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_MOVSB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa4}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_MOVSB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa4}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVSB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa4}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_MOVSW", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa5}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_MOVSW", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa5}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVSW", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_MOVSD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa5}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_MOVSD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa5}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVSD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_MOVSQ", Extension: "LONGMODE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa5}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_MOVSQ", Extension: "LONGMODE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa5}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVSQ", Extension: "LONGMODE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REPE_CMPSB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa6}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REPNE_CMPSB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa6}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMPSB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REPE_CMPSW", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa7}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REPNE_CMPSW", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa7}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMPSW", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REPE_CMPSD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa7}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REPNE_CMPSD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa7}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMPSD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REPE_CMPSQ", Extension: "LONGMODE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa7}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REPNE_CMPSQ", Extension: "LONGMODE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa7}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMPSQ", Extension: "LONGMODE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "TEST", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "TEST", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xa9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_STOSB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xaa}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_STOSB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xaa}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "STOSB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xaa}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_STOSW", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xab}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_STOSW", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xab}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "STOSW", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xab}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_STOSD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xab}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_STOSD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xab}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "STOSD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xab}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_STOSQ", Extension: "LONGMODE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xab}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_STOSQ", Extension: "LONGMODE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xab}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "STOSQ", Extension: "LONGMODE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xab}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_LODSB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xac}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_LODSB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xac}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LODSB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xac}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_LODSW", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xad}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_LODSW", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xad}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LODSW", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xad}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_LODSD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xad}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_LODSD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xad}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LODSD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xad}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_LODSQ", Extension: "LONGMODE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xad}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REP_LODSQ", Extension: "LONGMODE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xad}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LODSQ", Extension: "LONGMODE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xad}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REPE_SCASB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xae}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REPNE_SCASB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xae}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SCASB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xae}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REPE_SCASW", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xaf}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REPNE_SCASW", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xaf}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SCASW", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xaf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REPE_SCASD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xaf}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REPNE_SCASD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xaf}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SCASD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xaf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REPE_SCASQ", Extension: "LONGMODE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xaf}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "REPNE_SCASQ", Extension: "LONGMODE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xaf}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SCASQ", Extension: "LONGMODE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xaf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOV", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xb0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -1, Srm: true, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOV", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xb8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -1, Srm: true, NoSibDisp: false, Imm: -3, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RET_NEAR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xc2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 2, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RET_NEAR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xc3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LES", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xc4}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LDS", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xc5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ENTER", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xc8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 2, Imm2: 1, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LEAVE", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xc9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RET_FAR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xca}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 2, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RET_FAR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xcb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "INT3", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xcc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "INT", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xcd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "INTO", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xce}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "IRET", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xcf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "IRETD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xcf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "IRETQ", Extension: "LONGMODE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xcf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "AAM", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xd4}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "AAD", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xd5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SALC", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xd6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XLAT", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xd7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LOOPNE", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xe0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LOOPNE", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xe0}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LOOPNE", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xe0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LOOPNE", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xe1}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LOOPE", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xe1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LOOPE", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xe1}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LOOPE", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xe1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LOOPE", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xe0}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LOOP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xe2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JCXZ", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xe3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JECXZ", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xe3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JRCXZ", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xe3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "IN", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xe4}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "IN", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xe5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "OUT", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xe6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "OUT", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xe7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JMP", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xe9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JMP", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xe9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 4, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JMP_FAR", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xea}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 2, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JMP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xeb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "IN", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xec}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "IN", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xed}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "OUT", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xee}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "OUT", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xef}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "INT1", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "HLT", Extension: "BASE", Mode: 15, Priv: true, Pseudo: false, Opcode: []uint8{0xf4}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMC", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CLC", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "STC", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CLI", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xfa}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "STI", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xfb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CLD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xfc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "STD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xfd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LAR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LSL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SYSCALL", Extension: "LONGMODE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CLTS", Extension: "BASE", Mode: 15, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SYSRET", Extension: "LONGMODE", Mode: 1, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVUPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x10}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVUPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x11}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVLPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x13}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "UNPCKLPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x14}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "UNPCKHPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x15}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVHPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x17}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVSS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x10}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVSS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x11}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVSLDUP", Extension: "SSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x12}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVSHDUP", Extension: "SSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x16}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVUPD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x10}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVUPD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x11}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVLPD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x12}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVLPD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x13}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "UNPCKLPD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x14}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "UNPCKHPD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x15}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVHPD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x16}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVHPD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x17}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVSD_XMM", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x10}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVSD_XMM", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x11}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVDDUP", Extension: "SSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x12}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOV_CR", Extension: "BASE", Mode: 14, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x22}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -8, Rm: -1, Srm: false, NoSibDisp: true, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOV_CR", Extension: "BASE", Mode: 1, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x22}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -8, Rm: -1, Srm: false, NoSibDisp: true, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOV_CR", Extension: "BASE", Mode: 14, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x20}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -8, Rm: -1, Srm: false, NoSibDisp: true, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOV_CR", Extension: "BASE", Mode: 1, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x20}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -8, Rm: -1, Srm: false, NoSibDisp: true, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOV_DR", Extension: "BASE", Mode: 14, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x23}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: true, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOV_DR", Extension: "BASE", Mode: 1, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x23}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: true, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOV_DR", Extension: "BASE", Mode: 14, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x21}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: true, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOV_DR", Extension: "BASE", Mode: 1, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x21}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: true, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "WRMSR", Extension: "BASE", Mode: 15, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x30}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RDTSC", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x31}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RDMSR", Extension: "BASE", Mode: 15, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x32}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RDPMC", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x33}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SYSENTER", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x34}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SYSEXIT", Extension: "BASE", Mode: 15, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x35}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMOVO", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x40}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMOVNO", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x41}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMOVB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x42}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMOVNB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x43}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMOVZ", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x44}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMOVNZ", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x45}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMOVBE", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x46}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMOVNBE", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x47}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVMSKPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x50}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SQRTPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x51}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RSQRTPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x52}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RCPPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x53}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ANDPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x54}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ANDNPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x55}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ORPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x56}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XORPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x57}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SQRTSS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x51}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RSQRTSS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x52}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RCPSS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x53}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVMSKPD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x50}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SQRTPD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x51}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ANDPD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x54}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ANDNPD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x55}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ORPD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x56}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XORPD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x57}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SQRTSD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x51}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUNPCKLBW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x60}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUNPCKLWD", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x61}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUNPCKLDQ", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x62}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PACKSSWB", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x63}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PCMPGTB", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x64}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PCMPGTW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x65}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PCMPGTD", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x66}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PACKUSWB", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x67}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUNPCKLBW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x60}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUNPCKLWD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x61}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUNPCKLDQ", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x62}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PACKSSWB", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x63}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PCMPGTB", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x64}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PCMPGTW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x65}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PCMPGTD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x66}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PACKUSWB", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x67}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSHUFW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x70}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PCMPEQB", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x74}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PCMPEQW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x75}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PCMPEQD", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x76}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "EMMS", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x77}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSHUFD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x70}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PCMPEQB", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x74}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PCMPEQW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x75}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PCMPEQD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x76}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSHUFLW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x70}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSHUFHW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x70}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JO", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x80}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 4, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JO", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x80}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNO", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x81}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNO", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x81}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 4, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JB", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x82}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JB", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x82}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 4, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNB", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x83}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNB", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x83}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 4, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JZ", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x84}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JZ", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x84}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 4, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNZ", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x85}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNZ", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x85}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 4, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JBE", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x86}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JBE", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x86}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 4, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNBE", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x87}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNBE", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x87}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 4, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SETO", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x90}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SETNO", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x91}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SETB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x92}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SETNB", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x93}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SETZ", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x94}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SETNZ", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x95}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SETBE", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x96}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SETNBE", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x97}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUSH", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xa0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "POP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xa1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CPUID", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xa2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BT", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xa3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMPXCHG_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xb0}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMPXCHG", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xb0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMPXCHG_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xb1}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMPXCHG", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xb1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LSS", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xb2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BTR_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xb3}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BTR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xb3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LFS", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xb4}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LGS", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xb5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVZX", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xb6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVZX", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xb7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XADD_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc0}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XADD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XADD_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc1}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XADD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMPPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVNTI", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PINSRW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc4}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PEXTRW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHUFPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMPSS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc2}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMPPD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc2}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PINSRW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc4}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PEXTRW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc5}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHUFPD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc6}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMPSD_XMM", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc2}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSRLW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSRLD", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSRLQ", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PADDQ", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd4}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMULLW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMOVMSKB", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADDSUBPD", Extension: "SSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd0}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSRLW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd1}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSRLD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd2}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSRLQ", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd3}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PADDQ", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd4}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMULLW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd5}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMOVMSKB", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd7}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVQ2DQ", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd6}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADDSUBPS", Extension: "SSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd0}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVDQ2Q", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd6}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PAVGB", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xe0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSRAW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xe1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSRAD", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xe2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PAVGW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xe3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMULHUW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xe4}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMULHW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xe5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVNTQ", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xe7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PAVGB", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xe0}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSRAW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xe1}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSRAD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xe2}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PAVGW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xe3}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMULHUW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xe4}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMULHW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xe5}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTTPD2DQ", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xe6}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVNTDQ", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xe7}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTDQ2PD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xe6}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTPD2DQ", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xe6}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSLLW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSLLD", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSLLQ", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMULUDQ", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf4}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMADDWD", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSADBW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MASKMOVQ", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSLLW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf1}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSLLD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf2}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSLLQ", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf3}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMULUDQ", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf4}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMADDWD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf5}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSADBW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf6}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MASKMOVDQU", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf7}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LDDQU", Extension: "SSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf0}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "INVD", Extension: "BASE", Mode: 15, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "WBINVD", Extension: "BASE", Mode: 15, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "UD2", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVAPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x28}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVAPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x29}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTPI2PS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVNTPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTTPS2PI", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTPS2PI", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "UCOMISS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "COMISS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTSI2SS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2a}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTSI2SS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2a}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTTSS2SI", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2c}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTTSS2SI", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2c}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTSS2SI", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2d}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTSS2SI", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2d}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVAPD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x28}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVAPD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x29}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTPI2PD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2a}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVNTPD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2b}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTTPD2PI", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2c}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTPD2PI", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2d}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "UCOMISD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2e}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "COMISD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2f}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTSI2SD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2a}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTSI2SD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2a}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTTSD2SI", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2c}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTTSD2SI", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2c}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTSD2SI", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2d}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTSD2SI", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2d}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMOVS", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x48}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMOVNS", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x49}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMOVP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x4a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMOVNP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x4b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMOVL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x4c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMOVNL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x4d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMOVLE", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x4e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CMOVNLE", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x4f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADDPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x58}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MULPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x59}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTPS2PD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x5a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTDQ2PS", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x5b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SUBPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x5c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MINPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x5d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "DIVPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x5e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MAXPS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x5f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADDSS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x58}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MULSS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x59}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTSS2SD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x5a}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTTPS2DQ", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x5b}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SUBSS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x5c}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MINSS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x5d}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "DIVSS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x5e}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MAXSS", Extension: "SSE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x5f}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADDPD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x58}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MULPD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x59}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTPD2PS", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x5a}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTPS2DQ", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x5b}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SUBPD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x5c}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MINPD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x5d}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "DIVPD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x5e}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MAXPD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x5f}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADDSD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x58}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MULSD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x59}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CVTSD2SS", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x5a}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SUBSD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x5c}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MINSD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x5d}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "DIVSD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x5e}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MAXSD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x5f}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUNPCKHBW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x68}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUNPCKHWD", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x69}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUNPCKHDQ", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x6a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PACKSSDW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x6b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVD", Extension: "SSE2", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x6e}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVD", Extension: "SSE2", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x6e}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVD", Extension: "SSE2", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x7e}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVD", Extension: "SSE2", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x7e}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVD", Extension: "MMX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x6e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVD", Extension: "MMX", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x6e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVD", Extension: "MMX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x7e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVD", Extension: "MMX", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x7e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVQ", Extension: "SSE2", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x6e}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVQ", Extension: "SSE2", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x7e}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVQ", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd6}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVQ", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x7e}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVQ", Extension: "MMX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x6e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVQ", Extension: "MMX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x7e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVQ", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x6f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVQ", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x7f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUNPCKHBW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x68}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUNPCKHWD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x69}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUNPCKHDQ", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x6a}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PACKSSDW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x6b}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUNPCKLQDQ", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x6c}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUNPCKHQDQ", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x6d}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVDQU", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x6f}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVDQU", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x7f}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "VMREAD", Extension: "VTX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x78}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "VMREAD", Extension: "VTX", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x78}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "VMWRITE", Extension: "VTX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x79}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "VMWRITE", Extension: "VTX", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x79}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "HADDPD", Extension: "SSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x7c}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "HSUBPD", Extension: "SSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x7d}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVDQA", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x7f}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVDQA", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x6f}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "HADDPS", Extension: "SSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x7c}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "HSUBPS", Extension: "SSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x7d}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JS", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x88}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JS", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x88}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 4, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNS", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x89}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNS", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x89}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 4, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JP", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x8a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JP", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x8a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 4, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNP", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x8b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNP", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x8b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 4, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JL", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x8c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JL", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x8c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 4, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNL", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x8d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNL", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x8d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 4, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JLE", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x8e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JLE", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x8e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 4, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNLE", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x8f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "JNLE", Extension: "BASE", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x8f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 4, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SETS", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x98}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SETNS", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x99}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SETP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x9a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SETNP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x9b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SETL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x9c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SETNL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x9d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SETLE", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x9e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SETNLE", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x9f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PUSH", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xa8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "POP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xa9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RSM", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xaa}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BTS_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xab}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BTS", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xab}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHRD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xac}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHRD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xad}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHLD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xa4}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHLD", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xa5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "IMUL", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xaf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BTC_LOCK", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xbb}, Prefix: []uint8{0xf0}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BTC", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xbb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BSF", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xbc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BSR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xbd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVSX", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xbe}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVSX", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xbf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BSWAP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -1, Srm: true, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSUBUSB", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSUBUSW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMINUB", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xda}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PAND", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xdb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PADDUSB", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xdc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PADDUSW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xdd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMAXUB", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xde}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PANDN", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xdf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSUBUSB", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd8}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSUBUSW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd9}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMINUB", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xda}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PAND", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xdb}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PADDUSB", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xdc}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PADDUSW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xdd}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMAXUB", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xde}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PANDN", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xdf}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSUBSB", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xe8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSUBSW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xe9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMINSW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xea}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "POR", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xeb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PADDSB", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xec}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PADDSW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xed}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMAXSW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xee}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PXOR", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xef}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSUBSB", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xe8}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSUBSW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xe9}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMINSW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xea}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "POR", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xeb}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PADDSB", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xec}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PADDSW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xed}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMAXSW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xee}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PXOR", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xef}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSUBB", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSUBW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSUBD", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xfa}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSUBQ", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xfb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PADDB", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xfc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PADDW", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xfd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PADDD", Extension: "MMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xfe}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSUBB", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf8}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSUBW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf9}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSUBD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xfa}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSUBQ", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xfb}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PADDB", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xfc}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PADDW", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xfd}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PADDD", Extension: "SSE2", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xfe}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PHADDW", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PHADDW", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x1}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PHADDD", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PHADDD", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x2}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PHADDSW", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PHADDSW", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x3}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PHSUBW", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PHSUBW", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x5}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PHSUBD", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PHSUBD", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x6}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PHSUBSW", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PHSUBSW", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x7}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMADDUBSW", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x4}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMADDUBSW", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x4}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMULHRSW", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0xb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMULHRSW", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0xb}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSHUFB", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSHUFB", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x0}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSIGNB", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSIGNB", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x8}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSIGNW", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSIGNW", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x9}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSIGND", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0xa}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSIGND", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0xa}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PALIGNR", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0xf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PALIGNR", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0xf}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PABSB", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x1c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PABSB", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x1c}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PABSW", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x1d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PABSW", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x1d}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PABSD", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x1e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PABSD", Extension: "SSSE3", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x1e}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "POPCNT", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xb8}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PCMPGTQ", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x37}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CRC32", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0xf0}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CRC32", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0xf1}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BLENDPD", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0xd}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BLENDPS", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0xc}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BLENDVPD", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x15}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BLENDVPS", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x14}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PCMPEQQ", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x29}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "DPPD", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0x41}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "DPPS", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0x40}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVNTDQA", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x2a}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "EXTRACTPS", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0x17}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "INSERTPS", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0x21}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MPSADBW", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0x42}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PACKUSDW", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x2b}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PBLENDW", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0xe}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PBLENDVB", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x10}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PEXTRB", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0x14}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PEXTRW_SSE4", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0x15}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PEXTRQ", Extension: "SSE4", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0x16}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PEXTRD", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0x16}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PINSRB", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0x20}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PINSRD", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0x22}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PINSRQ", Extension: "SSE4", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0x22}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ROUNDPD", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0x9}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ROUNDPS", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0x8}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ROUNDSD", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0xb}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ROUNDSS", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0xa}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PTEST", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x17}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PHMINPOSUW", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x41}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMAXSB", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x3c}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMAXSD", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x3d}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMAXUD", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x3f}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMAXUW", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x3e}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMINSB", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x38}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMINSD", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x39}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMINUD", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x3b}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMINUW", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x3a}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMULLD", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x40}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMULDQ", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x28}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMOVSXBW", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x20}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMOVSXBD", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x21}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMOVSXBQ", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x22}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMOVSXWD", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x23}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMOVSXWQ", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x24}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMOVSXDQ", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x25}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMOVZXBW", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x30}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMOVZXBD", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x31}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMOVZXBQ", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x32}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMOVZXWD", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x33}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMOVZXWQ", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x34}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMOVZXDQ", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x35}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PCMPESTRI", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0x61}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PCMPESTRI", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0x61}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PCMPISTRI", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0x63}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PCMPISTRI", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0x63}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PCMPESTRM", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0x60}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PCMPESTRM", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0x60}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PCMPISTRM", Extension: "SSE4", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0x62}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XGETBV", Extension: "XSAVE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 2, Rm: 0, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XSETBV", Extension: "XSAVE", Mode: 15, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 2, Rm: 1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XSAVE", Extension: "XSAVE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xae}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XRSTOR", Extension: "XSAVE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xae}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XSAVE64", Extension: "XSAVE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xae}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XRSTOR64", Extension: "XSAVE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xae}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVBE", Extension: "MOVBE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0xf0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVBE", Extension: "MOVBE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0xf1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "GETSEC", Extension: "SMX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x37}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "AESKEYGENASSIST", Extension: "AES", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0xdf}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "AESENC", Extension: "AES", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0xdc}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "AESENCLAST", Extension: "AES", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0xdd}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "AESDEC", Extension: "AES", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0xde}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "AESDECLAST", Extension: "AES", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0xdf}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "AESIMC", Extension: "AES", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0xdb}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PCLMULQDQ", Extension: "PCLMULQDQ", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0x44}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "INVEPT", Extension: "VTX", Mode: 1, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x80}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "INVEPT", Extension: "VTX", Mode: 2, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x80}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "INVVPID", Extension: "VTX", Mode: 1, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x81}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "INVVPID", Extension: "VTX", Mode: 2, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x81}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PREFETCH_EXCLUSIVE", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PREFETCHW", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PREFETCH_RESERVED", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PREFETCHW", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PREFETCH_RESERVED", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PREFETCH_RESERVED", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PREFETCH_RESERVED", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PREFETCH_RESERVED", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOP2", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0x66, 0x90}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOP3", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1f, 0x0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOP4", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1f, 0x40, 0x0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "FEMMS", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xe}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PI2FW", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf}, Prefix: []uint8(nil), Suffix: []uint8{0xc}, Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PI2FD", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf}, Prefix: []uint8(nil), Suffix: []uint8{0xd}, Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PF2IW", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf}, Prefix: []uint8(nil), Suffix: []uint8{0x1c}, Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PF2ID", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf}, Prefix: []uint8(nil), Suffix: []uint8{0x1d}, Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PFNACC", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf}, Prefix: []uint8(nil), Suffix: []uint8{0x8a}, Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PFPNACC", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf}, Prefix: []uint8(nil), Suffix: []uint8{0x8e}, Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PFCMPGE", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf}, Prefix: []uint8(nil), Suffix: []uint8{0x90}, Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PFMIN", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf}, Prefix: []uint8(nil), Suffix: []uint8{0x94}, Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PFRCP", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf}, Prefix: []uint8(nil), Suffix: []uint8{0x96}, Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PFSQRT", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf}, Prefix: []uint8(nil), Suffix: []uint8{0x97}, Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PFSUB", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf}, Prefix: []uint8(nil), Suffix: []uint8{0x9a}, Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PFADD", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf}, Prefix: []uint8(nil), Suffix: []uint8{0x9e}, Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PFCMPGT", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf}, Prefix: []uint8(nil), Suffix: []uint8{0xa0}, Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PFMAX", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf}, Prefix: []uint8(nil), Suffix: []uint8{0xa4}, Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PFCPIT1", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf}, Prefix: []uint8(nil), Suffix: []uint8{0xa6}, Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PFRSQIT1", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf}, Prefix: []uint8(nil), Suffix: []uint8{0xa7}, Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PFSUBR", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf}, Prefix: []uint8(nil), Suffix: []uint8{0xaa}, Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PFACC", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf}, Prefix: []uint8(nil), Suffix: []uint8{0xae}, Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PFCMPEQ", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf}, Prefix: []uint8(nil), Suffix: []uint8{0xb0}, Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PFMUL", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf}, Prefix: []uint8(nil), Suffix: []uint8{0xb4}, Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PFRCPIT2", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf}, Prefix: []uint8(nil), Suffix: []uint8{0xb6}, Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PMULHRW", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf}, Prefix: []uint8(nil), Suffix: []uint8{0xb7}, Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PSWAPD", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf}, Prefix: []uint8(nil), Suffix: []uint8{0xbb}, Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PAVGUSB", Extension: "3DNOW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xf}, Prefix: []uint8(nil), Suffix: []uint8{0xbf}, Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SYSCALL_AMD", Extension: "BASE", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SYSRET_AMD", Extension: "BASE", Mode: 14, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "VMRUN", Extension: "SVM", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 3, Rm: 0, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "VMMCALL", Extension: "SVM", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 3, Rm: 1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "VMLOAD", Extension: "SVM", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 3, Rm: 2, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "VMSAVE", Extension: "SVM", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 3, Rm: 3, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "STGI", Extension: "SVM", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 3, Rm: 4, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CLGI", Extension: "SVM", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 3, Rm: 5, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SKINIT", Extension: "SVM", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 3, Rm: 6, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "INVLPGA", Extension: "SVM", Mode: 15, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 3, Rm: 7, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "EXTRQ", Extension: "SSE4a", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x78}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 1, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "EXTRQ", Extension: "SSE4a", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x79}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "INSERTQ", Extension: "SSE4a", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x78}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 1, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "INSERTQ", Extension: "SSE4a", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x79}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVNTSD", Extension: "SSE4a", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2b}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "MOVNTSS", Extension: "SSE4a", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x2b}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LZCNT", Extension: "AMD", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xbd}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CLZERO", Extension: "CLZERO", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 7, Rm: 4, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "VPMACSSWW", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x85}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPMACSSWD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x86}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPMACSSDQL", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x87}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPMACSWW", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x95}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPMACSWD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x96}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPMACSDQL", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x97}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPCMOV", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xa2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPCMOV", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xa2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPCMOV", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xa2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: 1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPCMOV", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xa2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: 1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPPERM", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xa3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPPERM", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xa3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPMADCSSWD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xa6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPMADCSWD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xb6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPROTB", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xc0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPROTW", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xc1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPROTD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xc2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPROTQ", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xc3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPMACSSDD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x8e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPMACSSDQH", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x8f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPMACSDD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPMACSDQH", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPCOMB", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xcc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPCOMW", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xcd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPCOMD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xce}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPCOMQ", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xcf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPCOMUB", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xec}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPCOMUW", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xed}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPCOMUD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xee}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPCOMUQ", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xef}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x8, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VFRCZPS", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x80}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VFRCZPS", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x80}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: 1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VFRCZPD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x81}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VFRCZPD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x81}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: 1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VFRCZSS", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x82}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VFRCZSD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x83}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPROTB", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x90}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPROTB", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x90}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPROTW", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x91}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPROTW", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x91}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPROTD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x92}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPROTD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x92}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPROTQ", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x93}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPROTQ", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x93}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPSHLB", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x94}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPSHLB", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x94}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPSHLW", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x95}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPSHLW", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x95}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPSHLD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x96}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPSHLD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x96}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPSHLQ", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x97}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPSHLQ", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x97}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPHADDBW", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xc1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPHADDBD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xc2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPHADDBQ", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xc3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPHADDWD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xc6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPHADDWQ", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xc7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPHADDUBW", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPHADDUBD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPHADDUBQ", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPHADDUWD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPHADDUWQ", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPHSUBBW", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPHSUBWD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPHSUBDQ", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPSHAB", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x98}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPSHAB", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x98}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPSHAW", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x99}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPSHAW", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x99}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPSHAD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPSHAD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPSHAQ", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPSHAQ", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPHADDDQ", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xcb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPHADDUDQ", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xdb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "BEXTR_XOP", Extension: "TBM", Mode: 7, Priv: false, Pseudo: false, Opcode: []uint8{0x10}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 4, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0xa, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "BLCFILL", Extension: "TBM", Mode: 7, Priv: false, Pseudo: false, Opcode: []uint8{0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "BLSFILL", Extension: "TBM", Mode: 7, Priv: false, Pseudo: false, Opcode: []uint8{0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "BLCS", Extension: "TBM", Mode: 7, Priv: false, Pseudo: false, Opcode: []uint8{0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "TZMSK", Extension: "TBM", Mode: 7, Priv: false, Pseudo: false, Opcode: []uint8{0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "BLCIC", Extension: "TBM", Mode: 7, Priv: false, Pseudo: false, Opcode: []uint8{0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "BLSIC", Extension: "TBM", Mode: 7, Priv: false, Pseudo: false, Opcode: []uint8{0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "T1MSKC", Extension: "TBM", Mode: 7, Priv: false, Pseudo: false, Opcode: []uint8{0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "BLCMSK", Extension: "TBM", Mode: 7, Priv: false, Pseudo: false, Opcode: []uint8{0x2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "BLCI", Extension: "TBM", Mode: 7, Priv: false, Pseudo: false, Opcode: []uint8{0x2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "LLWPCB", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x12}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "SLWPCB", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x12}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0x9, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "LWPINS", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x12}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 4, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0xa, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "LWPVAL", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x12}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 4, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x8f, VexMap: 0xa, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VFMADDSUBPS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDSUBPS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDSUBPS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDSUBPS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDSUBPD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDSUBPD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDSUBPD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDSUBPD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBADDPS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBADDPS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBADDPS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBADDPS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBADDPD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBADDPD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBADDPD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBADDPD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDPS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x68}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDPS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x68}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDPS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x68}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDPS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x68}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDPD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x69}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDPD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x69}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDPD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x69}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDPD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x69}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDSS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDSS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDSD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDSD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBPS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBPS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBPS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBPS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBPD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBPD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBPD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBPD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBSS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBSS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBSD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBSD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADDPS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x78}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADDPS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x78}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADDPS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x78}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADDPS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x78}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADDPD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x79}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADDPD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x79}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADDPD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x79}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADDPD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x79}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADDSS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADDSS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADDSD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADDSD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUBPS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUBPS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUBPS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUBPS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUBPD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUBPD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUBPD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUBPD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUBSS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUBSS", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUBSD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUBSD", Extension: "FMA4", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPERMIL2PS", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x48}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPERMIL2PS", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x48}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPERMIL2PS", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x48}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPERMIL2PS", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x48}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPERMIL2PD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x49}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPERMIL2PD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x49}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPERMIL2PD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x49}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPERMIL2PD", Extension: "XOP", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x49}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "XSAVEOPT", Extension: "XSAVEOPT", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xae}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XSAVEOPT64", Extension: "XSAVEOPT", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xae}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BNDMK", Extension: "MPX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1b}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BNDCL", Extension: "MPX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1a}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BNDCL", Extension: "MPX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1a}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BNDCL", Extension: "MPX", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1a}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BNDCU", Extension: "MPX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1a}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BNDCU", Extension: "MPX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1a}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BNDCU", Extension: "MPX", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1a}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BNDCN", Extension: "MPX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1b}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BNDCN", Extension: "MPX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1b}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BNDCN", Extension: "MPX", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1b}, Prefix: []uint8{0xf2}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BNDMOV", Extension: "MPX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1a}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BNDMOV", Extension: "MPX", Mode: 12, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1a}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BNDMOV", Extension: "MPX", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1a}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BNDMOV", Extension: "MPX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1a}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BNDMOV", Extension: "MPX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1b}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BNDMOV", Extension: "MPX", Mode: 12, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1b}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BNDMOV", Extension: "MPX", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1b}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BNDMOV", Extension: "MPX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1b}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BNDLDX", Extension: "MPX", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BNDLDX", Extension: "MPX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 0, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BNDLDX", Extension: "MPX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BNDLDX", Extension: "MPX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 2, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BNDSTX", Extension: "MPX", Mode: 14, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BNDSTX", Extension: "MPX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 0, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BNDSTX", Extension: "MPX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BNDSTX", Extension: "MPX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 2, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "NOP", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1b}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHA1MSG1", Extension: "SHA", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0xc9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHA1MSG2", Extension: "SHA", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0xca}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHA1NEXTE", Extension: "SHA", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0xc8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHA1RNDS4", Extension: "SHA", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x3a, 0xcc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHA256MSG1", Extension: "SHA", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0xcc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHA256MSG2", Extension: "SHA", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0xcd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "SHA256RNDS2", Extension: "SHA", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0xcb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RDRAND", Extension: "RDRAND", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RDFSBASE", Extension: "RDWRFSGS", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xae}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 0, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RDGSBASE", Extension: "RDWRFSGS", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xae}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "WRFSBASE", Extension: "RDWRFSGS", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xae}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "WRGSBASE", Extension: "RDWRFSGS", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xae}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XSAVES", Extension: "XSAVES", Mode: 15, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0xc7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XSAVES64", Extension: "XSAVES", Mode: 15, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0xc7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 5, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XRSTORS", Extension: "XSAVES", Mode: 15, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0xc7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XRSTORS64", Extension: "XSAVES", Mode: 15, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0xc7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XSAVEC", Extension: "XSAVEC", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XSAVEC64", Extension: "XSAVEC", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "VADDPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x58}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VADDPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x58}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VADDPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x58}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VADDPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x58}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VADDSD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x58}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "VADDSS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x58}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 2, Avx2Gather: false},
&Insn{Name: "VADDSUBPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VADDSUBPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VADDSUBPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "VADDSUBPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "VANDPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x54}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VANDPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x54}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VANDPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x54}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VANDPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x54}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VANDNPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x55}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VANDNPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x55}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VANDNPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x55}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VANDNPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x55}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VBLENDPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VBLENDPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VBLENDPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VBLENDPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VCMPPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xc2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VCMPPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xc2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VCMPPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xc2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VCMPPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xc2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VCMPSD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xc2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "VCMPSS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xc2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 2, Avx2Gather: false},
&Insn{Name: "VCOMISD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x2f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VCOMISS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x2f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VCVTDQ2PD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 2, Avx2Gather: false},
&Insn{Name: "VCVTDQ2PD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 2, Avx2Gather: false},
&Insn{Name: "VCVTDQ2PS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VCVTDQ2PS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VCVTPD2DQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 3, Avx2Gather: false},
&Insn{Name: "VCVTPD2DQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 3, Avx2Gather: false},
&Insn{Name: "VCVTTPD2DQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VCVTTPD2DQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VCVTPD2PS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VCVTPD2PS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VCVTPS2DQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VCVTPS2DQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VCVTTPS2DQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 2, Avx2Gather: false},
&Insn{Name: "VCVTTPS2DQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 2, Avx2Gather: false},
&Insn{Name: "VCVTPS2PD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VCVTPS2PD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VCVTSD2SI", Extension: "AVX", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0x2d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 3, Avx2Gather: false},
&Insn{Name: "VCVTSD2SI", Extension: "AVX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x2d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 3, Avx2Gather: false},
&Insn{Name: "VCVTSD2SI", Extension: "AVX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x2d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 3, Avx2Gather: false},
&Insn{Name: "VCVTTSD2SI", Extension: "AVX", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0x2c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 3, Avx2Gather: false},
&Insn{Name: "VCVTTSD2SI", Extension: "AVX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x2c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 3, Avx2Gather: false},
&Insn{Name: "VCVTTSD2SI", Extension: "AVX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x2c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 3, Avx2Gather: false},
&Insn{Name: "VCVTSS2SI", Extension: "AVX", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0x2d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 2, Avx2Gather: false},
&Insn{Name: "VCVTSS2SI", Extension: "AVX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x2d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 2, Avx2Gather: false},
&Insn{Name: "VCVTSS2SI", Extension: "AVX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x2d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 2, Avx2Gather: false},
&Insn{Name: "VCVTTSS2SI", Extension: "AVX", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0x2c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 2, Avx2Gather: false},
&Insn{Name: "VCVTTSS2SI", Extension: "AVX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x2c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 2, Avx2Gather: false},
&Insn{Name: "VCVTTSS2SI", Extension: "AVX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x2c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 2, Avx2Gather: false},
&Insn{Name: "VCVTSD2SS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "VCVTSI2SD", Extension: "AVX", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0x2a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "VCVTSI2SD", Extension: "AVX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x2a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "VCVTSI2SD", Extension: "AVX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x2a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "VCVTSI2SS", Extension: "AVX", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0x2a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 2, Avx2Gather: false},
&Insn{Name: "VCVTSI2SS", Extension: "AVX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x2a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 2, Avx2Gather: false},
&Insn{Name: "VCVTSI2SS", Extension: "AVX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x2a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 2, Avx2Gather: false},
&Insn{Name: "VCVTSS2SD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 2, Avx2Gather: false},
&Insn{Name: "VDIVPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VDIVPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VDIVPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VDIVPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VDIVSD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "VDIVSS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 2, Avx2Gather: false},
&Insn{Name: "VEXTRACTF128", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x19}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VDPPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x41}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VDPPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x40}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VDPPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x40}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VEXTRACTPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x17}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VZEROALL", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x77}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VZEROUPPER", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x77}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: false, Mod: -100, Reg: -100, Rm: -100, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VHADDPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VHADDPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VHADDPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "VHADDPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "VHSUBPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VHSUBPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VHSUBPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "VHSUBPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "VPERMILPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPERMILPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPERMILPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPERMILPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPERMILPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPERMILPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPERMILPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x4}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPERMILPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x4}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPERM2F128", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VBROADCASTSS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x18}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VBROADCASTSS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x18}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VBROADCASTSD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x19}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VBROADCASTF128", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x1a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VINSERTF128", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x18}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VINSERTPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x21}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VLDDQU", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xf0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 3, Avx2Gather: false},
&Insn{Name: "VLDDQU", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xf0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 3, Avx2Gather: false},
&Insn{Name: "VMASKMOVPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x2c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMASKMOVPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x2c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMASKMOVPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x2e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMASKMOVPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x2e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMASKMOVPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x2d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMASKMOVPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x2d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMASKMOVPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x2f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMASKMOVPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x2f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPTEST", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x17}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPTEST", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x17}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VTESTPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VTESTPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VTESTPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VTESTPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMAXPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMAXPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMAXPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VMAXPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VMAXSD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "VMAXSS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 2, Avx2Gather: false},
&Insn{Name: "VMINPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMINPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMINPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VMINPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VMINSD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "VMINSS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 2, Avx2Gather: false},
&Insn{Name: "VMOVAPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x28}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVAPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x29}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVAPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x28}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVAPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x29}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVAPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x28}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VMOVAPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x29}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VMOVAPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x28}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VMOVAPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x29}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VMOVD", Extension: "AVX", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0x6e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVD", Extension: "AVX", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0x7e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVD", Extension: "AVX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x6e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVD", Extension: "AVX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x7e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVQ", Extension: "AVX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x6e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVQ", Extension: "AVX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x7e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 2, Avx2Gather: false},
&Insn{Name: "VMOVQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVDDUP", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x12}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 3, Avx2Gather: false},
&Insn{Name: "VMOVDDUP", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x12}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 3, Avx2Gather: false},
&Insn{Name: "VMOVDQA", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVDQA", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVDQA", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVDQA", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVDQU", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 2, Avx2Gather: false},
&Insn{Name: "VMOVDQU", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 2, Avx2Gather: false},
&Insn{Name: "VMOVDQU", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 2, Avx2Gather: false},
&Insn{Name: "VMOVDQU", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 2, Avx2Gather: false},
&Insn{Name: "VMOVSHDUP", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x16}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 2, Avx2Gather: false},
&Insn{Name: "VMOVSHDUP", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x16}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 2, Avx2Gather: false},
&Insn{Name: "VMOVSLDUP", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x12}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 2, Avx2Gather: false},
&Insn{Name: "VMOVSLDUP", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x12}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 2, Avx2Gather: false},
&Insn{Name: "VPOR", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xeb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPAND", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xdb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPANDN", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xdf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPXOR", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xef}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPABSB", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x1c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPABSW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x1d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPABSD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x1e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPHMINPOSUW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x41}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSHUFD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x70}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSHUFHW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x70}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 2, Avx2Gather: false},
&Insn{Name: "VPSHUFLW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x70}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 3, Avx2Gather: false},
&Insn{Name: "VPACKSSWB", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x63}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPACKSSDW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPACKUSWB", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x67}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPACKUSDW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x2b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSLLW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xf1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSLLD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xf2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSLLQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xf3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRLW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRLD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRLQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRAW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRAD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPADDB", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xfc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPADDW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xfd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPADDD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xfe}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPADDQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd4}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPADDSB", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xec}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPADDSW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xed}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPADDUSB", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xdc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPADDUSW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xdd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPAVGB", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPAVGW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCMPEQB", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x74}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCMPEQW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x75}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCMPEQD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x76}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCMPEQQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x29}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCMPGTB", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x64}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCMPGTW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x65}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCMPGTD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x66}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCMPGTQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x37}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPHADDW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPHADDD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPHADDSW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPHSUBW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPHSUBD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPHSUBSW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMULHUW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe4}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMULHRSW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMULHW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMULLW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMULLD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x40}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMULUDQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xf4}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMULDQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x28}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSADBW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xf6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSHUFB", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSIGNB", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSIGNW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSIGND", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xa}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSUBSB", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSUBSW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSUBUSB", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSUBUSW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSUBB", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xf8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSUBW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xf9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSUBD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xfa}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSUBQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xfb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPUNPCKHBW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x68}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPUNPCKHWD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x69}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPUNPCKHDQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPUNPCKHQDQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPUNPCKLBW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x60}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPUNPCKLWD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x61}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPUNPCKLDQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x62}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPUNPCKLQDQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRLDQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x73}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSLLDQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x73}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVLHPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x16}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VMOVHLPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x12}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPALIGNR", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPBLENDW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VROUNDPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VROUNDPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VROUNDPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VROUNDPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VROUNDSD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VROUNDSS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xa}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VSHUFPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xc6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VSHUFPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xc6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VSHUFPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xc6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VSHUFPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xc6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VRCPPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x53}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VRCPPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x53}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VRCPSS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x53}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 2, Avx2Gather: false},
&Insn{Name: "VRSQRTPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x52}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VRSQRTPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x52}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VRSQRTSS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x52}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 2, Avx2Gather: false},
&Insn{Name: "VSQRTPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x51}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VSQRTPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x51}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VSQRTPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x51}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VSQRTPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x51}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VSQRTSD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x51}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "VSQRTSS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x51}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 2, Avx2Gather: false},
&Insn{Name: "VUNPCKHPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x15}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VUNPCKHPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x15}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VUNPCKHPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x15}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VUNPCKHPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x15}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VSUBPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VSUBPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VSUBPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VSUBPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VSUBSD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "VSUBSS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 2, Avx2Gather: false},
&Insn{Name: "VMULPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x59}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMULPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x59}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMULPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x59}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VMULPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x59}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VMULSD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x59}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "VMULSS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x59}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 2, Avx2Gather: false},
&Insn{Name: "VORPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x56}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VORPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x56}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VORPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x56}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VORPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x56}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPMAXSB", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x3c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMAXSW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xee}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMAXSD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x3d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMAXUB", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xde}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMAXUW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x3e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMAXUD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x3f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMINSB", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x38}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMINSW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xea}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMINSD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x39}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMINUB", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xda}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMINUW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x3a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMINUD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x3b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMADDWD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xf5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMADDUBSW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x4}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMPSADBW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x42}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSLLW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x71}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSLLD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x72}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSLLQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x73}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRAW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x71}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRAD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x72}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRLW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x71}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRLD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x72}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRLQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x73}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VUCOMISD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x2e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VUCOMISS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x2e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VUNPCKLPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x14}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VUNPCKLPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x14}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VUNPCKLPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x14}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VUNPCKLPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x14}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VXORPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x57}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VXORPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x57}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VXORPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x57}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VXORPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x57}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VMOVSS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x10}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: true, VexP: 2, Avx2Gather: false},
&Insn{Name: "VMOVSS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x10}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 2, Avx2Gather: false},
&Insn{Name: "VMOVSS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x11}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: true, VexP: 2, Avx2Gather: false},
&Insn{Name: "VMOVSS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x11}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 2, Avx2Gather: false},
&Insn{Name: "VMOVSD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x10}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: true, VexP: 3, Avx2Gather: false},
&Insn{Name: "VMOVSD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x10}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "VMOVSD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x11}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: true, VexP: 3, Avx2Gather: false},
&Insn{Name: "VMOVSD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x11}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 0, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "VMOVUPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x10}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVUPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x11}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVUPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x10}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVUPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x11}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVUPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x10}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VMOVUPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x11}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VMOVUPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x10}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VMOVUPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x11}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VMOVLPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x12}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVLPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x13}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVLPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x12}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VMOVLPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x13}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VMOVHPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x16}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVHPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x17}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVHPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x16}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "VMOVHPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x17}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VMOVMSKPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x50}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVMSKPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x50}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVMSKPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x50}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VMOVMSKPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x50}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPMOVMSKB", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMOVSXBW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x20}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMOVSXBD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x21}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMOVSXBQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x22}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMOVSXWD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x23}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMOVSXWQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x24}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMOVSXDQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x25}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMOVZXBW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x30}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMOVZXBD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x31}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMOVZXBQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x32}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMOVZXWD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x33}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMOVZXWQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x34}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMOVZXDQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x35}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPEXTRB", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x14}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPEXTRW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x15}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPEXTRW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xc5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPEXTRQ", Extension: "AVX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x16}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPEXTRD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x16}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPINSRB", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x20}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPINSRW", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xc4}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPINSRD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x22}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPINSRQ", Extension: "AVX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x22}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCMPESTRI", Extension: "AVX", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0x61}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCMPESTRI", Extension: "AVX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x61}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCMPESTRI", Extension: "AVX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x61}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCMPISTRI", Extension: "AVX", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0x63}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCMPISTRI", Extension: "AVX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x63}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCMPISTRI", Extension: "AVX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x63}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCMPESTRM", Extension: "AVX", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0x60}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCMPESTRM", Extension: "AVX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x60}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCMPESTRM", Extension: "AVX", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0x60}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCMPISTRM", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x62}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMASKMOVDQU", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xf7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VLDMXCSR", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xae}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VSTMXCSR", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xae}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VPBLENDVB", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x4c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VBLENDVPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x4b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VBLENDVPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x4b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VBLENDVPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x4a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VBLENDVPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x4a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVNTDQA", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x2a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVNTDQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVNTPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x2b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVNTPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x2b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: -1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VMOVNTDQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVNTPD", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x2b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVNTPS", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x2b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 0, Avx2Gather: false},
&Insn{Name: "VAESKEYGENASSIST", Extension: "AVXAES", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xdf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VAESENC", Extension: "AVXAES", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xdc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VAESENCLAST", Extension: "AVXAES", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xdd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VAESDEC", Extension: "AVXAES", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xde}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VAESDECLAST", Extension: "AVXAES", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xdf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VAESIMC", Extension: "AVXAES", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xdb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCLMULQDQ", Extension: "AVX", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x44}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VCVTPH2PS", Extension: "F16C", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x13}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VCVTPH2PS", Extension: "F16C", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x13}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VCVTPS2PH", Extension: "F16C", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x1d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VCVTPS2PH", Extension: "F16C", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x1d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VGATHERDPD", Extension: "AVX2GATHER", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x92}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: 4, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: true},
&Insn{Name: "VGATHERDPD", Extension: "AVX2GATHER", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x92}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: 4, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: true},
&Insn{Name: "VGATHERDPS", Extension: "AVX2GATHER", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x92}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: 4, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: true},
&Insn{Name: "VGATHERDPS", Extension: "AVX2GATHER", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x92}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: 4, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: true},
&Insn{Name: "VGATHERQPD", Extension: "AVX2GATHER", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x93}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: 4, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: true},
&Insn{Name: "VGATHERQPD", Extension: "AVX2GATHER", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x93}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: 4, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: true},
&Insn{Name: "VGATHERQPS", Extension: "AVX2GATHER", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x93}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: 4, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: true},
&Insn{Name: "VGATHERQPS", Extension: "AVX2GATHER", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x93}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: 4, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: true},
&Insn{Name: "VPGATHERDQ", Extension: "AVX2GATHER", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x90}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: 4, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: true},
&Insn{Name: "VPGATHERDQ", Extension: "AVX2GATHER", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x90}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: 4, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: true},
&Insn{Name: "VPGATHERDD", Extension: "AVX2GATHER", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x90}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: 4, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: true},
&Insn{Name: "VPGATHERDD", Extension: "AVX2GATHER", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x90}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: 4, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: true},
&Insn{Name: "VPGATHERQQ", Extension: "AVX2GATHER", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x91}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: 4, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: true},
&Insn{Name: "VPGATHERQQ", Extension: "AVX2GATHER", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x91}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: 4, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: true},
&Insn{Name: "VPGATHERQD", Extension: "AVX2GATHER", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x91}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: 4, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: true},
&Insn{Name: "VPGATHERQD", Extension: "AVX2GATHER", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x91}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: 4, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: true},
&Insn{Name: "VPABSB", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x1c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPABSW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x1d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPABSD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x1e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPHMINPOSUW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x41}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPACKSSWB", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x63}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPACKSSDW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPACKUSWB", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x67}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPACKUSDW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x2b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSLLW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xf1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSLLD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xf2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSLLQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xf3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRLW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRLD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRLQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRAW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRAD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPADDB", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xfc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPADDW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xfd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPADDD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xfe}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPADDQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd4}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPADDSB", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xec}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPADDSW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xed}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPADDUSB", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xdc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPADDUSW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xdd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPAVGB", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPAVGW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCMPEQB", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x74}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCMPEQW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x75}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCMPEQD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x76}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCMPEQQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x29}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCMPGTB", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x64}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCMPGTW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x65}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCMPGTD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x66}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPCMPGTQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x37}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPHADDW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPHADDD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPHADDSW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPHSUBW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPHSUBD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPHSUBSW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMADDWD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xf5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMADDUBSW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x4}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMAXSB", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x3c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMAXSW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xee}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMAXSD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x3d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMAXUB", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xde}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMAXUW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x3e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMAXUD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x3f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMINSB", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x38}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMINSW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xea}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMINSD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x39}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMINUB", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xda}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMINUW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x3a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMINUD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x3b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMULHUW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe4}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMULHRSW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMULHW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMULLW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMULLD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x40}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMULUDQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xf4}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMULDQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x28}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSADBW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xf6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSHUFB", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSIGNB", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSIGNW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSIGND", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xa}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSUBSB", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSUBSW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSUBUSB", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSUBUSW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSUBB", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xf8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSUBW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xf9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSUBD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xfa}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSUBQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xfb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPUNPCKHBW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x68}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPUNPCKHWD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x69}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPUNPCKHDQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPUNPCKHQDQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPUNPCKLBW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x60}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPUNPCKLWD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x61}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPUNPCKLDQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x62}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPUNPCKLQDQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x6c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPALIGNR", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPBLENDW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xe}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMPSADBW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x42}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPOR", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xeb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPAND", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xdb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPANDN", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xdf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPXOR", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xef}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPBLENDVB", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x4c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMOVMSKB", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xd7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSHUFD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x70}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSHUFHW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x70}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 2, Avx2Gather: false},
&Insn{Name: "VPSHUFLW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x70}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: true, VexP: 3, Avx2Gather: false},
&Insn{Name: "VPSRLDQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x73}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSLLDQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x73}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSLLW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x71}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSLLD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x72}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSLLQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x73}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRAW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x71}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRAD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x72}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRLW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x71}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRLD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x72}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRLQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x73}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x1, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMOVSXBW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x20}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMOVSXBD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x21}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMOVSXBQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x22}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMOVSXWD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x23}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMOVSXWQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x24}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMOVSXDQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x25}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMOVZXBW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x30}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMOVZXBD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x31}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMOVZXBQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x32}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMOVZXWD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x33}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMOVZXWQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x34}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMOVZXDQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x35}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VINSERTI128", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x38}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VEXTRACTI128", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x39}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMASKMOVD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x8c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMASKMOVD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x8c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMASKMOVQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x8c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMASKMOVQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x8c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMASKMOVD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x8e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMASKMOVD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x8e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMASKMOVQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x8e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPMASKMOVQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x8e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPERM2I128", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x46}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPERMQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPERMPD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPERMD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x36}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPERMPS", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x16}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPBLENDD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPBLENDD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPBROADCASTB", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x78}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPBROADCASTB", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x78}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPBROADCASTW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x79}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPBROADCASTW", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x79}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPBROADCASTD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x58}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPBROADCASTD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x58}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPBROADCASTQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x59}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPBROADCASTQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x59}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VBROADCASTSS", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x18}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VBROADCASTSS", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x18}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VBROADCASTSD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x19}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VBROADCASTI128", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x5a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "TZCNT", Extension: "BMI1", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xbc}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BSF", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xbc}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "INVPCID", Extension: "INVPCID", Mode: 1, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x82}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "INVPCID", Extension: "INVPCID", Mode: 2, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0x82}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "LZCNT", Extension: "LZCNT", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xbd}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "BSR", Extension: "BASE", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xbd}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PDEP", Extension: "BMI2", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0xf5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "PDEP", Extension: "BMI2", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "PDEP", Extension: "BMI2", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "PEXT", Extension: "BMI2", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0xf5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 2, Avx2Gather: false},
&Insn{Name: "PEXT", Extension: "BMI2", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 2, Avx2Gather: false},
&Insn{Name: "PEXT", Extension: "BMI2", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 2, Avx2Gather: false},
&Insn{Name: "ANDN", Extension: "BMI1", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0xf2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "ANDN", Extension: "BMI1", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "ANDN", Extension: "BMI1", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf2}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "BLSR", Extension: "BMI1", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0xf3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "BLSR", Extension: "BMI1", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "BLSR", Extension: "BMI1", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "BLSMSK", Extension: "BMI1", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0xf3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "BLSMSK", Extension: "BMI1", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "BLSMSK", Extension: "BMI1", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "BLSI", Extension: "BMI1", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0xf3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "BLSI", Extension: "BMI1", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "BLSI", Extension: "BMI1", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf3}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 3, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "BZHI", Extension: "BMI2", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0xf5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "BZHI", Extension: "BMI2", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "BZHI", Extension: "BMI2", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf5}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "BEXTR", Extension: "BMI1", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0xf7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "BEXTR", Extension: "BMI1", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "BEXTR", Extension: "BMI1", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 0, Avx2Gather: false},
&Insn{Name: "SHLX", Extension: "BMI2", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0xf7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "SHLX", Extension: "BMI2", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "SHLX", Extension: "BMI2", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "SARX", Extension: "BMI2", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0xf7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 2, Avx2Gather: false},
&Insn{Name: "SARX", Extension: "BMI2", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 2, Avx2Gather: false},
&Insn{Name: "SARX", Extension: "BMI2", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 2, Avx2Gather: false},
&Insn{Name: "SHRX", Extension: "BMI2", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0xf7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "SHRX", Extension: "BMI2", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "SHRX", Extension: "BMI2", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "MULX", Extension: "BMI2", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0xf6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "MULX", Extension: "BMI2", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "MULX", Extension: "BMI2", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 3, Avx2Gather: false},
&Insn{Name: "RORX", Extension: "BMI2", Mode: 2, Priv: false, Pseudo: false, Opcode: []uint8{0xf0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: true, VexP: 3, Avx2Gather: false},
&Insn{Name: "RORX", Extension: "BMI2", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: true, VexP: 3, Avx2Gather: false},
&Insn{Name: "RORX", Extension: "BMI2", Mode: 1, Priv: false, Pseudo: false, Opcode: []uint8{0xf0}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x3, VexL: -1, VexNoR: true, VexP: 3, Avx2Gather: false},
&Insn{Name: "VPSLLVD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x47}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSLLVD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x47}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSLLVQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x47}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSLLVQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x47}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRLVD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x45}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRLVD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x45}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRLVQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x45}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRLVQ", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x45}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRAVD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x46}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VPSRAVD", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x46}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMOVNTDQA", Extension: "AVX2", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x2a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: true, VexP: 1, Avx2Gather: false},
&Insn{Name: "VMFUNC", Extension: "VMFUNC", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 2, Rm: 4, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XBEGIN", Extension: "RTM", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xc7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 7, Rm: 0, Srm: false, NoSibDisp: false, Imm: -1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XEND", Extension: "RTM", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 2, Rm: 5, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XABORT", Extension: "RTM", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xc6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 7, Rm: 0, Srm: false, NoSibDisp: false, Imm: 1, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "XTEST", Extension: "RTM", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 2, Rm: 6, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "VFMADD132PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x98}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADD132PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x98}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADD132PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x98}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADD132PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x98}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADD132SD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x99}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADD132SS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x99}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADD213PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xa8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADD213PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xa8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADD213PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xa8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADD213PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xa8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADD213SD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xa9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADD213SS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xa9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADD231PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xb8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADD231PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xb8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADD231PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xb8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADD231PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xb8}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADD231SD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xb9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADD231SS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xb9}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDSUB132PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x96}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDSUB132PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x96}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDSUB213PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xa6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDSUB213PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xa6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDSUB231PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xb6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDSUB231PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xb6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDSUB132PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x96}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDSUB132PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x96}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDSUB213PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xa6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDSUB213PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xa6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDSUB231PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xb6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMADDSUB231PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xb6}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBADD132PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x97}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBADD132PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x97}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBADD213PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xa7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBADD213PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xa7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBADD231PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xb7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBADD231PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xb7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBADD132PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x97}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBADD132PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x97}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBADD213PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xa7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBADD213PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xa7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBADD231PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xb7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUBADD231PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xb7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUB132PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUB132PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUB132PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUB132PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9a}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUB132SD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUB132SS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9b}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUB213PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xaa}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUB213PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xaa}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUB213PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xaa}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUB213PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xaa}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUB213SD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xab}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUB213SS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xab}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUB231PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xba}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUB231PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xba}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUB231PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xba}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUB231PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xba}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUB231SD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xbb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFMSUB231SS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xbb}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADD132PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADD132PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADD132PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADD132PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9c}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADD132SD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADD132SS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9d}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADD213PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xac}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADD213PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xac}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADD213PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xac}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADD213PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xac}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADD213SD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xad}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADD213SS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xad}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADD231PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xbc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADD231PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xbc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADD231PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xbc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADD231PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xbc}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADD231SD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xbd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMADD231SS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xbd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUB132PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUB132PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUB132PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUB132PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9e}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUB132SD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUB132SS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0x9f}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUB213PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xae}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUB213PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xae}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUB213PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xae}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUB213PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xae}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUB213SD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xaf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUB213SS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xaf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUB231PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xbe}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUB231PD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xbe}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUB231PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xbe}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: -1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUB231PS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xbe}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 1, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUB231SD", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xbf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "VFNMSUB231SS", Extension: "FMA", Mode: 3, Priv: false, Pseudo: false, Opcode: []uint8{0xbf}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0xc4, VexMap: 0x2, VexL: 0, VexNoR: false, VexP: 1, Avx2Gather: false},
&Insn{Name: "ADCX", Extension: "BDW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0xf6}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADCX", Extension: "BDW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0xf6}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADOX", Extension: "BDW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0xf6}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: -1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ADOX", Extension: "BDW", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x38, 0xf6}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: -1, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 1, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RDSEED", Extension: "RDSEED", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xc7}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CLAC", Extension: "SMAP", Mode: 15, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 1, Rm: 2, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "STAC", Extension: "SMAP", Mode: 15, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 1, Rm: 3, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ENCLU", Extension: "SGX", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 2, Rm: 7, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "ENCLS", Extension: "SGX", Mode: 15, Priv: true, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 1, Rm: 7, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "RDPKRU", Extension: "PKU", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 5, Rm: 6, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "WRPKRU", Extension: "PKU", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0x1}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: 3, Reg: 5, Rm: 7, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CLWB", Extension: "CLWB", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xae}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 6, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "CLFLUSHOPT", Extension: "CLFLUSHOPT", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xae}, Prefix: []uint8{0x66}, Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 7, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PTWRITE", Extension: "PT", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xae}, Prefix: []uint8{0xf3}, Suffix: []uint8(nil), Modrm: true, Mod: -1, Reg: 4, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: true, No66Prefix: true, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
&Insn{Name: "PREFETCHWT1", Extension: "PREFETCHWT1", Mode: 15, Priv: false, Pseudo: false, Opcode: []uint8{0xf, 0xd}, Prefix: []uint8(nil), Suffix: []uint8(nil), Modrm: true, Mod: -3, Reg: 2, Rm: -1, Srm: false, NoSibDisp: false, Imm: 0, Imm2: 0, NoRepPrefix: false, No66Prefix: false, Rexw: 0, Mem32: false, Mem16: false, Vex: 0x0, VexMap: 0x0, VexL: 0, VexNoR: false, VexP: -1, Avx2Gather: false},
}