d "cmp2.b (a0), d0" 00d00000 0x0 (seq (set bounds_addr (cast 32 false (var a0))) (set lower (cast 32 (msb (loadw 0 8 (var bounds_addr))) (loadw 0 8 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1)))) (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1))))) (set rn (cast 32 (msb (cast 8 false (var d0))) (cast 8 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "chk2.b (a0), d0" 00d00800 0x0 (seq (set bounds_addr (cast 32 false (var a0))) (set lower (cast 32 (msb (loadw 0 8 (var bounds_addr))) (loadw 0 8 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1)))) (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1))))) (set rn (cast 32 (msb (cast 8 false (var d0))) (cast 8 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))) (branch (! (is_zero (var outside))) (seq (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty))
d "cmp2.b 0x1(a0), d0" 00e800000001 0x0 (seq (set bounds_addr (cast 32 false (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))))) (set lower (cast 32 (msb (loadw 0 8 (var bounds_addr))) (loadw 0 8 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1)))) (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1))))) (set rn (cast 32 (msb (cast 8 false (var d0))) (cast 8 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "chk2.b 0xfff(a0), d0" 00e808000fff 0x0 (seq (set bounds_addr (cast 32 false (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0xfff))))) (set lower (cast 32 (msb (loadw 0 8 (var bounds_addr))) (loadw 0 8 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1)))) (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1))))) (set rn (cast 32 (msb (cast 8 false (var d0))) (cast 8 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))) (branch (! (is_zero (var outside))) (seq (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty))
d "cmp2.b 0x1(a0, d0.w), d0" 00f000000001 0x0 (seq (set bounds_addr (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set lower (cast 32 (msb (loadw 0 8 (var bounds_addr))) (loadw 0 8 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1)))) (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1))))) (set rn (cast 32 (msb (cast 8 false (var d0))) (cast 8 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "chk2.b ([0x10001fff], 0x20002fff), d0" 00f008000fff10001fff20002fff 0x0 (seq (set bounds_addr (cast 32 false (+ (+ (loadw 0 32 (+ (bv 32 0x0) (bv 32 0x10001fff))) (bv 32 0x0)) (bv 32 0x20002fff)))) (set lower (cast 32 (msb (loadw 0 8 (var bounds_addr))) (loadw 0 8 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1)))) (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1))))) (set rn (cast 32 (msb (cast 8 false (var d0))) (cast 8 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))) (branch (! (is_zero (var outside))) (seq (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty))
d "cmp2.b ([0x20002fff], 0x30003fff), d1" 00f010001fff20002fff30003fff 0x0 (seq (set bounds_addr (cast 32 false (+ (+ (loadw 0 32 (+ (bv 32 0x0) (bv 32 0x20002fff))) (bv 32 0x0)) (bv 32 0x30003fff)))) (set lower (cast 32 (msb (loadw 0 8 (var bounds_addr))) (loadw 0 8 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1)))) (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1))))) (set rn (cast 32 (msb (cast 8 false (var d1))) (cast 8 false (var d1)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "cmp2.b (a0, a0.w), a0" 00f080008100 0x0 (seq (set bounds_addr (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x0))) (cast 32 (msb (cast 16 false (var a0))) (cast 16 false (var a0)))))) (set lower (cast 32 (msb (loadw 0 8 (var bounds_addr))) (loadw 0 8 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1)))) (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1))))) (set rn (var a0)) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "cmp2.b 0x1.w, d0" 00f800000001 0x0 (seq (set bounds_addr (cast 32 false (bv 32 0x1))) (set lower (cast 32 (msb (loadw 0 8 (var bounds_addr))) (loadw 0 8 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1)))) (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1))))) (set rn (cast 32 (msb (cast 8 false (var d0))) (cast 8 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "chk2.b 0xfff.w, d0" 00f808000fff 0x0 (seq (set bounds_addr (cast 32 false (bv 32 0xfff))) (set lower (cast 32 (msb (loadw 0 8 (var bounds_addr))) (loadw 0 8 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1)))) (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1))))) (set rn (cast 32 (msb (cast 8 false (var d0))) (cast 8 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))) (branch (! (is_zero (var outside))) (seq (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty))
d "cmp2.b 0x10010.l, d0" 00f9000000010010 0x0 (seq (set bounds_addr (cast 32 false (bv 32 0x10010))) (set lower (cast 32 (msb (loadw 0 8 (var bounds_addr))) (loadw 0 8 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1)))) (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1))))) (set rn (cast 32 (msb (cast 8 false (var d0))) (cast 8 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "chk2.b 0xfff1000.l, d0" 00f908000fff1000 0x0 (seq (set bounds_addr (cast 32 false (bv 32 0xfff1000))) (set lower (cast 32 (msb (loadw 0 8 (var bounds_addr))) (loadw 0 8 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1)))) (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1))))) (set rn (cast 32 (msb (cast 8 false (var d0))) (cast 8 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))) (branch (! (is_zero (var outside))) (seq (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty))
d "cmp2.b 0x5(pc), d0" 00fa00000001 0x0 (seq (set bounds_addr (cast 32 false (bv 32 0x5))) (set lower (cast 32 (msb (loadw 0 8 (var bounds_addr))) (loadw 0 8 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1)))) (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1))))) (set rn (cast 32 (msb (cast 8 false (var d0))) (cast 8 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "chk2.b 0x1003(pc), d0" 00fa08000fff 0x0 (seq (set bounds_addr (cast 32 false (bv 32 0x1003))) (set lower (cast 32 (msb (loadw 0 8 (var bounds_addr))) (loadw 0 8 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1)))) (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1))))) (set rn (cast 32 (msb (cast 8 false (var d0))) (cast 8 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))) (branch (! (is_zero (var outside))) (seq (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty))
d "cmp2.b 0x5(pc, d0.w), d0" 00fb00000001 0x0 (seq (set bounds_addr (cast 32 false (+ (bv 32 0x5) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set lower (cast 32 (msb (loadw 0 8 (var bounds_addr))) (loadw 0 8 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1)))) (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1))))) (set rn (cast 32 (msb (cast 8 false (var d0))) (cast 8 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "chk2.b ([0x10002003], 0x20002fff), d0" 00fb08000fff10001fff20002fff 0x0 (seq (set bounds_addr (cast 32 false (+ (+ (loadw 0 32 (+ (bv 32 0x0) (bv 32 0x10002001))) (bv 32 0x0)) (bv 32 0x20002fff)))) (set lower (cast 32 (msb (loadw 0 8 (var bounds_addr))) (loadw 0 8 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1)))) (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1))))) (set rn (cast 32 (msb (cast 8 false (var d0))) (cast 8 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))) (branch (! (is_zero (var outside))) (seq (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty))
d "cmp2.b ([0x20003003], 0x30003fff), d1" 00fb10001fff20002fff30003fff 0x0 (seq (set bounds_addr (cast 32 false (+ (+ (loadw 0 32 (+ (bv 32 0x0) (bv 32 0x20003001))) (bv 32 0x0)) (bv 32 0x30003fff)))) (set lower (cast 32 (msb (loadw 0 8 (var bounds_addr))) (loadw 0 8 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1)))) (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1))))) (set rn (cast 32 (msb (cast 8 false (var d1))) (cast 8 false (var d1)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "cmp2.b 0x4(pc, a0.w), a0" 00fb80008100 0x0 (seq (set bounds_addr (cast 32 false (+ (bv 32 0x4) (cast 32 (msb (cast 16 false (var a0))) (cast 16 false (var a0)))))) (set lower (cast 32 (msb (loadw 0 8 (var bounds_addr))) (loadw 0 8 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1)))) (loadw 0 8 (+ (var bounds_addr) (bv 32 0x1))))) (set rn (var a0)) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "cmp2.w (a0), d0" 02d00000 0x0 (seq (set bounds_addr (cast 32 false (var a0))) (set lower (cast 32 (msb (loadw 0 16 (var bounds_addr))) (loadw 0 16 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2)))) (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2))))) (set rn (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "chk2.w (a0), d0" 02d00800 0x0 (seq (set bounds_addr (cast 32 false (var a0))) (set lower (cast 32 (msb (loadw 0 16 (var bounds_addr))) (loadw 0 16 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2)))) (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2))))) (set rn (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))) (branch (! (is_zero (var outside))) (seq (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty))
d "cmp2.w 0x1(a0), d0" 02e800000001 0x0 (seq (set bounds_addr (cast 32 false (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))))) (set lower (cast 32 (msb (loadw 0 16 (var bounds_addr))) (loadw 0 16 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2)))) (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2))))) (set rn (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "chk2.w 0xfff(a0), d0" 02e808000fff 0x0 (seq (set bounds_addr (cast 32 false (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0xfff))))) (set lower (cast 32 (msb (loadw 0 16 (var bounds_addr))) (loadw 0 16 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2)))) (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2))))) (set rn (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))) (branch (! (is_zero (var outside))) (seq (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty))
d "cmp2.w 0x1(a0, d0.w), d0" 02f000000001 0x0 (seq (set bounds_addr (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set lower (cast 32 (msb (loadw 0 16 (var bounds_addr))) (loadw 0 16 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2)))) (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2))))) (set rn (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "chk2.w ([0x10001fff], 0x20002fff), d0" 02f008000fff10001fff20002fff 0x0 (seq (set bounds_addr (cast 32 false (+ (+ (loadw 0 32 (+ (bv 32 0x0) (bv 32 0x10001fff))) (bv 32 0x0)) (bv 32 0x20002fff)))) (set lower (cast 32 (msb (loadw 0 16 (var bounds_addr))) (loadw 0 16 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2)))) (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2))))) (set rn (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))) (branch (! (is_zero (var outside))) (seq (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty))
d "cmp2.w ([0x20002fff], 0x30003fff), d1" 02f010001fff20002fff30003fff 0x0 (seq (set bounds_addr (cast 32 false (+ (+ (loadw 0 32 (+ (bv 32 0x0) (bv 32 0x20002fff))) (bv 32 0x0)) (bv 32 0x30003fff)))) (set lower (cast 32 (msb (loadw 0 16 (var bounds_addr))) (loadw 0 16 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2)))) (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2))))) (set rn (cast 32 (msb (cast 16 false (var d1))) (cast 16 false (var d1)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "cmp2.w (a0, a0.w), a0" 02f080008100 0x0 (seq (set bounds_addr (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x0))) (cast 32 (msb (cast 16 false (var a0))) (cast 16 false (var a0)))))) (set lower (cast 32 (msb (loadw 0 16 (var bounds_addr))) (loadw 0 16 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2)))) (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2))))) (set rn (var a0)) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "cmp2.w 0x1.w, d0" 02f800000001 0x0 (seq (set bounds_addr (cast 32 false (bv 32 0x1))) (set lower (cast 32 (msb (loadw 0 16 (var bounds_addr))) (loadw 0 16 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2)))) (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2))))) (set rn (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "chk2.w 0xfff.w, d0" 02f808000fff 0x0 (seq (set bounds_addr (cast 32 false (bv 32 0xfff))) (set lower (cast 32 (msb (loadw 0 16 (var bounds_addr))) (loadw 0 16 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2)))) (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2))))) (set rn (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))) (branch (! (is_zero (var outside))) (seq (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty))
d "cmp2.w 0x10010.l, d0" 02f9000000010010 0x0 (seq (set bounds_addr (cast 32 false (bv 32 0x10010))) (set lower (cast 32 (msb (loadw 0 16 (var bounds_addr))) (loadw 0 16 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2)))) (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2))))) (set rn (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "chk2.w 0xfff1000.l, d0" 02f908000fff1000 0x0 (seq (set bounds_addr (cast 32 false (bv 32 0xfff1000))) (set lower (cast 32 (msb (loadw 0 16 (var bounds_addr))) (loadw 0 16 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2)))) (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2))))) (set rn (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))) (branch (! (is_zero (var outside))) (seq (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty))
d "cmp2.w 0x5(pc), d0" 02fa00000001 0x0 (seq (set bounds_addr (cast 32 false (bv 32 0x5))) (set lower (cast 32 (msb (loadw 0 16 (var bounds_addr))) (loadw 0 16 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2)))) (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2))))) (set rn (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "chk2.w 0x1003(pc), d0" 02fa08000fff 0x0 (seq (set bounds_addr (cast 32 false (bv 32 0x1003))) (set lower (cast 32 (msb (loadw 0 16 (var bounds_addr))) (loadw 0 16 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2)))) (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2))))) (set rn (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))) (branch (! (is_zero (var outside))) (seq (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty))
d "cmp2.w 0x5(pc, d0.w), d0" 02fb00000001 0x0 (seq (set bounds_addr (cast 32 false (+ (bv 32 0x5) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set lower (cast 32 (msb (loadw 0 16 (var bounds_addr))) (loadw 0 16 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2)))) (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2))))) (set rn (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "chk2.w ([0x10002003], 0x20002fff), d0" 02fb08000fff10001fff20002fff 0x0 (seq (set bounds_addr (cast 32 false (+ (+ (loadw 0 32 (+ (bv 32 0x0) (bv 32 0x10002001))) (bv 32 0x0)) (bv 32 0x20002fff)))) (set lower (cast 32 (msb (loadw 0 16 (var bounds_addr))) (loadw 0 16 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2)))) (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2))))) (set rn (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))) (branch (! (is_zero (var outside))) (seq (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty))
d "cmp2.w ([0x20003003], 0x30003fff), d1" 02fb10001fff20002fff30003fff 0x0 (seq (set bounds_addr (cast 32 false (+ (+ (loadw 0 32 (+ (bv 32 0x0) (bv 32 0x20003001))) (bv 32 0x0)) (bv 32 0x30003fff)))) (set lower (cast 32 (msb (loadw 0 16 (var bounds_addr))) (loadw 0 16 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2)))) (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2))))) (set rn (cast 32 (msb (cast 16 false (var d1))) (cast 16 false (var d1)))) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "cmp2.w 0x4(pc, a0.w), a0" 02fb80008100 0x0 (seq (set bounds_addr (cast 32 false (+ (bv 32 0x4) (cast 32 (msb (cast 16 false (var a0))) (cast 16 false (var a0)))))) (set lower (cast 32 (msb (loadw 0 16 (var bounds_addr))) (loadw 0 16 (var bounds_addr)))) (set upper (cast 32 (msb (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2)))) (loadw 0 16 (+ (var bounds_addr) (bv 32 0x2))))) (set rn (var a0)) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "cmp2.l (a0), d0" 04d00000 0x0 (seq (set bounds_addr (cast 32 false (var a0))) (set lower (loadw 0 32 (var bounds_addr))) (set upper (loadw 0 32 (+ (var bounds_addr) (bv 32 0x4)))) (set rn (var d0)) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "chk2.l (a0), d0" 04d00800 0x0 (seq (set bounds_addr (cast 32 false (var a0))) (set lower (loadw 0 32 (var bounds_addr))) (set upper (loadw 0 32 (+ (var bounds_addr) (bv 32 0x4)))) (set rn (var d0)) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))) (branch (! (is_zero (var outside))) (seq (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty))
d "cmp2.l 0x1(a0), d0" 04e800000001 0x0 (seq (set bounds_addr (cast 32 false (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))))) (set lower (loadw 0 32 (var bounds_addr))) (set upper (loadw 0 32 (+ (var bounds_addr) (bv 32 0x4)))) (set rn (var d0)) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "chk2.l 0xfff(a0), d0" 04e808000fff 0x0 (seq (set bounds_addr (cast 32 false (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0xfff))))) (set lower (loadw 0 32 (var bounds_addr))) (set upper (loadw 0 32 (+ (var bounds_addr) (bv 32 0x4)))) (set rn (var d0)) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))) (branch (! (is_zero (var outside))) (seq (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty))
d "cmp2.l 0x1(a0, d0.w), d0" 04f000000001 0x0 (seq (set bounds_addr (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set lower (loadw 0 32 (var bounds_addr))) (set upper (loadw 0 32 (+ (var bounds_addr) (bv 32 0x4)))) (set rn (var d0)) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "chk2.l ([0x10001fff], 0x20002fff), d0" 04f008000fff10001fff20002fff 0x0 (seq (set bounds_addr (cast 32 false (+ (+ (loadw 0 32 (+ (bv 32 0x0) (bv 32 0x10001fff))) (bv 32 0x0)) (bv 32 0x20002fff)))) (set lower (loadw 0 32 (var bounds_addr))) (set upper (loadw 0 32 (+ (var bounds_addr) (bv 32 0x4)))) (set rn (var d0)) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))) (branch (! (is_zero (var outside))) (seq (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty))
d "cmp2.l ([0x20002fff], 0x30003fff), d1" 04f010001fff20002fff30003fff 0x0 (seq (set bounds_addr (cast 32 false (+ (+ (loadw 0 32 (+ (bv 32 0x0) (bv 32 0x20002fff))) (bv 32 0x0)) (bv 32 0x30003fff)))) (set lower (loadw 0 32 (var bounds_addr))) (set upper (loadw 0 32 (+ (var bounds_addr) (bv 32 0x4)))) (set rn (var d1)) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "cmp2.l (a0, a0.w), a0" 04f080008100 0x0 (seq (set bounds_addr (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x0))) (cast 32 (msb (cast 16 false (var a0))) (cast 16 false (var a0)))))) (set lower (loadw 0 32 (var bounds_addr))) (set upper (loadw 0 32 (+ (var bounds_addr) (bv 32 0x4)))) (set rn (var a0)) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "cmp2.l 0x1.w, d0" 04f800000001 0x0 (seq (set bounds_addr (cast 32 false (bv 32 0x1))) (set lower (loadw 0 32 (var bounds_addr))) (set upper (loadw 0 32 (+ (var bounds_addr) (bv 32 0x4)))) (set rn (var d0)) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "chk2.l 0xfff.w, d0" 04f808000fff 0x0 (seq (set bounds_addr (cast 32 false (bv 32 0xfff))) (set lower (loadw 0 32 (var bounds_addr))) (set upper (loadw 0 32 (+ (var bounds_addr) (bv 32 0x4)))) (set rn (var d0)) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))) (branch (! (is_zero (var outside))) (seq (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty))
d "cmp2.l 0x10010.l, d0" 04f9000000010010 0x0 (seq (set bounds_addr (cast 32 false (bv 32 0x10010))) (set lower (loadw 0 32 (var bounds_addr))) (set upper (loadw 0 32 (+ (var bounds_addr) (bv 32 0x4)))) (set rn (var d0)) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "chk2.l 0xfff1000.l, d0" 04f908000fff1000 0x0 (seq (set bounds_addr (cast 32 false (bv 32 0xfff1000))) (set lower (loadw 0 32 (var bounds_addr))) (set upper (loadw 0 32 (+ (var bounds_addr) (bv 32 0x4)))) (set rn (var d0)) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))) (branch (! (is_zero (var outside))) (seq (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty))
d "cmp2.l 0x5(pc), d0" 04fa00000001 0x0 (seq (set bounds_addr (cast 32 false (bv 32 0x5))) (set lower (loadw 0 32 (var bounds_addr))) (set upper (loadw 0 32 (+ (var bounds_addr) (bv 32 0x4)))) (set rn (var d0)) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "chk2.l 0x1003(pc), d0" 04fa08000fff 0x0 (seq (set bounds_addr (cast 32 false (bv 32 0x1003))) (set lower (loadw 0 32 (var bounds_addr))) (set upper (loadw 0 32 (+ (var bounds_addr) (bv 32 0x4)))) (set rn (var d0)) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))) (branch (! (is_zero (var outside))) (seq (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty))
d "cmp2.l 0x5(pc, d0.w), d0" 04fb00000001 0x0 (seq (set bounds_addr (cast 32 false (+ (bv 32 0x5) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set lower (loadw 0 32 (var bounds_addr))) (set upper (loadw 0 32 (+ (var bounds_addr) (bv 32 0x4)))) (set rn (var d0)) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "chk2.l ([0x10002003], 0x20002fff), d0" 04fb08000fff10001fff20002fff 0x0 (seq (set bounds_addr (cast 32 false (+ (+ (loadw 0 32 (+ (bv 32 0x0) (bv 32 0x10002001))) (bv 32 0x0)) (bv 32 0x20002fff)))) (set lower (loadw 0 32 (var bounds_addr))) (set upper (loadw 0 32 (+ (var bounds_addr) (bv 32 0x4)))) (set rn (var d0)) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))) (branch (! (is_zero (var outside))) (seq (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty))
d "cmp2.l ([0x20003003], 0x30003fff), d1" 04fb10001fff20002fff30003fff 0x0 (seq (set bounds_addr (cast 32 false (+ (+ (loadw 0 32 (+ (bv 32 0x0) (bv 32 0x20003001))) (bv 32 0x0)) (bv 32 0x30003fff)))) (set lower (loadw 0 32 (var bounds_addr))) (set upper (loadw 0 32 (+ (var bounds_addr) (bv 32 0x4)))) (set rn (var d1)) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "cmp2.l 0x4(pc, a0.w), a0" 04fb80008100 0x0 (seq (set bounds_addr (cast 32 false (+ (bv 32 0x4) (cast 32 (msb (cast 16 false (var a0))) (cast 16 false (var a0)))))) (set lower (loadw 0 32 (var bounds_addr))) (set upper (loadw 0 32 (+ (var bounds_addr) (bv 32 0x4)))) (set rn (var a0)) (set outside (ite (|| (&& (sle (var lower) (var upper)) (|| (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower)))) (! (sle (var rn) (var upper))))) (&& (! (sle (var lower) (var upper))) (&& (! (sle (var rn) (var upper))) (&& (sle (var rn) (var lower)) (! (== (var rn) (var lower))))))) (bv 1 0x1) (bv 1 0x0))) (set equal (ite (|| (== (var rn) (var lower)) (== (var rn) (var upper))) (bv 1 0x1) (bv 1 0x0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xfa)) (bv 8 0xfb)) (<< (ite (! (is_zero (var equal))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfe)) (<< (ite (! (is_zero (var outside))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)))))))
d "rtm d0" 06c0 0x0 (seq (set frame (var a7)) (set frame_info (loadw 0 16 (var frame))) (set ccr_arg (loadw 0 16 (+ (var frame) (bv 32 0x2)))) (set arg_count (cast 32 false (cast 8 false (var ccr_arg)))) (set target (loadw 0 32 (+ (var frame) (bv 32 0xc)))) (set module_data (loadw 0 32 (+ (var frame) (bv 32 0x10)))) (branch (is_zero (& (var frame_info) (bv 16 0xff00))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (>> (var ccr_arg) (bv 8 0x8) false))))) (set d0 (cast 32 false (var module_data))) (set a7 (cast 32 false (+ (+ (var frame) (bv 32 0x18)) (var arg_count)))) (jmp (var target))) (goto m68k_rtm)))
d "callm 0x0, (a0)" 06d00000 0x0 (seq (set callm_count (bv 32 0x0)) (set callm_addr (cast 32 false (var a0))) (set callm_frame_info (loadw 0 16 (var callm_addr))) (set callm_entry (loadw 0 32 (+ (var callm_addr) (bv 32 0x4)))) (set callm_data (loadw 0 32 (+ (var callm_addr) (bv 32 0x8)))) (set callm_entry_word (loadw 0 16 (var callm_entry))) (set callm_reg_code (cast 32 false (>> (var callm_entry_word) (bv 8 0xc) false))) (set callm_frame (- (var a7) (bv 32 0x18))) (branch (is_zero (& (var callm_frame_info) (bv 16 0xff00))) (seq (branch (== (var callm_reg_code) (bv 32 0x0)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d0)) (branch (== (var callm_reg_code) (bv 32 0x1)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d1)) (branch (== (var callm_reg_code) (bv 32 0x2)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d2)) (branch (== (var callm_reg_code) (bv 32 0x3)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d3)) (branch (== (var callm_reg_code) (bv 32 0x4)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d4)) (branch (== (var callm_reg_code) (bv 32 0x5)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d5)) (branch (== (var callm_reg_code) (bv 32 0x6)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d6)) (branch (== (var callm_reg_code) (bv 32 0x7)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d7)) (branch (== (var callm_reg_code) (bv 32 0x8)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a0)) (branch (== (var callm_reg_code) (bv 32 0x9)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a1)) (branch (== (var callm_reg_code) (bv 32 0xa)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a2)) (branch (== (var callm_reg_code) (bv 32 0xb)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a3)) (branch (== (var callm_reg_code) (bv 32 0xc)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a4)) (branch (== (var callm_reg_code) (bv 32 0xd)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a5)) (branch (== (var callm_reg_code) (bv 32 0xe)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a6)) (branch (== (var callm_reg_code) (bv 32 0xf)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a7)) empty)))))))))))))))) (storew 0 (var callm_frame) (cast 16 false (var callm_frame_info))) (set callm_ccr_arg (| (<< (cast 16 false (cast 8 false (var sr))) (bv 8 0x8) false) (cast 16 false (var callm_count)))) (storew 0 (+ (var callm_frame) (bv 32 0x2)) (cast 16 false (var callm_ccr_arg))) (storew 0 (+ (var callm_frame) (bv 32 0x4)) (cast 32 false (var callm_addr))) (storew 0 (+ (var callm_frame) (bv 32 0x8)) (var a7)) (storew 0 (+ (var callm_frame) (bv 32 0xc)) (bv 32 0x4)) (storew 0 (+ (var callm_frame) (bv 32 0x14)) (bv 32 0x0)) (set a7 (cast 32 false (var callm_frame))) (branch (== (var callm_reg_code) (bv 32 0x0)) (set d0 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x1)) (set d1 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x2)) (set d2 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x3)) (set d3 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x4)) (set d4 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x5)) (set d5 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x6)) (set d6 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x7)) (set d7 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x8)) (set a0 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x9)) (set a1 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xa)) (set a2 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xb)) (set a3 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xc)) (set a4 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xd)) (set a5 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xe)) (set a6 (cast 32 false (var callm_data))) empty))))))))))))))) (jmp (+ (var callm_entry) (bv 32 0x2)))) (goto m68k_callm)))
d "callm 0x0, 0x1(a0)" 06e800000001 0x0 (seq (set callm_count (bv 32 0x0)) (set callm_addr (cast 32 false (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))))) (set callm_frame_info (loadw 0 16 (var callm_addr))) (set callm_entry (loadw 0 32 (+ (var callm_addr) (bv 32 0x4)))) (set callm_data (loadw 0 32 (+ (var callm_addr) (bv 32 0x8)))) (set callm_entry_word (loadw 0 16 (var callm_entry))) (set callm_reg_code (cast 32 false (>> (var callm_entry_word) (bv 8 0xc) false))) (set callm_frame (- (var a7) (bv 32 0x18))) (branch (is_zero (& (var callm_frame_info) (bv 16 0xff00))) (seq (branch (== (var callm_reg_code) (bv 32 0x0)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d0)) (branch (== (var callm_reg_code) (bv 32 0x1)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d1)) (branch (== (var callm_reg_code) (bv 32 0x2)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d2)) (branch (== (var callm_reg_code) (bv 32 0x3)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d3)) (branch (== (var callm_reg_code) (bv 32 0x4)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d4)) (branch (== (var callm_reg_code) (bv 32 0x5)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d5)) (branch (== (var callm_reg_code) (bv 32 0x6)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d6)) (branch (== (var callm_reg_code) (bv 32 0x7)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d7)) (branch (== (var callm_reg_code) (bv 32 0x8)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a0)) (branch (== (var callm_reg_code) (bv 32 0x9)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a1)) (branch (== (var callm_reg_code) (bv 32 0xa)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a2)) (branch (== (var callm_reg_code) (bv 32 0xb)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a3)) (branch (== (var callm_reg_code) (bv 32 0xc)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a4)) (branch (== (var callm_reg_code) (bv 32 0xd)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a5)) (branch (== (var callm_reg_code) (bv 32 0xe)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a6)) (branch (== (var callm_reg_code) (bv 32 0xf)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a7)) empty)))))))))))))))) (storew 0 (var callm_frame) (cast 16 false (var callm_frame_info))) (set callm_ccr_arg (| (<< (cast 16 false (cast 8 false (var sr))) (bv 8 0x8) false) (cast 16 false (var callm_count)))) (storew 0 (+ (var callm_frame) (bv 32 0x2)) (cast 16 false (var callm_ccr_arg))) (storew 0 (+ (var callm_frame) (bv 32 0x4)) (cast 32 false (var callm_addr))) (storew 0 (+ (var callm_frame) (bv 32 0x8)) (var a7)) (storew 0 (+ (var callm_frame) (bv 32 0xc)) (bv 32 0x6)) (storew 0 (+ (var callm_frame) (bv 32 0x14)) (bv 32 0x0)) (set a7 (cast 32 false (var callm_frame))) (branch (== (var callm_reg_code) (bv 32 0x0)) (set d0 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x1)) (set d1 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x2)) (set d2 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x3)) (set d3 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x4)) (set d4 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x5)) (set d5 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x6)) (set d6 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x7)) (set d7 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x8)) (set a0 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x9)) (set a1 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xa)) (set a2 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xb)) (set a3 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xc)) (set a4 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xd)) (set a5 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xe)) (set a6 (cast 32 false (var callm_data))) empty))))))))))))))) (jmp (+ (var callm_entry) (bv 32 0x2)))) (goto m68k_callm)))
d "callm 0x0, 0x1(a0, d0.w)" 06f000000001 0x0 (seq (set callm_count (bv 32 0x0)) (set callm_addr (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set callm_frame_info (loadw 0 16 (var callm_addr))) (set callm_entry (loadw 0 32 (+ (var callm_addr) (bv 32 0x4)))) (set callm_data (loadw 0 32 (+ (var callm_addr) (bv 32 0x8)))) (set callm_entry_word (loadw 0 16 (var callm_entry))) (set callm_reg_code (cast 32 false (>> (var callm_entry_word) (bv 8 0xc) false))) (set callm_frame (- (var a7) (bv 32 0x18))) (branch (is_zero (& (var callm_frame_info) (bv 16 0xff00))) (seq (branch (== (var callm_reg_code) (bv 32 0x0)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d0)) (branch (== (var callm_reg_code) (bv 32 0x1)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d1)) (branch (== (var callm_reg_code) (bv 32 0x2)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d2)) (branch (== (var callm_reg_code) (bv 32 0x3)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d3)) (branch (== (var callm_reg_code) (bv 32 0x4)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d4)) (branch (== (var callm_reg_code) (bv 32 0x5)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d5)) (branch (== (var callm_reg_code) (bv 32 0x6)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d6)) (branch (== (var callm_reg_code) (bv 32 0x7)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d7)) (branch (== (var callm_reg_code) (bv 32 0x8)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a0)) (branch (== (var callm_reg_code) (bv 32 0x9)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a1)) (branch (== (var callm_reg_code) (bv 32 0xa)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a2)) (branch (== (var callm_reg_code) (bv 32 0xb)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a3)) (branch (== (var callm_reg_code) (bv 32 0xc)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a4)) (branch (== (var callm_reg_code) (bv 32 0xd)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a5)) (branch (== (var callm_reg_code) (bv 32 0xe)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a6)) (branch (== (var callm_reg_code) (bv 32 0xf)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a7)) empty)))))))))))))))) (storew 0 (var callm_frame) (cast 16 false (var callm_frame_info))) (set callm_ccr_arg (| (<< (cast 16 false (cast 8 false (var sr))) (bv 8 0x8) false) (cast 16 false (var callm_count)))) (storew 0 (+ (var callm_frame) (bv 32 0x2)) (cast 16 false (var callm_ccr_arg))) (storew 0 (+ (var callm_frame) (bv 32 0x4)) (cast 32 false (var callm_addr))) (storew 0 (+ (var callm_frame) (bv 32 0x8)) (var a7)) (storew 0 (+ (var callm_frame) (bv 32 0xc)) (bv 32 0x6)) (storew 0 (+ (var callm_frame) (bv 32 0x14)) (bv 32 0x0)) (set a7 (cast 32 false (var callm_frame))) (branch (== (var callm_reg_code) (bv 32 0x0)) (set d0 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x1)) (set d1 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x2)) (set d2 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x3)) (set d3 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x4)) (set d4 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x5)) (set d5 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x6)) (set d6 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x7)) (set d7 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x8)) (set a0 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x9)) (set a1 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xa)) (set a2 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xb)) (set a3 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xc)) (set a4 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xd)) (set a5 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xe)) (set a6 (cast 32 false (var callm_data))) empty))))))))))))))) (jmp (+ (var callm_entry) (bv 32 0x2)))) (goto m68k_callm)))
d "callm 0xff, (a0, d0.w)" 06f000ff0100 0x0 (seq (set callm_count (bv 32 0xff)) (set callm_addr (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x0))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set callm_frame_info (loadw 0 16 (var callm_addr))) (set callm_entry (loadw 0 32 (+ (var callm_addr) (bv 32 0x4)))) (set callm_data (loadw 0 32 (+ (var callm_addr) (bv 32 0x8)))) (set callm_entry_word (loadw 0 16 (var callm_entry))) (set callm_reg_code (cast 32 false (>> (var callm_entry_word) (bv 8 0xc) false))) (set callm_frame (- (var a7) (bv 32 0x18))) (branch (is_zero (& (var callm_frame_info) (bv 16 0xff00))) (seq (branch (== (var callm_reg_code) (bv 32 0x0)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d0)) (branch (== (var callm_reg_code) (bv 32 0x1)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d1)) (branch (== (var callm_reg_code) (bv 32 0x2)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d2)) (branch (== (var callm_reg_code) (bv 32 0x3)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d3)) (branch (== (var callm_reg_code) (bv 32 0x4)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d4)) (branch (== (var callm_reg_code) (bv 32 0x5)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d5)) (branch (== (var callm_reg_code) (bv 32 0x6)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d6)) (branch (== (var callm_reg_code) (bv 32 0x7)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d7)) (branch (== (var callm_reg_code) (bv 32 0x8)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a0)) (branch (== (var callm_reg_code) (bv 32 0x9)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a1)) (branch (== (var callm_reg_code) (bv 32 0xa)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a2)) (branch (== (var callm_reg_code) (bv 32 0xb)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a3)) (branch (== (var callm_reg_code) (bv 32 0xc)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a4)) (branch (== (var callm_reg_code) (bv 32 0xd)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a5)) (branch (== (var callm_reg_code) (bv 32 0xe)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a6)) (branch (== (var callm_reg_code) (bv 32 0xf)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a7)) empty)))))))))))))))) (storew 0 (var callm_frame) (cast 16 false (var callm_frame_info))) (set callm_ccr_arg (| (<< (cast 16 false (cast 8 false (var sr))) (bv 8 0x8) false) (cast 16 false (var callm_count)))) (storew 0 (+ (var callm_frame) (bv 32 0x2)) (cast 16 false (var callm_ccr_arg))) (storew 0 (+ (var callm_frame) (bv 32 0x4)) (cast 32 false (var callm_addr))) (storew 0 (+ (var callm_frame) (bv 32 0x8)) (var a7)) (storew 0 (+ (var callm_frame) (bv 32 0xc)) (bv 32 0x6)) (storew 0 (+ (var callm_frame) (bv 32 0x14)) (bv 32 0x0)) (set a7 (cast 32 false (var callm_frame))) (branch (== (var callm_reg_code) (bv 32 0x0)) (set d0 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x1)) (set d1 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x2)) (set d2 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x3)) (set d3 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x4)) (set d4 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x5)) (set d5 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x6)) (set d6 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x7)) (set d7 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x8)) (set a0 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x9)) (set a1 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xa)) (set a2 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xb)) (set a3 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xc)) (set a4 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xd)) (set a5 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xe)) (set a6 (cast 32 false (var callm_data))) empty))))))))))))))) (jmp (+ (var callm_entry) (bv 32 0x2)))) (goto m68k_callm)))
d "callm 0x0, 0x1.w" 06f800000001 0x0 (seq (set callm_count (bv 32 0x0)) (set callm_addr (cast 32 false (bv 32 0x1))) (set callm_frame_info (loadw 0 16 (var callm_addr))) (set callm_entry (loadw 0 32 (+ (var callm_addr) (bv 32 0x4)))) (set callm_data (loadw 0 32 (+ (var callm_addr) (bv 32 0x8)))) (set callm_entry_word (loadw 0 16 (var callm_entry))) (set callm_reg_code (cast 32 false (>> (var callm_entry_word) (bv 8 0xc) false))) (set callm_frame (- (var a7) (bv 32 0x18))) (branch (is_zero (& (var callm_frame_info) (bv 16 0xff00))) (seq (branch (== (var callm_reg_code) (bv 32 0x0)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d0)) (branch (== (var callm_reg_code) (bv 32 0x1)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d1)) (branch (== (var callm_reg_code) (bv 32 0x2)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d2)) (branch (== (var callm_reg_code) (bv 32 0x3)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d3)) (branch (== (var callm_reg_code) (bv 32 0x4)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d4)) (branch (== (var callm_reg_code) (bv 32 0x5)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d5)) (branch (== (var callm_reg_code) (bv 32 0x6)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d6)) (branch (== (var callm_reg_code) (bv 32 0x7)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d7)) (branch (== (var callm_reg_code) (bv 32 0x8)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a0)) (branch (== (var callm_reg_code) (bv 32 0x9)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a1)) (branch (== (var callm_reg_code) (bv 32 0xa)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a2)) (branch (== (var callm_reg_code) (bv 32 0xb)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a3)) (branch (== (var callm_reg_code) (bv 32 0xc)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a4)) (branch (== (var callm_reg_code) (bv 32 0xd)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a5)) (branch (== (var callm_reg_code) (bv 32 0xe)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a6)) (branch (== (var callm_reg_code) (bv 32 0xf)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a7)) empty)))))))))))))))) (storew 0 (var callm_frame) (cast 16 false (var callm_frame_info))) (set callm_ccr_arg (| (<< (cast 16 false (cast 8 false (var sr))) (bv 8 0x8) false) (cast 16 false (var callm_count)))) (storew 0 (+ (var callm_frame) (bv 32 0x2)) (cast 16 false (var callm_ccr_arg))) (storew 0 (+ (var callm_frame) (bv 32 0x4)) (cast 32 false (var callm_addr))) (storew 0 (+ (var callm_frame) (bv 32 0x8)) (var a7)) (storew 0 (+ (var callm_frame) (bv 32 0xc)) (bv 32 0x6)) (storew 0 (+ (var callm_frame) (bv 32 0x14)) (bv 32 0x0)) (set a7 (cast 32 false (var callm_frame))) (branch (== (var callm_reg_code) (bv 32 0x0)) (set d0 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x1)) (set d1 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x2)) (set d2 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x3)) (set d3 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x4)) (set d4 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x5)) (set d5 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x6)) (set d6 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x7)) (set d7 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x8)) (set a0 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x9)) (set a1 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xa)) (set a2 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xb)) (set a3 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xc)) (set a4 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xd)) (set a5 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xe)) (set a6 (cast 32 false (var callm_data))) empty))))))))))))))) (jmp (+ (var callm_entry) (bv 32 0x2)))) (goto m68k_callm)))
d "callm 0x0, 0x10010.l" 06f9000000010010 0x0 (seq (set callm_count (bv 32 0x0)) (set callm_addr (cast 32 false (bv 32 0x10010))) (set callm_frame_info (loadw 0 16 (var callm_addr))) (set callm_entry (loadw 0 32 (+ (var callm_addr) (bv 32 0x4)))) (set callm_data (loadw 0 32 (+ (var callm_addr) (bv 32 0x8)))) (set callm_entry_word (loadw 0 16 (var callm_entry))) (set callm_reg_code (cast 32 false (>> (var callm_entry_word) (bv 8 0xc) false))) (set callm_frame (- (var a7) (bv 32 0x18))) (branch (is_zero (& (var callm_frame_info) (bv 16 0xff00))) (seq (branch (== (var callm_reg_code) (bv 32 0x0)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d0)) (branch (== (var callm_reg_code) (bv 32 0x1)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d1)) (branch (== (var callm_reg_code) (bv 32 0x2)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d2)) (branch (== (var callm_reg_code) (bv 32 0x3)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d3)) (branch (== (var callm_reg_code) (bv 32 0x4)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d4)) (branch (== (var callm_reg_code) (bv 32 0x5)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d5)) (branch (== (var callm_reg_code) (bv 32 0x6)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d6)) (branch (== (var callm_reg_code) (bv 32 0x7)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d7)) (branch (== (var callm_reg_code) (bv 32 0x8)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a0)) (branch (== (var callm_reg_code) (bv 32 0x9)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a1)) (branch (== (var callm_reg_code) (bv 32 0xa)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a2)) (branch (== (var callm_reg_code) (bv 32 0xb)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a3)) (branch (== (var callm_reg_code) (bv 32 0xc)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a4)) (branch (== (var callm_reg_code) (bv 32 0xd)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a5)) (branch (== (var callm_reg_code) (bv 32 0xe)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a6)) (branch (== (var callm_reg_code) (bv 32 0xf)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a7)) empty)))))))))))))))) (storew 0 (var callm_frame) (cast 16 false (var callm_frame_info))) (set callm_ccr_arg (| (<< (cast 16 false (cast 8 false (var sr))) (bv 8 0x8) false) (cast 16 false (var callm_count)))) (storew 0 (+ (var callm_frame) (bv 32 0x2)) (cast 16 false (var callm_ccr_arg))) (storew 0 (+ (var callm_frame) (bv 32 0x4)) (cast 32 false (var callm_addr))) (storew 0 (+ (var callm_frame) (bv 32 0x8)) (var a7)) (storew 0 (+ (var callm_frame) (bv 32 0xc)) (bv 32 0x8)) (storew 0 (+ (var callm_frame) (bv 32 0x14)) (bv 32 0x0)) (set a7 (cast 32 false (var callm_frame))) (branch (== (var callm_reg_code) (bv 32 0x0)) (set d0 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x1)) (set d1 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x2)) (set d2 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x3)) (set d3 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x4)) (set d4 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x5)) (set d5 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x6)) (set d6 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x7)) (set d7 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x8)) (set a0 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x9)) (set a1 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xa)) (set a2 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xb)) (set a3 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xc)) (set a4 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xd)) (set a5 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xe)) (set a6 (cast 32 false (var callm_data))) empty))))))))))))))) (jmp (+ (var callm_entry) (bv 32 0x2)))) (goto m68k_callm)))
d "callm 0x0, 0x5(pc)" 06fa00000001 0x0 (seq (set callm_count (bv 32 0x0)) (set callm_addr (cast 32 false (bv 32 0x5))) (set callm_frame_info (loadw 0 16 (var callm_addr))) (set callm_entry (loadw 0 32 (+ (var callm_addr) (bv 32 0x4)))) (set callm_data (loadw 0 32 (+ (var callm_addr) (bv 32 0x8)))) (set callm_entry_word (loadw 0 16 (var callm_entry))) (set callm_reg_code (cast 32 false (>> (var callm_entry_word) (bv 8 0xc) false))) (set callm_frame (- (var a7) (bv 32 0x18))) (branch (is_zero (& (var callm_frame_info) (bv 16 0xff00))) (seq (branch (== (var callm_reg_code) (bv 32 0x0)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d0)) (branch (== (var callm_reg_code) (bv 32 0x1)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d1)) (branch (== (var callm_reg_code) (bv 32 0x2)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d2)) (branch (== (var callm_reg_code) (bv 32 0x3)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d3)) (branch (== (var callm_reg_code) (bv 32 0x4)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d4)) (branch (== (var callm_reg_code) (bv 32 0x5)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d5)) (branch (== (var callm_reg_code) (bv 32 0x6)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d6)) (branch (== (var callm_reg_code) (bv 32 0x7)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d7)) (branch (== (var callm_reg_code) (bv 32 0x8)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a0)) (branch (== (var callm_reg_code) (bv 32 0x9)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a1)) (branch (== (var callm_reg_code) (bv 32 0xa)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a2)) (branch (== (var callm_reg_code) (bv 32 0xb)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a3)) (branch (== (var callm_reg_code) (bv 32 0xc)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a4)) (branch (== (var callm_reg_code) (bv 32 0xd)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a5)) (branch (== (var callm_reg_code) (bv 32 0xe)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a6)) (branch (== (var callm_reg_code) (bv 32 0xf)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a7)) empty)))))))))))))))) (storew 0 (var callm_frame) (cast 16 false (var callm_frame_info))) (set callm_ccr_arg (| (<< (cast 16 false (cast 8 false (var sr))) (bv 8 0x8) false) (cast 16 false (var callm_count)))) (storew 0 (+ (var callm_frame) (bv 32 0x2)) (cast 16 false (var callm_ccr_arg))) (storew 0 (+ (var callm_frame) (bv 32 0x4)) (cast 32 false (var callm_addr))) (storew 0 (+ (var callm_frame) (bv 32 0x8)) (var a7)) (storew 0 (+ (var callm_frame) (bv 32 0xc)) (bv 32 0x6)) (storew 0 (+ (var callm_frame) (bv 32 0x14)) (bv 32 0x0)) (set a7 (cast 32 false (var callm_frame))) (branch (== (var callm_reg_code) (bv 32 0x0)) (set d0 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x1)) (set d1 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x2)) (set d2 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x3)) (set d3 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x4)) (set d4 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x5)) (set d5 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x6)) (set d6 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x7)) (set d7 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x8)) (set a0 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x9)) (set a1 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xa)) (set a2 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xb)) (set a3 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xc)) (set a4 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xd)) (set a5 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xe)) (set a6 (cast 32 false (var callm_data))) empty))))))))))))))) (jmp (+ (var callm_entry) (bv 32 0x2)))) (goto m68k_callm)))
d "callm 0x0, 0x5(pc, d0.w)" 06fb00000001 0x0 (seq (set callm_count (bv 32 0x0)) (set callm_addr (cast 32 false (+ (bv 32 0x5) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set callm_frame_info (loadw 0 16 (var callm_addr))) (set callm_entry (loadw 0 32 (+ (var callm_addr) (bv 32 0x4)))) (set callm_data (loadw 0 32 (+ (var callm_addr) (bv 32 0x8)))) (set callm_entry_word (loadw 0 16 (var callm_entry))) (set callm_reg_code (cast 32 false (>> (var callm_entry_word) (bv 8 0xc) false))) (set callm_frame (- (var a7) (bv 32 0x18))) (branch (is_zero (& (var callm_frame_info) (bv 16 0xff00))) (seq (branch (== (var callm_reg_code) (bv 32 0x0)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d0)) (branch (== (var callm_reg_code) (bv 32 0x1)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d1)) (branch (== (var callm_reg_code) (bv 32 0x2)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d2)) (branch (== (var callm_reg_code) (bv 32 0x3)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d3)) (branch (== (var callm_reg_code) (bv 32 0x4)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d4)) (branch (== (var callm_reg_code) (bv 32 0x5)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d5)) (branch (== (var callm_reg_code) (bv 32 0x6)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d6)) (branch (== (var callm_reg_code) (bv 32 0x7)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d7)) (branch (== (var callm_reg_code) (bv 32 0x8)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a0)) (branch (== (var callm_reg_code) (bv 32 0x9)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a1)) (branch (== (var callm_reg_code) (bv 32 0xa)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a2)) (branch (== (var callm_reg_code) (bv 32 0xb)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a3)) (branch (== (var callm_reg_code) (bv 32 0xc)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a4)) (branch (== (var callm_reg_code) (bv 32 0xd)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a5)) (branch (== (var callm_reg_code) (bv 32 0xe)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a6)) (branch (== (var callm_reg_code) (bv 32 0xf)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a7)) empty)))))))))))))))) (storew 0 (var callm_frame) (cast 16 false (var callm_frame_info))) (set callm_ccr_arg (| (<< (cast 16 false (cast 8 false (var sr))) (bv 8 0x8) false) (cast 16 false (var callm_count)))) (storew 0 (+ (var callm_frame) (bv 32 0x2)) (cast 16 false (var callm_ccr_arg))) (storew 0 (+ (var callm_frame) (bv 32 0x4)) (cast 32 false (var callm_addr))) (storew 0 (+ (var callm_frame) (bv 32 0x8)) (var a7)) (storew 0 (+ (var callm_frame) (bv 32 0xc)) (bv 32 0x6)) (storew 0 (+ (var callm_frame) (bv 32 0x14)) (bv 32 0x0)) (set a7 (cast 32 false (var callm_frame))) (branch (== (var callm_reg_code) (bv 32 0x0)) (set d0 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x1)) (set d1 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x2)) (set d2 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x3)) (set d3 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x4)) (set d4 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x5)) (set d5 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x6)) (set d6 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x7)) (set d7 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x8)) (set a0 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x9)) (set a1 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xa)) (set a2 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xb)) (set a3 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xc)) (set a4 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xd)) (set a5 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xe)) (set a6 (cast 32 false (var callm_data))) empty))))))))))))))) (jmp (+ (var callm_entry) (bv 32 0x2)))) (goto m68k_callm)))
d "callm 0xff, 0x4(pc, d0.w)" 06fb00ff0100 0x0 (seq (set callm_count (bv 32 0xff)) (set callm_addr (cast 32 false (+ (bv 32 0x4) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set callm_frame_info (loadw 0 16 (var callm_addr))) (set callm_entry (loadw 0 32 (+ (var callm_addr) (bv 32 0x4)))) (set callm_data (loadw 0 32 (+ (var callm_addr) (bv 32 0x8)))) (set callm_entry_word (loadw 0 16 (var callm_entry))) (set callm_reg_code (cast 32 false (>> (var callm_entry_word) (bv 8 0xc) false))) (set callm_frame (- (var a7) (bv 32 0x18))) (branch (is_zero (& (var callm_frame_info) (bv 16 0xff00))) (seq (branch (== (var callm_reg_code) (bv 32 0x0)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d0)) (branch (== (var callm_reg_code) (bv 32 0x1)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d1)) (branch (== (var callm_reg_code) (bv 32 0x2)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d2)) (branch (== (var callm_reg_code) (bv 32 0x3)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d3)) (branch (== (var callm_reg_code) (bv 32 0x4)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d4)) (branch (== (var callm_reg_code) (bv 32 0x5)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d5)) (branch (== (var callm_reg_code) (bv 32 0x6)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d6)) (branch (== (var callm_reg_code) (bv 32 0x7)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var d7)) (branch (== (var callm_reg_code) (bv 32 0x8)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a0)) (branch (== (var callm_reg_code) (bv 32 0x9)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a1)) (branch (== (var callm_reg_code) (bv 32 0xa)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a2)) (branch (== (var callm_reg_code) (bv 32 0xb)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a3)) (branch (== (var callm_reg_code) (bv 32 0xc)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a4)) (branch (== (var callm_reg_code) (bv 32 0xd)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a5)) (branch (== (var callm_reg_code) (bv 32 0xe)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a6)) (branch (== (var callm_reg_code) (bv 32 0xf)) (storew 0 (+ (var callm_frame) (bv 32 0x10)) (var a7)) empty)))))))))))))))) (storew 0 (var callm_frame) (cast 16 false (var callm_frame_info))) (set callm_ccr_arg (| (<< (cast 16 false (cast 8 false (var sr))) (bv 8 0x8) false) (cast 16 false (var callm_count)))) (storew 0 (+ (var callm_frame) (bv 32 0x2)) (cast 16 false (var callm_ccr_arg))) (storew 0 (+ (var callm_frame) (bv 32 0x4)) (cast 32 false (var callm_addr))) (storew 0 (+ (var callm_frame) (bv 32 0x8)) (var a7)) (storew 0 (+ (var callm_frame) (bv 32 0xc)) (bv 32 0x6)) (storew 0 (+ (var callm_frame) (bv 32 0x14)) (bv 32 0x0)) (set a7 (cast 32 false (var callm_frame))) (branch (== (var callm_reg_code) (bv 32 0x0)) (set d0 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x1)) (set d1 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x2)) (set d2 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x3)) (set d3 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x4)) (set d4 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x5)) (set d5 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x6)) (set d6 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x7)) (set d7 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x8)) (set a0 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0x9)) (set a1 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xa)) (set a2 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xb)) (set a3 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xc)) (set a4 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xd)) (set a5 (cast 32 false (var callm_data))) (branch (== (var callm_reg_code) (bv 32 0xe)) (set a6 (cast 32 false (var callm_data))) empty))))))))))))))) (jmp (+ (var callm_entry) (bv 32 0x2)))) (goto m68k_callm)))
d "cas.b d0, d0, (a0)" 0ad00000 0x0 (seq (set cmp (cast 8 false (var d0))) (set upd (cast 8 false (var d0))) (set dst_addr (cast 32 false (var a0))) (set dst (loadw 0 8 (var dst_addr))) (set res (- (var dst) (var cmp))) (branch (== (cast 8 false (var cmp)) (cast 8 false (var dst))) (storew 0 (var dst_addr) (cast 8 false (var upd))) (set d0 (| (& (var d0) (bv 32 0xffffff00)) (cast 32 false (var dst))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 8 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 8 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (&& (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var cmp)) (bv 1 0x1) (bv 1 0x0)))) (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res)) (bv 1 0x1) (bv 1 0x0))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite (&& (ule (var dst) (var cmp)) (! (== (var dst) (var cmp)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "cas.b d0, d0, (a0)+" 0ad80000 0x0 (seq (set cmp (cast 8 false (var d0))) (set upd (cast 8 false (var d0))) (set dst_addr (cast 32 false (var a0))) (set dst (loadw 0 8 (var dst_addr))) (set res (- (var dst) (var cmp))) (branch (== (cast 8 false (var cmp)) (cast 8 false (var dst))) (storew 0 (var dst_addr) (cast 8 false (var upd))) (set d0 (| (& (var d0) (bv 32 0xffffff00)) (cast 32 false (var dst))))) (set a0 (cast 32 false (+ (var a0) (bv 32 0x1)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 8 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 8 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (&& (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var cmp)) (bv 1 0x1) (bv 1 0x0)))) (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res)) (bv 1 0x1) (bv 1 0x0))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite (&& (ule (var dst) (var cmp)) (! (== (var dst) (var cmp)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "cas.b d0, d0, -(a0)" 0ae00000 0x0 (seq (set cmp (cast 8 false (var d0))) (set upd (cast 8 false (var d0))) (set a0 (cast 32 false (- (var a0) (bv 32 0x1)))) (set dst_addr (cast 32 false (var a0))) (set dst (loadw 0 8 (var dst_addr))) (set res (- (var dst) (var cmp))) (branch (== (cast 8 false (var cmp)) (cast 8 false (var dst))) (storew 0 (var dst_addr) (cast 8 false (var upd))) (set d0 (| (& (var d0) (bv 32 0xffffff00)) (cast 32 false (var dst))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 8 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 8 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (&& (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var cmp)) (bv 1 0x1) (bv 1 0x0)))) (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res)) (bv 1 0x1) (bv 1 0x0))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite (&& (ule (var dst) (var cmp)) (! (== (var dst) (var cmp)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "cas.b d0, d0, 0x1(a0)" 0ae800000001 0x0 (seq (set cmp (cast 8 false (var d0))) (set upd (cast 8 false (var d0))) (set dst_addr (cast 32 false (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))))) (set dst (loadw 0 8 (var dst_addr))) (set res (- (var dst) (var cmp))) (branch (== (cast 8 false (var cmp)) (cast 8 false (var dst))) (storew 0 (var dst_addr) (cast 8 false (var upd))) (set d0 (| (& (var d0) (bv 32 0xffffff00)) (cast 32 false (var dst))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 8 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 8 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (&& (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var cmp)) (bv 1 0x1) (bv 1 0x0)))) (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res)) (bv 1 0x1) (bv 1 0x0))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite (&& (ule (var dst) (var cmp)) (! (== (var dst) (var cmp)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "cas.b d0, d0, 0x1(a0, d0.w)" 0af000000001 0x0 (seq (set cmp (cast 8 false (var d0))) (set upd (cast 8 false (var d0))) (set dst_addr (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set dst (loadw 0 8 (var dst_addr))) (set res (- (var dst) (var cmp))) (branch (== (cast 8 false (var cmp)) (cast 8 false (var dst))) (storew 0 (var dst_addr) (cast 8 false (var upd))) (set d0 (| (& (var d0) (bv 32 0xffffff00)) (cast 32 false (var dst))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 8 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 8 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (&& (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var cmp)) (bv 1 0x1) (bv 1 0x0)))) (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res)) (bv 1 0x1) (bv 1 0x0))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite (&& (ule (var dst) (var cmp)) (! (== (var dst) (var cmp)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "cas.b d0, d4, ([0x18001ff, a0], 0x8000fff)" 0af00100017f018001ff08000fff 0x0 (seq (set cmp (cast 8 false (var d0))) (set upd (cast 8 false (var d4))) (set dst_addr (cast 32 false (+ (+ (loadw 0 32 (+ (var a0) (bv 32 0x18001ff))) (bv 32 0x0)) (bv 32 0x8000fff)))) (set dst (loadw 0 8 (var dst_addr))) (set res (- (var dst) (var cmp))) (branch (== (cast 8 false (var cmp)) (cast 8 false (var dst))) (storew 0 (var dst_addr) (cast 8 false (var upd))) (set d0 (| (& (var d0) (bv 32 0xffffff00)) (cast 32 false (var dst))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 8 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 8 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (&& (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var cmp)) (bv 1 0x1) (bv 1 0x0)))) (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res)) (bv 1 0x1) (bv 1 0x0))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite (&& (ule (var dst) (var cmp)) (! (== (var dst) (var cmp)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "cas.b d0, d0, 0x1.w" 0af800000001 0x0 (seq (set cmp (cast 8 false (var d0))) (set upd (cast 8 false (var d0))) (set dst_addr (cast 32 false (bv 32 0x1))) (set dst (loadw 0 8 (var dst_addr))) (set res (- (var dst) (var cmp))) (branch (== (cast 8 false (var cmp)) (cast 8 false (var dst))) (storew 0 (var dst_addr) (cast 8 false (var upd))) (set d0 (| (& (var d0) (bv 32 0xffffff00)) (cast 32 false (var dst))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 8 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 8 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (&& (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var cmp)) (bv 1 0x1) (bv 1 0x0)))) (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res)) (bv 1 0x1) (bv 1 0x0))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite (&& (ule (var dst) (var cmp)) (! (== (var dst) (var cmp)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "cas.b d0, d0, 0x10010.l" 0af9000000010010 0x0 (seq (set cmp (cast 8 false (var d0))) (set upd (cast 8 false (var d0))) (set dst_addr (cast 32 false (bv 32 0x10010))) (set dst (loadw 0 8 (var dst_addr))) (set res (- (var dst) (var cmp))) (branch (== (cast 8 false (var cmp)) (cast 8 false (var dst))) (storew 0 (var dst_addr) (cast 8 false (var upd))) (set d0 (| (& (var d0) (bv 32 0xffffff00)) (cast 32 false (var dst))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 8 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 8 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (&& (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var cmp)) (bv 1 0x1) (bv 1 0x0)))) (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res)) (bv 1 0x1) (bv 1 0x0))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite (&& (ule (var dst) (var cmp)) (! (== (var dst) (var cmp)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "cas.w d0, d0, (a0)" 0cd00000 0x0 (seq (set cmp (cast 16 false (var d0))) (set upd (cast 16 false (var d0))) (set dst_addr (cast 32 false (var a0))) (set dst (loadw 0 16 (var dst_addr))) (set res (- (var dst) (var cmp))) (branch (== (cast 16 false (var cmp)) (cast 16 false (var dst))) (storew 0 (var dst_addr) (cast 16 false (var upd))) (set d0 (| (& (var d0) (bv 32 0xffff0000)) (cast 32 false (var dst))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 16 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 16 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (&& (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var cmp)) (bv 1 0x1) (bv 1 0x0)))) (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res)) (bv 1 0x1) (bv 1 0x0))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite (&& (ule (var dst) (var cmp)) (! (== (var dst) (var cmp)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "cas.w d0, d0, (a0)+" 0cd80000 0x0 (seq (set cmp (cast 16 false (var d0))) (set upd (cast 16 false (var d0))) (set dst_addr (cast 32 false (var a0))) (set dst (loadw 0 16 (var dst_addr))) (set res (- (var dst) (var cmp))) (branch (== (cast 16 false (var cmp)) (cast 16 false (var dst))) (storew 0 (var dst_addr) (cast 16 false (var upd))) (set d0 (| (& (var d0) (bv 32 0xffff0000)) (cast 32 false (var dst))))) (set a0 (cast 32 false (+ (var a0) (bv 32 0x2)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 16 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 16 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (&& (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var cmp)) (bv 1 0x1) (bv 1 0x0)))) (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res)) (bv 1 0x1) (bv 1 0x0))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite (&& (ule (var dst) (var cmp)) (! (== (var dst) (var cmp)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "cas.w d0, d0, -(a0)" 0ce00000 0x0 (seq (set cmp (cast 16 false (var d0))) (set upd (cast 16 false (var d0))) (set a0 (cast 32 false (- (var a0) (bv 32 0x2)))) (set dst_addr (cast 32 false (var a0))) (set dst (loadw 0 16 (var dst_addr))) (set res (- (var dst) (var cmp))) (branch (== (cast 16 false (var cmp)) (cast 16 false (var dst))) (storew 0 (var dst_addr) (cast 16 false (var upd))) (set d0 (| (& (var d0) (bv 32 0xffff0000)) (cast 32 false (var dst))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 16 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 16 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (&& (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var cmp)) (bv 1 0x1) (bv 1 0x0)))) (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res)) (bv 1 0x1) (bv 1 0x0))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite (&& (ule (var dst) (var cmp)) (! (== (var dst) (var cmp)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "cas.w d0, d0, 0x1(a0)" 0ce800000001 0x0 (seq (set cmp (cast 16 false (var d0))) (set upd (cast 16 false (var d0))) (set dst_addr (cast 32 false (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))))) (set dst (loadw 0 16 (var dst_addr))) (set res (- (var dst) (var cmp))) (branch (== (cast 16 false (var cmp)) (cast 16 false (var dst))) (storew 0 (var dst_addr) (cast 16 false (var upd))) (set d0 (| (& (var d0) (bv 32 0xffff0000)) (cast 32 false (var dst))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 16 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 16 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (&& (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var cmp)) (bv 1 0x1) (bv 1 0x0)))) (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res)) (bv 1 0x1) (bv 1 0x0))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite (&& (ule (var dst) (var cmp)) (! (== (var dst) (var cmp)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "cas.w d0, d0, 0x1(a0, d0.w)" 0cf000000001 0x0 (seq (set cmp (cast 16 false (var d0))) (set upd (cast 16 false (var d0))) (set dst_addr (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set dst (loadw 0 16 (var dst_addr))) (set res (- (var dst) (var cmp))) (branch (== (cast 16 false (var cmp)) (cast 16 false (var dst))) (storew 0 (var dst_addr) (cast 16 false (var upd))) (set d0 (| (& (var d0) (bv 32 0xffff0000)) (cast 32 false (var dst))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 16 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 16 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (&& (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var cmp)) (bv 1 0x1) (bv 1 0x0)))) (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res)) (bv 1 0x1) (bv 1 0x0))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite (&& (ule (var dst) (var cmp)) (! (== (var dst) (var cmp)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "cas.w d0, d4, ([0x18001ff, a0], 0x8000fff)" 0cf00100017f018001ff08000fff 0x0 (seq (set cmp (cast 16 false (var d0))) (set upd (cast 16 false (var d4))) (set dst_addr (cast 32 false (+ (+ (loadw 0 32 (+ (var a0) (bv 32 0x18001ff))) (bv 32 0x0)) (bv 32 0x8000fff)))) (set dst (loadw 0 16 (var dst_addr))) (set res (- (var dst) (var cmp))) (branch (== (cast 16 false (var cmp)) (cast 16 false (var dst))) (storew 0 (var dst_addr) (cast 16 false (var upd))) (set d0 (| (& (var d0) (bv 32 0xffff0000)) (cast 32 false (var dst))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 16 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 16 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (&& (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var cmp)) (bv 1 0x1) (bv 1 0x0)))) (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res)) (bv 1 0x1) (bv 1 0x0))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite (&& (ule (var dst) (var cmp)) (! (== (var dst) (var cmp)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "cas.w d0, d0, 0x1.w" 0cf800000001 0x0 (seq (set cmp (cast 16 false (var d0))) (set upd (cast 16 false (var d0))) (set dst_addr (cast 32 false (bv 32 0x1))) (set dst (loadw 0 16 (var dst_addr))) (set res (- (var dst) (var cmp))) (branch (== (cast 16 false (var cmp)) (cast 16 false (var dst))) (storew 0 (var dst_addr) (cast 16 false (var upd))) (set d0 (| (& (var d0) (bv 32 0xffff0000)) (cast 32 false (var dst))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 16 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 16 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (&& (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var cmp)) (bv 1 0x1) (bv 1 0x0)))) (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res)) (bv 1 0x1) (bv 1 0x0))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite (&& (ule (var dst) (var cmp)) (! (== (var dst) (var cmp)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "cas.w d0, d0, 0x10010.l" 0cf9000000010010 0x0 (seq (set cmp (cast 16 false (var d0))) (set upd (cast 16 false (var d0))) (set dst_addr (cast 32 false (bv 32 0x10010))) (set dst (loadw 0 16 (var dst_addr))) (set res (- (var dst) (var cmp))) (branch (== (cast 16 false (var cmp)) (cast 16 false (var dst))) (storew 0 (var dst_addr) (cast 16 false (var upd))) (set d0 (| (& (var d0) (bv 32 0xffff0000)) (cast 32 false (var dst))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 16 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 16 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (&& (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var cmp)) (bv 1 0x1) (bv 1 0x0)))) (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res)) (bv 1 0x1) (bv 1 0x0))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite (&& (ule (var dst) (var cmp)) (! (== (var dst) (var cmp)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "cas2.w d0:d1,d0:d0,(d0):(d0)" 0cfc00000001 0x0 (seq (set addr0 (var d0)) (set addr1 (var d0)) (set cmp0 (cast 16 false (var d0))) (set cmp1 (cast 16 false (var d1))) (set upd0 (cast 16 false (var d0))) (set upd1 (cast 16 false (var d0))) (set dst0 (loadw 0 16 (var addr0))) (set dst1 (loadw 0 16 (var addr1))) (set first_eq (ite (== (var cmp0) (var dst0)) (bv 1 0x1) (bv 1 0x0))) (set second_eq (ite (== (var cmp1) (var dst1)) (bv 1 0x1) (bv 1 0x0))) (set res0 (- (var dst0) (var cmp0))) (set res1 (- (var dst1) (var cmp1))) (set flag_cmp (ite (! (is_zero (var first_eq))) (var cmp1) (var cmp0))) (set flag_dst (ite (! (is_zero (var first_eq))) (var dst1) (var dst0))) (set res (ite (! (is_zero (var first_eq))) (var res1) (var res0))) (branch (&& (! (is_zero (var first_eq))) (! (is_zero (var second_eq)))) (seq (storew 0 (var addr0) (cast 16 false (var upd0))) (storew 0 (var addr1) (cast 16 false (var upd1)))) (seq (set d1 (| (& (var d1) (bv 32 0xffff0000)) (cast 32 false (var dst1)))) (set d0 (| (& (var d0) (bv 32 0xffff0000)) (cast 32 false (var dst0)))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 16 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 16 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (&& (! (== (ite (msb (var flag_dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var flag_cmp)) (bv 1 0x1) (bv 1 0x0)))) (! (== (ite (msb (var flag_dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res)) (bv 1 0x1) (bv 1 0x0))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite (&& (ule (var flag_dst) (var flag_cmp)) (! (== (var flag_dst) (var flag_cmp)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "cas.l d0, d0, (a0)" 0ed00000 0x0 (seq (set cmp (var d0)) (set upd (var d0)) (set dst_addr (cast 32 false (var a0))) (set dst (loadw 0 32 (var dst_addr))) (set res (- (var dst) (var cmp))) (branch (== (cast 32 false (var cmp)) (cast 32 false (var dst))) (storew 0 (var dst_addr) (cast 32 false (var upd))) (set d0 (cast 32 false (var dst)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (&& (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var cmp)) (bv 1 0x1) (bv 1 0x0)))) (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res)) (bv 1 0x1) (bv 1 0x0))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite (&& (ule (var dst) (var cmp)) (! (== (var dst) (var cmp)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "cas.l d0, d0, (a0)+" 0ed80000 0x0 (seq (set cmp (var d0)) (set upd (var d0)) (set dst_addr (cast 32 false (var a0))) (set dst (loadw 0 32 (var dst_addr))) (set res (- (var dst) (var cmp))) (branch (== (cast 32 false (var cmp)) (cast 32 false (var dst))) (storew 0 (var dst_addr) (cast 32 false (var upd))) (set d0 (cast 32 false (var dst)))) (set a0 (cast 32 false (+ (var a0) (bv 32 0x4)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (&& (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var cmp)) (bv 1 0x1) (bv 1 0x0)))) (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res)) (bv 1 0x1) (bv 1 0x0))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite (&& (ule (var dst) (var cmp)) (! (== (var dst) (var cmp)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "cas.l d0, d0, -(a0)" 0ee00000 0x0 (seq (set cmp (var d0)) (set upd (var d0)) (set a0 (cast 32 false (- (var a0) (bv 32 0x4)))) (set dst_addr (cast 32 false (var a0))) (set dst (loadw 0 32 (var dst_addr))) (set res (- (var dst) (var cmp))) (branch (== (cast 32 false (var cmp)) (cast 32 false (var dst))) (storew 0 (var dst_addr) (cast 32 false (var upd))) (set d0 (cast 32 false (var dst)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (&& (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var cmp)) (bv 1 0x1) (bv 1 0x0)))) (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res)) (bv 1 0x1) (bv 1 0x0))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite (&& (ule (var dst) (var cmp)) (! (== (var dst) (var cmp)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "cas.l d0, d0, 0x1(a0)" 0ee800000001 0x0 (seq (set cmp (var d0)) (set upd (var d0)) (set dst_addr (cast 32 false (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))))) (set dst (loadw 0 32 (var dst_addr))) (set res (- (var dst) (var cmp))) (branch (== (cast 32 false (var cmp)) (cast 32 false (var dst))) (storew 0 (var dst_addr) (cast 32 false (var upd))) (set d0 (cast 32 false (var dst)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (&& (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var cmp)) (bv 1 0x1) (bv 1 0x0)))) (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res)) (bv 1 0x1) (bv 1 0x0))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite (&& (ule (var dst) (var cmp)) (! (== (var dst) (var cmp)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "cas.l d0, d0, 0x1(a0, d0.w)" 0ef000000001 0x0 (seq (set cmp (var d0)) (set upd (var d0)) (set dst_addr (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set dst (loadw 0 32 (var dst_addr))) (set res (- (var dst) (var cmp))) (branch (== (cast 32 false (var cmp)) (cast 32 false (var dst))) (storew 0 (var dst_addr) (cast 32 false (var upd))) (set d0 (cast 32 false (var dst)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (&& (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var cmp)) (bv 1 0x1) (bv 1 0x0)))) (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res)) (bv 1 0x1) (bv 1 0x0))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite (&& (ule (var dst) (var cmp)) (! (== (var dst) (var cmp)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "cas.l d0, d4, ([0x18001ff, a0], 0x8000fff)" 0ef00100017f018001ff08000fff 0x0 (seq (set cmp (var d0)) (set upd (var d4)) (set dst_addr (cast 32 false (+ (+ (loadw 0 32 (+ (var a0) (bv 32 0x18001ff))) (bv 32 0x0)) (bv 32 0x8000fff)))) (set dst (loadw 0 32 (var dst_addr))) (set res (- (var dst) (var cmp))) (branch (== (cast 32 false (var cmp)) (cast 32 false (var dst))) (storew 0 (var dst_addr) (cast 32 false (var upd))) (set d0 (cast 32 false (var dst)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (&& (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var cmp)) (bv 1 0x1) (bv 1 0x0)))) (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res)) (bv 1 0x1) (bv 1 0x0))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite (&& (ule (var dst) (var cmp)) (! (== (var dst) (var cmp)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "cas.l d0, d0, 0x1.w" 0ef800000001 0x0 (seq (set cmp (var d0)) (set upd (var d0)) (set dst_addr (cast 32 false (bv 32 0x1))) (set dst (loadw 0 32 (var dst_addr))) (set res (- (var dst) (var cmp))) (branch (== (cast 32 false (var cmp)) (cast 32 false (var dst))) (storew 0 (var dst_addr) (cast 32 false (var upd))) (set d0 (cast 32 false (var dst)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (&& (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var cmp)) (bv 1 0x1) (bv 1 0x0)))) (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res)) (bv 1 0x1) (bv 1 0x0))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite (&& (ule (var dst) (var cmp)) (! (== (var dst) (var cmp)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "cas.l d0, d0, 0x10010.l" 0ef9000000010010 0x0 (seq (set cmp (var d0)) (set upd (var d0)) (set dst_addr (cast 32 false (bv 32 0x10010))) (set dst (loadw 0 32 (var dst_addr))) (set res (- (var dst) (var cmp))) (branch (== (cast 32 false (var cmp)) (cast 32 false (var dst))) (storew 0 (var dst_addr) (cast 32 false (var upd))) (set d0 (cast 32 false (var dst)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (&& (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var cmp)) (bv 1 0x1) (bv 1 0x0)))) (! (== (ite (msb (var dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res)) (bv 1 0x1) (bv 1 0x0))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite (&& (ule (var dst) (var cmp)) (! (== (var dst) (var cmp)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "cas2.l d0:d1,d0:d0,(d0):(d0)" 0efc00000001 0x0 (seq (set addr0 (var d0)) (set addr1 (var d0)) (set cmp0 (var d0)) (set cmp1 (var d1)) (set upd0 (var d0)) (set upd1 (var d0)) (set dst0 (loadw 0 32 (var addr0))) (set dst1 (loadw 0 32 (var addr1))) (set first_eq (ite (== (var cmp0) (var dst0)) (bv 1 0x1) (bv 1 0x0))) (set second_eq (ite (== (var cmp1) (var dst1)) (bv 1 0x1) (bv 1 0x0))) (set res0 (- (var dst0) (var cmp0))) (set res1 (- (var dst1) (var cmp1))) (set flag_cmp (ite (! (is_zero (var first_eq))) (var cmp1) (var cmp0))) (set flag_dst (ite (! (is_zero (var first_eq))) (var dst1) (var dst0))) (set res (ite (! (is_zero (var first_eq))) (var res1) (var res0))) (branch (&& (! (is_zero (var first_eq))) (! (is_zero (var second_eq)))) (seq (storew 0 (var addr0) (cast 32 false (var upd0))) (storew 0 (var addr1) (cast 32 false (var upd1)))) (seq (set d1 (cast 32 false (var dst1))) (set d0 (cast 32 false (var dst0))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (&& (! (== (ite (msb (var flag_dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var flag_cmp)) (bv 1 0x1) (bv 1 0x0)))) (! (== (ite (msb (var flag_dst)) (bv 1 0x1) (bv 1 0x0)) (ite (msb (var res)) (bv 1 0x1) (bv 1 0x0))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite (&& (ule (var flag_dst) (var flag_cmp)) (! (== (var flag_dst) (var flag_cmp)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "chk.l d0, d0" 4100 0x0 (seq (set bound (var d0)) (set dst (var d0)) (branch (&& (sle (var dst) (bv 32 0x0)) (! (== (var dst) (bv 32 0x0)))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) (branch (! (sle (var dst) (var bound))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty)))
d "chk.l (a0), d0" 4110 0x0 (seq (set bound (loadw 0 32 (var a0))) (set dst (var d0)) (branch (&& (sle (var dst) (bv 32 0x0)) (! (== (var dst) (bv 32 0x0)))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) (branch (! (sle (var dst) (var bound))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty)))
d "chk.l (a0)+, d0" 4118 0x0 (seq (set bound (loadw 0 32 (var a0))) (set a0 (cast 32 false (+ (var a0) (bv 32 0x4)))) (set dst (var d0)) (branch (&& (sle (var dst) (bv 32 0x0)) (! (== (var dst) (bv 32 0x0)))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) (branch (! (sle (var dst) (var bound))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty)))
d "chk.l -(a0), d0" 4120 0x0 (seq (set a0 (cast 32 false (- (var a0) (bv 32 0x4)))) (set bound (loadw 0 32 (var a0))) (set dst (var d0)) (branch (&& (sle (var dst) (bv 32 0x0)) (! (== (var dst) (bv 32 0x0)))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) (branch (! (sle (var dst) (var bound))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty)))
d "chk.l 0x0(a0), d0" 41280000 0x0 (seq (set bound (loadw 0 32 (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x0))))) (set dst (var d0)) (branch (&& (sle (var dst) (bv 32 0x0)) (! (== (var dst) (bv 32 0x0)))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) (branch (! (sle (var dst) (var bound))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty)))
d "chk.l 0x0(a0, d0.w), d0" 41300000 0x0 (seq (set bound (loadw 0 32 (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x0))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set dst (var d0)) (branch (&& (sle (var dst) (bv 32 0x0)) (! (== (var dst) (bv 32 0x0)))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) (branch (! (sle (var dst) (var bound))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty)))
d "chk.l (a0, d0.w), d0" 41300100 0x0 (seq (set bound (loadw 0 32 (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x0))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set dst (var d0)) (branch (&& (sle (var dst) (bv 32 0x0)) (! (== (var dst) (bv 32 0x0)))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) (branch (! (sle (var dst) (var bound))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty)))
d "chk.l ([0x18001ff, a0], 0x8000fff), d0" 4130017f018001ff08000fff 0x0 (seq (set bound (loadw 0 32 (+ (+ (loadw 0 32 (+ (var a0) (bv 32 0x18001ff))) (bv 32 0x0)) (bv 32 0x8000fff)))) (set dst (var d0)) (branch (&& (sle (var dst) (bv 32 0x0)) (! (== (var dst) (bv 32 0x0)))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) (branch (! (sle (var dst) (var bound))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty)))
d "chk.l 0x0.w, d0" 41380000 0x0 (seq (set bound (loadw 0 32 (bv 32 0x0))) (set dst (var d0)) (branch (&& (sle (var dst) (bv 32 0x0)) (! (== (var dst) (bv 32 0x0)))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) (branch (! (sle (var dst) (var bound))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty)))
d "chk.l 0x1.l, d0" 413900000001 0x0 (seq (set bound (loadw 0 32 (bv 32 0x1))) (set dst (var d0)) (branch (&& (sle (var dst) (bv 32 0x0)) (! (== (var dst) (bv 32 0x0)))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) (branch (! (sle (var dst) (var bound))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty)))
d "chk.l 0x2(pc), d0" 413a0000 0x0 (seq (set bound (loadw 0 32 (bv 32 0x2))) (set dst (var d0)) (branch (&& (sle (var dst) (bv 32 0x0)) (! (== (var dst) (bv 32 0x0)))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) (branch (! (sle (var dst) (var bound))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty)))
d "chk.l 0x2(pc, d0.w), d0" 413b0000 0x0 (seq (set bound (loadw 0 32 (+ (bv 32 0x2) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set dst (var d0)) (branch (&& (sle (var dst) (bv 32 0x0)) (! (== (var dst) (bv 32 0x0)))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) (branch (! (sle (var dst) (var bound))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty)))
d "chk.l ([0x1800201, pc], 0x8000fff), d0" 413b017f018001ff08000fff 0x0 (seq (set bound (loadw 0 32 (+ (+ (loadw 0 32 (+ (bv 32 0x2) (bv 32 0x18001ff))) (bv 32 0x0)) (bv 32 0x8000fff)))) (set dst (var d0)) (branch (&& (sle (var dst) (bv 32 0x0)) (! (== (var dst) (bv 32 0x0)))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) (branch (! (sle (var dst) (var bound))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty)))
d "chk.l 0x1, d0" 413c00000001 0x0 (seq (set bound (bv 32 0x1)) (set dst (var d0)) (branch (&& (sle (var dst) (bv 32 0x0)) (! (== (var dst) (bv 32 0x0)))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) (branch (! (sle (var dst) (var bound))) (seq (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (& (cast 8 false (var sr)) (bv 8 0xf7)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)))))) (set trap_op (bv 32 0x7)) (set trap_vector (bv 32 0x6)) (goto m68k_chk)) empty)))
d "link.l a0, 0x1" 480800000001 0x0 (seq (set push_value (var a0)) (set a7 (cast 32 false (- (var a7) (bv 32 0x4)))) (storew 0 (var a7) (cast 32 false (var push_value))) (set a0 (cast 32 false (var a7))) (set new_sp (+ (var a7) (bv 32 0x1))) (set a7 (cast 32 false (var new_sp))))
d "extb.l d0" 49c0 0x0 (seq (set res (cast 32 (msb (cast 8 false (var d0))) (cast 8 false (var d0)))) (set d0 (cast 32 false (cast 32 (msb (cast 8 false (var d0))) (cast 8 false (var d0))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "tst.b 0x2(pc)" 4a3a0000 0x0 (seq (set dst (loadw 0 8 (bv 32 0x2))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 8 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 8 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "tst.b 0x2(pc, d0.w)" 4a3b0000 0x0 (seq (set dst (loadw 0 8 (+ (bv 32 0x2) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 8 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 8 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "tst.b ([0x1800201, pc], 0x8000fff)" 4a3b017f018001ff08000fff 0x0 (seq (set dst (loadw 0 8 (+ (+ (loadw 0 32 (+ (bv 32 0x2) (bv 32 0x18001ff))) (bv 32 0x0)) (bv 32 0x8000fff)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 8 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 8 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "tst.b 0x0" 4a3c0000 0x0 (seq (set dst (bv 8 0x0)) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 8 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 8 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "tst.w a0" 4a48 0x0 (seq (set dst (cast 16 false (var a0))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 16 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 16 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "tst.w 0x2(pc)" 4a7a0000 0x0 (seq (set dst (loadw 0 16 (bv 32 0x2))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 16 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 16 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "tst.w 0x2(pc, d0.w)" 4a7b0000 0x0 (seq (set dst (loadw 0 16 (+ (bv 32 0x2) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 16 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 16 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "tst.w ([0x1800201, pc], 0x8000fff)" 4a7b017f018001ff08000fff 0x0 (seq (set dst (loadw 0 16 (+ (+ (loadw 0 32 (+ (bv 32 0x2) (bv 32 0x18001ff))) (bv 32 0x0)) (bv 32 0x8000fff)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 16 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 16 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "tst.w 0x0" 4a7c0000 0x0 (seq (set dst (bv 16 0x0)) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 16 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 16 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "tst.l a0" 4a88 0x0 (seq (set dst (var a0)) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "tst.l 0x2(pc)" 4aba0000 0x0 (seq (set dst (loadw 0 32 (bv 32 0x2))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "tst.l 0x2(pc, d0.w)" 4abb0000 0x0 (seq (set dst (loadw 0 32 (+ (bv 32 0x2) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "tst.l ([0x1800201, pc], 0x8000fff)" 4abb017f018001ff08000fff 0x0 (seq (set dst (loadw 0 32 (+ (+ (loadw 0 32 (+ (bv 32 0x2) (bv 32 0x18001ff))) (bv 32 0x0)) (bv 32 0x8000fff)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "tst.l 0x1" 4abc00000001 0x0 (seq (set dst (bv 32 0x1)) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var dst))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "mulu.l d0, d0" 4c000000 0x0 (seq (set src (var d0)) (set res_wide (* (cast 64 false (var d0)) (cast 64 false (var src)))) (set res (cast 32 false (var res_wide))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (! (ule (var res_wide) (bv 64 0xffffffff))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "muls.l d0, d0" 4c000800 0x0 (seq (set src (var d0)) (set res_wide (* (cast 64 (msb (var d0)) (var d0)) (cast 64 (msb (var src)) (var src)))) (set res (cast 32 false (var res_wide))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (|| (&& (sle (var res_wide) (bv 64 0xffffffff80000000)) (! (== (var res_wide) (bv 64 0xffffffff80000000)))) (! (sle (var res_wide) (bv 64 0x7fffffff)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "mulu.l (a0), d0" 4c100000 0x0 (seq (set src (loadw 0 32 (var a0))) (set res_wide (* (cast 64 false (var d0)) (cast 64 false (var src)))) (set res (cast 32 false (var res_wide))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (! (ule (var res_wide) (bv 64 0xffffffff))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "muls.l (a0), d0" 4c100800 0x0 (seq (set src (loadw 0 32 (var a0))) (set res_wide (* (cast 64 (msb (var d0)) (var d0)) (cast 64 (msb (var src)) (var src)))) (set res (cast 32 false (var res_wide))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (|| (&& (sle (var res_wide) (bv 64 0xffffffff80000000)) (! (== (var res_wide) (bv 64 0xffffffff80000000)))) (! (sle (var res_wide) (bv 64 0x7fffffff)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "mulu.l (a0)+, d0" 4c180000 0x0 (seq (set src (loadw 0 32 (var a0))) (set a0 (cast 32 false (+ (var a0) (bv 32 0x4)))) (set res_wide (* (cast 64 false (var d0)) (cast 64 false (var src)))) (set res (cast 32 false (var res_wide))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (! (ule (var res_wide) (bv 64 0xffffffff))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "muls.l (a0)+, d0" 4c180800 0x0 (seq (set src (loadw 0 32 (var a0))) (set a0 (cast 32 false (+ (var a0) (bv 32 0x4)))) (set res_wide (* (cast 64 (msb (var d0)) (var d0)) (cast 64 (msb (var src)) (var src)))) (set res (cast 32 false (var res_wide))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (|| (&& (sle (var res_wide) (bv 64 0xffffffff80000000)) (! (== (var res_wide) (bv 64 0xffffffff80000000)))) (! (sle (var res_wide) (bv 64 0x7fffffff)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "mulu.l -(a0), d0" 4c200000 0x0 (seq (set a0 (cast 32 false (- (var a0) (bv 32 0x4)))) (set src (loadw 0 32 (var a0))) (set res_wide (* (cast 64 false (var d0)) (cast 64 false (var src)))) (set res (cast 32 false (var res_wide))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (! (ule (var res_wide) (bv 64 0xffffffff))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "muls.l -(a0), d0" 4c200800 0x0 (seq (set a0 (cast 32 false (- (var a0) (bv 32 0x4)))) (set src (loadw 0 32 (var a0))) (set res_wide (* (cast 64 (msb (var d0)) (var d0)) (cast 64 (msb (var src)) (var src)))) (set res (cast 32 false (var res_wide))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (|| (&& (sle (var res_wide) (bv 64 0xffffffff80000000)) (! (== (var res_wide) (bv 64 0xffffffff80000000)))) (! (sle (var res_wide) (bv 64 0x7fffffff)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "mulu.l 0x1(a0), d0" 4c2800000001 0x0 (seq (set src (loadw 0 32 (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))))) (set res_wide (* (cast 64 false (var d0)) (cast 64 false (var src)))) (set res (cast 32 false (var res_wide))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (! (ule (var res_wide) (bv 64 0xffffffff))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "muls.l 0xfff(a0), d0" 4c2808000fff 0x0 (seq (set src (loadw 0 32 (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0xfff))))) (set res_wide (* (cast 64 (msb (var d0)) (var d0)) (cast 64 (msb (var src)) (var src)))) (set res (cast 32 false (var res_wide))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (|| (&& (sle (var res_wide) (bv 64 0xffffffff80000000)) (! (== (var res_wide) (bv 64 0xffffffff80000000)))) (! (sle (var res_wide) (bv 64 0x7fffffff)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "mulu.l 0x1(a0, d0.w), d0" 4c3000000001 0x0 (seq (set src (loadw 0 32 (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set res_wide (* (cast 64 false (var d0)) (cast 64 false (var src)))) (set res (cast 32 false (var res_wide))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (! (ule (var res_wide) (bv 64 0xffffffff))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "muls.l ([0x10001fff], 0x20002fff), d0" 4c3008000fff10001fff20002fff 0x0 (seq (set src (loadw 0 32 (+ (+ (loadw 0 32 (+ (bv 32 0x0) (bv 32 0x10001fff))) (bv 32 0x0)) (bv 32 0x20002fff)))) (set res_wide (* (cast 64 (msb (var d0)) (var d0)) (cast 64 (msb (var src)) (var src)))) (set res (cast 32 false (var res_wide))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (|| (&& (sle (var res_wide) (bv 64 0xffffffff80000000)) (! (== (var res_wide) (bv 64 0xffffffff80000000)))) (! (sle (var res_wide) (bv 64 0x7fffffff)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "mulu.l ([0x20002fff], 0x30003fff), d1" 4c3010001fff20002fff30003fff 0x0 (seq (set src (loadw 0 32 (+ (+ (loadw 0 32 (+ (bv 32 0x0) (bv 32 0x20002fff))) (bv 32 0x0)) (bv 32 0x30003fff)))) (set res_wide (* (cast 64 false (var d1)) (cast 64 false (var src)))) (set res (cast 32 false (var res_wide))) (set d1 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (! (ule (var res_wide) (bv 64 0xffffffff))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "mulu.l 0x1.w, d0" 4c3800000001 0x0 (seq (set src (loadw 0 32 (bv 32 0x1))) (set res_wide (* (cast 64 false (var d0)) (cast 64 false (var src)))) (set res (cast 32 false (var res_wide))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (! (ule (var res_wide) (bv 64 0xffffffff))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "muls.l 0xfff.w, d0" 4c3808000fff 0x0 (seq (set src (loadw 0 32 (bv 32 0xfff))) (set res_wide (* (cast 64 (msb (var d0)) (var d0)) (cast 64 (msb (var src)) (var src)))) (set res (cast 32 false (var res_wide))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (|| (&& (sle (var res_wide) (bv 64 0xffffffff80000000)) (! (== (var res_wide) (bv 64 0xffffffff80000000)))) (! (sle (var res_wide) (bv 64 0x7fffffff)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "mulu.l 0x10010.l, d0" 4c39000000010010 0x0 (seq (set src (loadw 0 32 (bv 32 0x10010))) (set res_wide (* (cast 64 false (var d0)) (cast 64 false (var src)))) (set res (cast 32 false (var res_wide))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (! (ule (var res_wide) (bv 64 0xffffffff))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "muls.l 0xfff1000.l, d0" 4c3908000fff1000 0x0 (seq (set src (loadw 0 32 (bv 32 0xfff1000))) (set res_wide (* (cast 64 (msb (var d0)) (var d0)) (cast 64 (msb (var src)) (var src)))) (set res (cast 32 false (var res_wide))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (|| (&& (sle (var res_wide) (bv 64 0xffffffff80000000)) (! (== (var res_wide) (bv 64 0xffffffff80000000)))) (! (sle (var res_wide) (bv 64 0x7fffffff)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "mulu.l 0x5(pc), d0" 4c3a00000001 0x0 (seq (set src (loadw 0 32 (bv 32 0x5))) (set res_wide (* (cast 64 false (var d0)) (cast 64 false (var src)))) (set res (cast 32 false (var res_wide))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (! (ule (var res_wide) (bv 64 0xffffffff))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "muls.l 0x1003(pc), d0" 4c3a08000fff 0x0 (seq (set src (loadw 0 32 (bv 32 0x1003))) (set res_wide (* (cast 64 (msb (var d0)) (var d0)) (cast 64 (msb (var src)) (var src)))) (set res (cast 32 false (var res_wide))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (|| (&& (sle (var res_wide) (bv 64 0xffffffff80000000)) (! (== (var res_wide) (bv 64 0xffffffff80000000)))) (! (sle (var res_wide) (bv 64 0x7fffffff)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "mulu.l 0x5(pc, d0.w), d0" 4c3b00000001 0x0 (seq (set src (loadw 0 32 (+ (bv 32 0x5) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set res_wide (* (cast 64 false (var d0)) (cast 64 false (var src)))) (set res (cast 32 false (var res_wide))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (! (ule (var res_wide) (bv 64 0xffffffff))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "muls.l ([0x10002003], 0x20002fff), d0" 4c3b08000fff10001fff20002fff 0x0 (seq (set src (loadw 0 32 (+ (+ (loadw 0 32 (+ (bv 32 0x0) (bv 32 0x10002001))) (bv 32 0x0)) (bv 32 0x20002fff)))) (set res_wide (* (cast 64 (msb (var d0)) (var d0)) (cast 64 (msb (var src)) (var src)))) (set res (cast 32 false (var res_wide))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (|| (&& (sle (var res_wide) (bv 64 0xffffffff80000000)) (! (== (var res_wide) (bv 64 0xffffffff80000000)))) (! (sle (var res_wide) (bv 64 0x7fffffff)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "mulu.l ([0x20003003], 0x30003fff), d1" 4c3b10001fff20002fff30003fff 0x0 (seq (set src (loadw 0 32 (+ (+ (loadw 0 32 (+ (bv 32 0x0) (bv 32 0x20003001))) (bv 32 0x0)) (bv 32 0x30003fff)))) (set res_wide (* (cast 64 false (var d1)) (cast 64 false (var src)))) (set res (cast 32 false (var res_wide))) (set d1 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (! (ule (var res_wide) (bv 64 0xffffffff))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "mulu.l 0x10010, d0" 4c3c000000010010 0x0 (seq (set src (bv 32 0x10010)) (set res_wide (* (cast 64 false (var d0)) (cast 64 false (var src)))) (set res (cast 32 false (var res_wide))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (! (ule (var res_wide) (bv 64 0xffffffff))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "muls.l 0xfff1000, d0" 4c3c08000fff1000 0x0 (seq (set src (bv 32 0xfff1000)) (set res_wide (* (cast 64 (msb (var d0)) (var d0)) (cast 64 (msb (var src)) (var src)))) (set res (cast 32 false (var res_wide))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 32 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite (|| (&& (sle (var res_wide) (bv 64 0xffffffff80000000)) (! (== (var res_wide) (bv 64 0xffffffff80000000)))) (! (sle (var res_wide) (bv 64 0x7fffffff)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "divu.l d0, d0" 4c400000 0x0 (seq (set src (var d0)) (set dst (var d0)) (branch (is_zero (var src)) (seq (set trap_op (bv 32 0x6)) (set trap_vector (bv 32 0x5)) (goto m68k_trap)) (branch (! (ule (div (cast 64 false (var dst)) (cast 64 false (var src))) (bv 64 0xffffffff))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! true) (msb (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! true) (is_zero (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))) (seq (set quot (div (cast 64 false (var dst)) (cast 64 false (var src)))) (set d0 (cast 32 false (cast 32 false (var quot)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! false) (msb (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! false) (is_zero (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10)))))))))))
d "divs.l d0, d0" 4c400800 0x0 (seq (set src (var d0)) (set dst (var d0)) (branch (is_zero (var src)) (seq (set trap_op (bv 32 0x6)) (set trap_vector (bv 32 0x5)) (goto m68k_trap)) (branch (|| (&& (sle (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0xffffffff80000000)) (! (== (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0xffffffff80000000)))) (! (sle (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0x7fffffff)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! true) (msb (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! true) (is_zero (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))) (seq (set quot (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src)))) (set d0 (cast 32 false (cast 32 false (var quot)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! false) (msb (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! false) (is_zero (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10)))))))))))
d "divu.l d0, d1:d2" 4c402401 0x0 (seq (set src (var d0)) (set dst (append (var d1) (var d2))) (branch (is_zero (var src)) (seq (set trap_op (bv 32 0x6)) (set trap_vector (bv 32 0x5)) (goto m68k_trap)) (branch (! (ule (div (cast 64 false (var dst)) (cast 64 false (var src))) (bv 64 0xffffffff))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! true) (msb (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! true) (is_zero (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))) (seq (set quot (div (cast 64 false (var dst)) (cast 64 false (var src)))) (set rem (- (cast 64 false (var dst)) (* (var quot) (cast 64 false (var src))))) (set d2 (cast 32 false (cast 32 false (var quot)))) (set d1 (cast 32 false (cast 32 false (var rem)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! false) (msb (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! false) (is_zero (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10)))))))))))
d "divs.l d0, d1:d2" 4c402c01 0x0 (seq (set src (var d0)) (set dst (append (var d1) (var d2))) (branch (is_zero (var src)) (seq (set trap_op (bv 32 0x6)) (set trap_vector (bv 32 0x5)) (goto m68k_trap)) (branch (|| (&& (sle (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0xffffffff80000000)) (! (== (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0xffffffff80000000)))) (! (sle (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0x7fffffff)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! true) (msb (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! true) (is_zero (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))) (seq (set quot (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src)))) (set rem (- (cast 64 (msb (var dst)) (var dst)) (* (var quot) (cast 64 (msb (var src)) (var src))))) (set d2 (cast 32 false (cast 32 false (var quot)))) (set d1 (cast 32 false (cast 32 false (var rem)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! false) (msb (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! false) (is_zero (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10)))))))))))
d "divu.l (a0), d0" 4c500000 0x0 (seq (set src (loadw 0 32 (var a0))) (set dst (var d0)) (branch (is_zero (var src)) (seq (set trap_op (bv 32 0x6)) (set trap_vector (bv 32 0x5)) (goto m68k_trap)) (branch (! (ule (div (cast 64 false (var dst)) (cast 64 false (var src))) (bv 64 0xffffffff))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! true) (msb (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! true) (is_zero (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))) (seq (set quot (div (cast 64 false (var dst)) (cast 64 false (var src)))) (set d0 (cast 32 false (cast 32 false (var quot)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! false) (msb (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! false) (is_zero (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10)))))))))))
d "divs.l (a0), d0" 4c500800 0x0 (seq (set src (loadw 0 32 (var a0))) (set dst (var d0)) (branch (is_zero (var src)) (seq (set trap_op (bv 32 0x6)) (set trap_vector (bv 32 0x5)) (goto m68k_trap)) (branch (|| (&& (sle (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0xffffffff80000000)) (! (== (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0xffffffff80000000)))) (! (sle (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0x7fffffff)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! true) (msb (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! true) (is_zero (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))) (seq (set quot (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src)))) (set d0 (cast 32 false (cast 32 false (var quot)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! false) (msb (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! false) (is_zero (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10)))))))))))
d "divu.l (a0)+, d0" 4c580000 0x0 (seq (set src (loadw 0 32 (var a0))) (set a0 (cast 32 false (+ (var a0) (bv 32 0x4)))) (set dst (var d0)) (branch (is_zero (var src)) (seq (set trap_op (bv 32 0x6)) (set trap_vector (bv 32 0x5)) (goto m68k_trap)) (branch (! (ule (div (cast 64 false (var dst)) (cast 64 false (var src))) (bv 64 0xffffffff))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! true) (msb (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! true) (is_zero (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))) (seq (set quot (div (cast 64 false (var dst)) (cast 64 false (var src)))) (set d0 (cast 32 false (cast 32 false (var quot)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! false) (msb (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! false) (is_zero (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10)))))))))))
d "divs.l (a0)+, d0" 4c580800 0x0 (seq (set src (loadw 0 32 (var a0))) (set a0 (cast 32 false (+ (var a0) (bv 32 0x4)))) (set dst (var d0)) (branch (is_zero (var src)) (seq (set trap_op (bv 32 0x6)) (set trap_vector (bv 32 0x5)) (goto m68k_trap)) (branch (|| (&& (sle (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0xffffffff80000000)) (! (== (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0xffffffff80000000)))) (! (sle (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0x7fffffff)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! true) (msb (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! true) (is_zero (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))) (seq (set quot (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src)))) (set d0 (cast 32 false (cast 32 false (var quot)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! false) (msb (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! false) (is_zero (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10)))))))))))
d "divu.l -(a0), d0" 4c600000 0x0 (seq (set a0 (cast 32 false (- (var a0) (bv 32 0x4)))) (set src (loadw 0 32 (var a0))) (set dst (var d0)) (branch (is_zero (var src)) (seq (set trap_op (bv 32 0x6)) (set trap_vector (bv 32 0x5)) (goto m68k_trap)) (branch (! (ule (div (cast 64 false (var dst)) (cast 64 false (var src))) (bv 64 0xffffffff))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! true) (msb (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! true) (is_zero (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))) (seq (set quot (div (cast 64 false (var dst)) (cast 64 false (var src)))) (set d0 (cast 32 false (cast 32 false (var quot)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! false) (msb (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! false) (is_zero (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10)))))))))))
d "divs.l -(a0), d0" 4c600800 0x0 (seq (set a0 (cast 32 false (- (var a0) (bv 32 0x4)))) (set src (loadw 0 32 (var a0))) (set dst (var d0)) (branch (is_zero (var src)) (seq (set trap_op (bv 32 0x6)) (set trap_vector (bv 32 0x5)) (goto m68k_trap)) (branch (|| (&& (sle (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0xffffffff80000000)) (! (== (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0xffffffff80000000)))) (! (sle (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0x7fffffff)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! true) (msb (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! true) (is_zero (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))) (seq (set quot (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src)))) (set d0 (cast 32 false (cast 32 false (var quot)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! false) (msb (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! false) (is_zero (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10)))))))))))
d "divu.l 0x1(a0), d0" 4c6800000001 0x0 (seq (set src (loadw 0 32 (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))))) (set dst (var d0)) (branch (is_zero (var src)) (seq (set trap_op (bv 32 0x6)) (set trap_vector (bv 32 0x5)) (goto m68k_trap)) (branch (! (ule (div (cast 64 false (var dst)) (cast 64 false (var src))) (bv 64 0xffffffff))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! true) (msb (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! true) (is_zero (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))) (seq (set quot (div (cast 64 false (var dst)) (cast 64 false (var src)))) (set d0 (cast 32 false (cast 32 false (var quot)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! false) (msb (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! false) (is_zero (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10)))))))))))
d "divs.l 0xfff(a0), d0" 4c6808000fff 0x0 (seq (set src (loadw 0 32 (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0xfff))))) (set dst (var d0)) (branch (is_zero (var src)) (seq (set trap_op (bv 32 0x6)) (set trap_vector (bv 32 0x5)) (goto m68k_trap)) (branch (|| (&& (sle (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0xffffffff80000000)) (! (== (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0xffffffff80000000)))) (! (sle (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0x7fffffff)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! true) (msb (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! true) (is_zero (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))) (seq (set quot (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src)))) (set d0 (cast 32 false (cast 32 false (var quot)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! false) (msb (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! false) (is_zero (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10)))))))))))
d "divu.l 0x1(a0, d0.w), d0" 4c7000000001 0x0 (seq (set src (loadw 0 32 (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set dst (var d0)) (branch (is_zero (var src)) (seq (set trap_op (bv 32 0x6)) (set trap_vector (bv 32 0x5)) (goto m68k_trap)) (branch (! (ule (div (cast 64 false (var dst)) (cast 64 false (var src))) (bv 64 0xffffffff))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! true) (msb (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! true) (is_zero (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))) (seq (set quot (div (cast 64 false (var dst)) (cast 64 false (var src)))) (set d0 (cast 32 false (cast 32 false (var quot)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! false) (msb (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! false) (is_zero (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10)))))))))))
d "divs.l ([0x10001fff], 0x20002fff), d0" 4c7008000fff10001fff20002fff 0x0 (seq (set src (loadw 0 32 (+ (+ (loadw 0 32 (+ (bv 32 0x0) (bv 32 0x10001fff))) (bv 32 0x0)) (bv 32 0x20002fff)))) (set dst (var d0)) (branch (is_zero (var src)) (seq (set trap_op (bv 32 0x6)) (set trap_vector (bv 32 0x5)) (goto m68k_trap)) (branch (|| (&& (sle (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0xffffffff80000000)) (! (== (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0xffffffff80000000)))) (! (sle (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0x7fffffff)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! true) (msb (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! true) (is_zero (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))) (seq (set quot (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src)))) (set d0 (cast 32 false (cast 32 false (var quot)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! false) (msb (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! false) (is_zero (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10)))))))))))
d "divu.l ([0x20002fff], 0x30003fff), d1" 4c7010001fff20002fff30003fff 0x0 (seq (set src (loadw 0 32 (+ (+ (loadw 0 32 (+ (bv 32 0x0) (bv 32 0x20002fff))) (bv 32 0x0)) (bv 32 0x30003fff)))) (set dst (var d1)) (branch (is_zero (var src)) (seq (set trap_op (bv 32 0x6)) (set trap_vector (bv 32 0x5)) (goto m68k_trap)) (branch (! (ule (div (cast 64 false (var dst)) (cast 64 false (var src))) (bv 64 0xffffffff))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! true) (msb (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! true) (is_zero (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))) (seq (set quot (div (cast 64 false (var dst)) (cast 64 false (var src)))) (set rem (- (cast 64 false (var dst)) (* (var quot) (cast 64 false (var src))))) (set d1 (cast 32 false (cast 32 false (var quot)))) (set d0 (cast 32 false (cast 32 false (var rem)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! false) (msb (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! false) (is_zero (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10)))))))))))
d "divu.l 0x1.w, d0" 4c7800000001 0x0 (seq (set src (loadw 0 32 (bv 32 0x1))) (set dst (var d0)) (branch (is_zero (var src)) (seq (set trap_op (bv 32 0x6)) (set trap_vector (bv 32 0x5)) (goto m68k_trap)) (branch (! (ule (div (cast 64 false (var dst)) (cast 64 false (var src))) (bv 64 0xffffffff))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! true) (msb (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! true) (is_zero (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))) (seq (set quot (div (cast 64 false (var dst)) (cast 64 false (var src)))) (set d0 (cast 32 false (cast 32 false (var quot)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! false) (msb (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! false) (is_zero (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10)))))))))))
d "divs.l 0xfff.w, d0" 4c7808000fff 0x0 (seq (set src (loadw 0 32 (bv 32 0xfff))) (set dst (var d0)) (branch (is_zero (var src)) (seq (set trap_op (bv 32 0x6)) (set trap_vector (bv 32 0x5)) (goto m68k_trap)) (branch (|| (&& (sle (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0xffffffff80000000)) (! (== (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0xffffffff80000000)))) (! (sle (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0x7fffffff)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! true) (msb (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! true) (is_zero (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))) (seq (set quot (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src)))) (set d0 (cast 32 false (cast 32 false (var quot)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! false) (msb (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! false) (is_zero (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10)))))))))))
d "divu.l 0x10010.l, d0" 4c79000000010010 0x0 (seq (set src (loadw 0 32 (bv 32 0x10010))) (set dst (var d0)) (branch (is_zero (var src)) (seq (set trap_op (bv 32 0x6)) (set trap_vector (bv 32 0x5)) (goto m68k_trap)) (branch (! (ule (div (cast 64 false (var dst)) (cast 64 false (var src))) (bv 64 0xffffffff))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! true) (msb (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! true) (is_zero (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))) (seq (set quot (div (cast 64 false (var dst)) (cast 64 false (var src)))) (set d0 (cast 32 false (cast 32 false (var quot)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! false) (msb (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! false) (is_zero (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10)))))))))))
d "divs.l 0xfff1000.l, d0" 4c7908000fff1000 0x0 (seq (set src (loadw 0 32 (bv 32 0xfff1000))) (set dst (var d0)) (branch (is_zero (var src)) (seq (set trap_op (bv 32 0x6)) (set trap_vector (bv 32 0x5)) (goto m68k_trap)) (branch (|| (&& (sle (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0xffffffff80000000)) (! (== (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0xffffffff80000000)))) (! (sle (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0x7fffffff)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! true) (msb (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! true) (is_zero (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))) (seq (set quot (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src)))) (set d0 (cast 32 false (cast 32 false (var quot)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! false) (msb (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! false) (is_zero (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10)))))))))))
d "divu.l 0x5(pc), d0" 4c7a00000001 0x0 (seq (set src (loadw 0 32 (bv 32 0x5))) (set dst (var d0)) (branch (is_zero (var src)) (seq (set trap_op (bv 32 0x6)) (set trap_vector (bv 32 0x5)) (goto m68k_trap)) (branch (! (ule (div (cast 64 false (var dst)) (cast 64 false (var src))) (bv 64 0xffffffff))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! true) (msb (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! true) (is_zero (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))) (seq (set quot (div (cast 64 false (var dst)) (cast 64 false (var src)))) (set d0 (cast 32 false (cast 32 false (var quot)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! false) (msb (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! false) (is_zero (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10)))))))))))
d "divs.l 0x1003(pc), d0" 4c7a08000fff 0x0 (seq (set src (loadw 0 32 (bv 32 0x1003))) (set dst (var d0)) (branch (is_zero (var src)) (seq (set trap_op (bv 32 0x6)) (set trap_vector (bv 32 0x5)) (goto m68k_trap)) (branch (|| (&& (sle (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0xffffffff80000000)) (! (== (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0xffffffff80000000)))) (! (sle (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0x7fffffff)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! true) (msb (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! true) (is_zero (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))) (seq (set quot (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src)))) (set d0 (cast 32 false (cast 32 false (var quot)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! false) (msb (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! false) (is_zero (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10)))))))))))
d "divu.l 0x5(pc, d0.w), d0" 4c7b00000001 0x0 (seq (set src (loadw 0 32 (+ (bv 32 0x5) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set dst (var d0)) (branch (is_zero (var src)) (seq (set trap_op (bv 32 0x6)) (set trap_vector (bv 32 0x5)) (goto m68k_trap)) (branch (! (ule (div (cast 64 false (var dst)) (cast 64 false (var src))) (bv 64 0xffffffff))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! true) (msb (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! true) (is_zero (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))) (seq (set quot (div (cast 64 false (var dst)) (cast 64 false (var src)))) (set d0 (cast 32 false (cast 32 false (var quot)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! false) (msb (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! false) (is_zero (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10)))))))))))
d "divs.l ([0x10002003], 0x20002fff), d0" 4c7b08000fff10001fff20002fff 0x0 (seq (set src (loadw 0 32 (+ (+ (loadw 0 32 (+ (bv 32 0x0) (bv 32 0x10002001))) (bv 32 0x0)) (bv 32 0x20002fff)))) (set dst (var d0)) (branch (is_zero (var src)) (seq (set trap_op (bv 32 0x6)) (set trap_vector (bv 32 0x5)) (goto m68k_trap)) (branch (|| (&& (sle (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0xffffffff80000000)) (! (== (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0xffffffff80000000)))) (! (sle (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0x7fffffff)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! true) (msb (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! true) (is_zero (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))) (seq (set quot (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src)))) (set d0 (cast 32 false (cast 32 false (var quot)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! false) (msb (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! false) (is_zero (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10)))))))))))
d "divu.l ([0x20003003], 0x30003fff), d1" 4c7b10001fff20002fff30003fff 0x0 (seq (set src (loadw 0 32 (+ (+ (loadw 0 32 (+ (bv 32 0x0) (bv 32 0x20003001))) (bv 32 0x0)) (bv 32 0x30003fff)))) (set dst (var d1)) (branch (is_zero (var src)) (seq (set trap_op (bv 32 0x6)) (set trap_vector (bv 32 0x5)) (goto m68k_trap)) (branch (! (ule (div (cast 64 false (var dst)) (cast 64 false (var src))) (bv 64 0xffffffff))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! true) (msb (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! true) (is_zero (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))) (seq (set quot (div (cast 64 false (var dst)) (cast 64 false (var src)))) (set rem (- (cast 64 false (var dst)) (* (var quot) (cast 64 false (var src))))) (set d1 (cast 32 false (cast 32 false (var quot)))) (set d0 (cast 32 false (cast 32 false (var rem)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! false) (msb (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! false) (is_zero (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10)))))))))))
d "divu.l 0x10010, d0" 4c7c000000010010 0x0 (seq (set src (bv 32 0x10010)) (set dst (var d0)) (branch (is_zero (var src)) (seq (set trap_op (bv 32 0x6)) (set trap_vector (bv 32 0x5)) (goto m68k_trap)) (branch (! (ule (div (cast 64 false (var dst)) (cast 64 false (var src))) (bv 64 0xffffffff))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! true) (msb (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! true) (is_zero (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))) (seq (set quot (div (cast 64 false (var dst)) (cast 64 false (var src)))) (set d0 (cast 32 false (cast 32 false (var quot)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! false) (msb (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! false) (is_zero (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10)))))))))))
d "divs.l 0xfff1000, d0" 4c7c08000fff1000 0x0 (seq (set src (bv 32 0xfff1000)) (set dst (var d0)) (branch (is_zero (var src)) (seq (set trap_op (bv 32 0x6)) (set trap_vector (bv 32 0x5)) (goto m68k_trap)) (branch (|| (&& (sle (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0xffffffff80000000)) (! (== (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0xffffffff80000000)))) (! (sle (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src))) (bv 64 0x7fffffff)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! true) (msb (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! true) (is_zero (cast 32 false (bv 32 0x0)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite true (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))) (seq (set quot (sdiv (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src)))) (set d0 (cast 32 false (cast 32 false (var quot)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (&& (! false) (msb (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (&& (! false) (is_zero (cast 32 false (var quot)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10)))))))))))
d "rtd 0x4" 4e740004 0x0 (seq (set target (loadw 0 32 (var a7))) (set a7 (cast 32 false (+ (var a7) (bv 32 0x8)))) (jmp (var target)))
d "movec dfc, d0" 4e7a0001 0x0 (branch (! (is_zero (& (cast 16 false (var sr)) (bv 16 0x2000)))) (set d0 (cast 32 false (var dfc))) (seq (set trap_op (bv 32 0x9)) (set trap_vector (bv 32 0x8)) (goto m68k_privilege)))
d "movec d0, dfc" 4e7b0001 0x0 (branch (! (is_zero (& (cast 16 false (var sr)) (bv 16 0x2000)))) (set dfc (cast 32 false (& (var d0) (bv 32 0x7)))) (seq (set trap_op (bv 32 0x9)) (set trap_vector (bv 32 0x8)) (goto m68k_privilege)))
d "trapt.w 0x0" 50fa0000 0x0 (branch true (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x0)) (set trap_arg_bits (bv 32 0x10)) (goto m68k_trap)) empty)
d "trapt.l 0x1" 50fb00000001 0x0 (branch true (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x1)) (set trap_arg_bits (bv 32 0x20)) (goto m68k_trap)) empty)
d "trapt" 50fc 0x0 (branch true (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (goto m68k_trap)) empty)
d "trapf.w 0x0" 51fa0000 0x0 (branch false (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x0)) (set trap_arg_bits (bv 32 0x10)) (goto m68k_trap)) empty)
d "trapf.l 0x1" 51fb00000001 0x0 (branch false (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x1)) (set trap_arg_bits (bv 32 0x20)) (goto m68k_trap)) empty)
d "trapf" 51fc 0x0 (branch false (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (goto m68k_trap)) empty)
d "traphi.w 0x0" 52fa0000 0x0 (branch (&& (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x1))))) (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x4)))))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x0)) (set trap_arg_bits (bv 32 0x10)) (goto m68k_trap)) empty)
d "traphi.l 0x1" 52fb00000001 0x0 (branch (&& (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x1))))) (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x4)))))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x1)) (set trap_arg_bits (bv 32 0x20)) (goto m68k_trap)) empty)
d "traphi" 52fc 0x0 (branch (&& (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x1))))) (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x4)))))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (goto m68k_trap)) empty)
d "trapls.w 0x0" 53fa0000 0x0 (branch (|| (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x1)))) (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x4))))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x0)) (set trap_arg_bits (bv 32 0x10)) (goto m68k_trap)) empty)
d "trapls.l 0x1" 53fb00000001 0x0 (branch (|| (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x1)))) (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x4))))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x1)) (set trap_arg_bits (bv 32 0x20)) (goto m68k_trap)) empty)
d "trapls" 53fc 0x0 (branch (|| (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x1)))) (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x4))))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (goto m68k_trap)) empty)
d "trapcc.w 0x0" 54fa0000 0x0 (branch (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x1))))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x0)) (set trap_arg_bits (bv 32 0x10)) (goto m68k_trap)) empty)
d "trapcc.l 0x1" 54fb00000001 0x0 (branch (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x1))))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x1)) (set trap_arg_bits (bv 32 0x20)) (goto m68k_trap)) empty)
d "trapcc" 54fc 0x0 (branch (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x1))))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (goto m68k_trap)) empty)
d "trapcs.w 0x0" 55fa0000 0x0 (branch (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x1)))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x0)) (set trap_arg_bits (bv 32 0x10)) (goto m68k_trap)) empty)
d "trapcs.l 0x1" 55fb00000001 0x0 (branch (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x1)))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x1)) (set trap_arg_bits (bv 32 0x20)) (goto m68k_trap)) empty)
d "trapcs" 55fc 0x0 (branch (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x1)))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (goto m68k_trap)) empty)
d "trapne.w 0x0" 56fa0000 0x0 (branch (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x4))))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x0)) (set trap_arg_bits (bv 32 0x10)) (goto m68k_trap)) empty)
d "trapne.l 0x1" 56fb00000001 0x0 (branch (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x4))))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x1)) (set trap_arg_bits (bv 32 0x20)) (goto m68k_trap)) empty)
d "trapne" 56fc 0x0 (branch (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x4))))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (goto m68k_trap)) empty)
d "trapeq.w 0x0" 57fa0000 0x0 (branch (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x4)))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x0)) (set trap_arg_bits (bv 32 0x10)) (goto m68k_trap)) empty)
d "trapeq.l 0x1" 57fb00000001 0x0 (branch (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x4)))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x1)) (set trap_arg_bits (bv 32 0x20)) (goto m68k_trap)) empty)
d "trapeq" 57fc 0x0 (branch (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x4)))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (goto m68k_trap)) empty)
d "trapvc.w 0x0" 58fa0000 0x0 (branch (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x2))))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x0)) (set trap_arg_bits (bv 32 0x10)) (goto m68k_trap)) empty)
d "trapvc.l 0x1" 58fb00000001 0x0 (branch (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x2))))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x1)) (set trap_arg_bits (bv 32 0x20)) (goto m68k_trap)) empty)
d "trapvc" 58fc 0x0 (branch (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x2))))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (goto m68k_trap)) empty)
d "trapvs.w 0x0" 59fa0000 0x0 (branch (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x2)))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x0)) (set trap_arg_bits (bv 32 0x10)) (goto m68k_trap)) empty)
d "trapvs.l 0x1" 59fb00000001 0x0 (branch (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x2)))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x1)) (set trap_arg_bits (bv 32 0x20)) (goto m68k_trap)) empty)
d "trapvs" 59fc 0x0 (branch (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x2)))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (goto m68k_trap)) empty)
d "trappl.w 0x0" 5afa0000 0x0 (branch (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x8))))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x0)) (set trap_arg_bits (bv 32 0x10)) (goto m68k_trap)) empty)
d "trappl.l 0x1" 5afb00000001 0x0 (branch (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x8))))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x1)) (set trap_arg_bits (bv 32 0x20)) (goto m68k_trap)) empty)
d "trappl" 5afc 0x0 (branch (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x8))))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (goto m68k_trap)) empty)
d "trapmi.w 0x0" 5bfa0000 0x0 (branch (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x8)))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x0)) (set trap_arg_bits (bv 32 0x10)) (goto m68k_trap)) empty)
d "trapmi.l 0x1" 5bfb00000001 0x0 (branch (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x8)))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x1)) (set trap_arg_bits (bv 32 0x20)) (goto m68k_trap)) empty)
d "trapmi" 5bfc 0x0 (branch (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x8)))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (goto m68k_trap)) empty)
d "trapge.w 0x0" 5cfa0000 0x0 (branch (== (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x8)))) (bv 1 0x1) (bv 1 0x0)) (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x2)))) (bv 1 0x1) (bv 1 0x0))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x0)) (set trap_arg_bits (bv 32 0x10)) (goto m68k_trap)) empty)
d "trapge.l 0x1" 5cfb00000001 0x0 (branch (== (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x8)))) (bv 1 0x1) (bv 1 0x0)) (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x2)))) (bv 1 0x1) (bv 1 0x0))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x1)) (set trap_arg_bits (bv 32 0x20)) (goto m68k_trap)) empty)
d "trapge" 5cfc 0x0 (branch (== (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x8)))) (bv 1 0x1) (bv 1 0x0)) (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x2)))) (bv 1 0x1) (bv 1 0x0))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (goto m68k_trap)) empty)
d "traplt.w 0x0" 5dfa0000 0x0 (branch (! (== (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x8)))) (bv 1 0x1) (bv 1 0x0)) (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x2)))) (bv 1 0x1) (bv 1 0x0)))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x0)) (set trap_arg_bits (bv 32 0x10)) (goto m68k_trap)) empty)
d "traplt.l 0x1" 5dfb00000001 0x0 (branch (! (== (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x8)))) (bv 1 0x1) (bv 1 0x0)) (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x2)))) (bv 1 0x1) (bv 1 0x0)))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x1)) (set trap_arg_bits (bv 32 0x20)) (goto m68k_trap)) empty)
d "traplt" 5dfc 0x0 (branch (! (== (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x8)))) (bv 1 0x1) (bv 1 0x0)) (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x2)))) (bv 1 0x1) (bv 1 0x0)))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (goto m68k_trap)) empty)
d "trapgt.w 0x0" 5efa0000 0x0 (branch (&& (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x4))))) (== (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x8)))) (bv 1 0x1) (bv 1 0x0)) (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x2)))) (bv 1 0x1) (bv 1 0x0)))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x0)) (set trap_arg_bits (bv 32 0x10)) (goto m68k_trap)) empty)
d "trapgt.l 0x1" 5efb00000001 0x0 (branch (&& (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x4))))) (== (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x8)))) (bv 1 0x1) (bv 1 0x0)) (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x2)))) (bv 1 0x1) (bv 1 0x0)))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x1)) (set trap_arg_bits (bv 32 0x20)) (goto m68k_trap)) empty)
d "trapgt" 5efc 0x0 (branch (&& (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x4))))) (== (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x8)))) (bv 1 0x1) (bv 1 0x0)) (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x2)))) (bv 1 0x1) (bv 1 0x0)))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (goto m68k_trap)) empty)
d "traple.w 0x0" 5ffa0000 0x0 (branch (|| (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x4)))) (! (== (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x8)))) (bv 1 0x1) (bv 1 0x0)) (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x2)))) (bv 1 0x1) (bv 1 0x0))))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x0)) (set trap_arg_bits (bv 32 0x10)) (goto m68k_trap)) empty)
d "traple.l 0x1" 5ffb00000001 0x0 (branch (|| (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x4)))) (! (== (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x8)))) (bv 1 0x1) (bv 1 0x0)) (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x2)))) (bv 1 0x1) (bv 1 0x0))))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (set trap_arg (bv 32 0x1)) (set trap_arg_bits (bv 32 0x20)) (goto m68k_trap)) empty)
d "traple" 5ffc 0x0 (branch (|| (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x4)))) (! (== (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x8)))) (bv 1 0x1) (bv 1 0x0)) (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x2)))) (bv 1 0x1) (bv 1 0x0))))) (seq (set trap_op (bv 32 0x2)) (set trap_vector (bv 32 0x7)) (goto m68k_trap)) empty)
d "bra.l 0x3" 60ff00000001 0x0 (jmp (bv 32 0x3))
d "bsr.l 0x3" 61ff00000001 0x0 (seq (set push_value (bv 32 0x6)) (set a7 (cast 32 false (- (var a7) (bv 32 0x4)))) (storew 0 (var a7) (cast 32 false (var push_value))) (jmp (bv 32 0x3)))
d "bhi.l 0x3" 62ff00000001 0x0 (branch (&& (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x1))))) (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x4)))))) (jmp (bv 32 0x3)) empty)
d "bls.l 0x3" 63ff00000001 0x0 (branch (|| (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x1)))) (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x4))))) (jmp (bv 32 0x3)) empty)
d "bcc.l 0x3" 64ff00000001 0x0 (branch (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x1))))) (jmp (bv 32 0x3)) empty)
d "bcs.l 0x3" 65ff00000001 0x0 (branch (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x1)))) (jmp (bv 32 0x3)) empty)
d "bne.l 0x3" 66ff00000001 0x0 (branch (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x4))))) (jmp (bv 32 0x3)) empty)
d "beq.l 0x3" 67ff00000001 0x0 (branch (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x4)))) (jmp (bv 32 0x3)) empty)
d "bvc.l 0x3" 68ff00000001 0x0 (branch (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x2))))) (jmp (bv 32 0x3)) empty)
d "bvs.l 0x3" 69ff00000001 0x0 (branch (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x2)))) (jmp (bv 32 0x3)) empty)
d "bpl.l 0x3" 6aff00000001 0x0 (branch (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x8))))) (jmp (bv 32 0x3)) empty)
d "bmi.l 0x3" 6bff00000001 0x0 (branch (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x8)))) (jmp (bv 32 0x3)) empty)
d "bge.l 0x3" 6cff00000001 0x0 (branch (== (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x8)))) (bv 1 0x1) (bv 1 0x0)) (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x2)))) (bv 1 0x1) (bv 1 0x0))) (jmp (bv 32 0x3)) empty)
d "blt.l 0x3" 6dff00000001 0x0 (branch (! (== (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x8)))) (bv 1 0x1) (bv 1 0x0)) (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x2)))) (bv 1 0x1) (bv 1 0x0)))) (jmp (bv 32 0x3)) empty)
d "bgt.l 0x3" 6eff00000001 0x0 (branch (&& (! (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x4))))) (== (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x8)))) (bv 1 0x1) (bv 1 0x0)) (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x2)))) (bv 1 0x1) (bv 1 0x0)))) (jmp (bv 32 0x3)) empty)
d "ble.l 0x3" 6fff00000001 0x0 (branch (|| (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x4)))) (! (== (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x8)))) (bv 1 0x1) (bv 1 0x0)) (ite (! (is_zero (& (cast 8 false (var sr)) (bv 8 0x2)))) (bv 1 0x1) (bv 1 0x0))))) (jmp (bv 32 0x3)) empty)
d "pack d0, d0" 81400000 0x0 (seq (set src (cast 16 false (var d0))) (set adjustment (bv 16 0x0)) (set adjusted (+ (cast 16 false (var src)) (var adjustment))) (set res (cast 8 false (| (>> (& (var adjusted) (bv 16 0xf00)) (bv 8 0x4) false) (& (var adjusted) (bv 16 0xf))))) (set d0 (| (& (var d0) (bv 32 0xffffff00)) (cast 32 false (var res)))))
d "pack d0, d0, 0x1" 81400001 0x0 (seq (set src (cast 16 false (var d0))) (set adjustment (bv 16 0x1)) (set adjusted (+ (cast 16 false (var src)) (var adjustment))) (set res (cast 8 false (| (>> (& (var adjusted) (bv 16 0xf00)) (bv 8 0x4) false) (& (var adjusted) (bv 16 0xf))))) (set d0 (| (& (var d0) (bv 32 0xffffff00)) (cast 32 false (var res)))))
d "pack -(a0), -(a0)" 81480000 0x0 (seq (set a0 (cast 32 false (- (var a0) (bv 32 0x1)))) (set src_low (loadw 0 8 (var a0))) (set a0 (cast 32 false (- (var a0) (bv 32 0x1)))) (set src_high (loadw 0 8 (var a0))) (set src (append (var src_high) (var src_low))) (set adjustment (bv 16 0x0)) (set adjusted (+ (cast 16 false (var src)) (var adjustment))) (set res (cast 8 false (| (>> (& (var adjusted) (bv 16 0xf00)) (bv 8 0x4) false) (& (var adjusted) (bv 16 0xf))))) (set a0 (cast 32 false (- (var a0) (bv 32 0x1)))) (storew 0 (var a0) (cast 8 false (var res))))
d "pack -(a0), -(a0), 0x1" 81480001 0x0 (seq (set a0 (cast 32 false (- (var a0) (bv 32 0x1)))) (set src_low (loadw 0 8 (var a0))) (set a0 (cast 32 false (- (var a0) (bv 32 0x1)))) (set src_high (loadw 0 8 (var a0))) (set src (append (var src_high) (var src_low))) (set adjustment (bv 16 0x1)) (set adjusted (+ (cast 16 false (var src)) (var adjustment))) (set res (cast 8 false (| (>> (& (var adjusted) (bv 16 0xf00)) (bv 8 0x4) false) (& (var adjusted) (bv 16 0xf))))) (set a0 (cast 32 false (- (var a0) (bv 32 0x1)))) (storew 0 (var a0) (cast 8 false (var res))))
d "unpk d0, d0" 81800000 0x0 (seq (set src (cast 8 false (var d0))) (set adjustment (bv 16 0x0)) (set expanded (| (<< (cast 16 false (& (var src) (bv 8 0xf0))) (bv 8 0x4) false) (cast 16 false (& (var src) (bv 8 0xf))))) (set res (+ (var expanded) (var adjustment))) (set d0 (| (& (var d0) (bv 32 0xffff0000)) (cast 32 false (var res)))))
d "unpk d0, d0, 0x1" 81800001 0x0 (seq (set src (cast 8 false (var d0))) (set adjustment (bv 16 0x1)) (set expanded (| (<< (cast 16 false (& (var src) (bv 8 0xf0))) (bv 8 0x4) false) (cast 16 false (& (var src) (bv 8 0xf))))) (set res (+ (var expanded) (var adjustment))) (set d0 (| (& (var d0) (bv 32 0xffff0000)) (cast 32 false (var res)))))
d "unpk -(a0), -(a0)" 81880000 0x0 (seq (set a0 (cast 32 false (- (var a0) (bv 32 0x1)))) (set src (loadw 0 8 (var a0))) (set adjustment (bv 16 0x0)) (set expanded (| (<< (cast 16 false (& (var src) (bv 8 0xf0))) (bv 8 0x4) false) (cast 16 false (& (var src) (bv 8 0xf))))) (set res (+ (var expanded) (var adjustment))) (set a0 (cast 32 false (- (var a0) (bv 32 0x1)))) (storew 0 (var a0) (cast 8 false (cast 8 false (var res)))) (set a0 (cast 32 false (- (var a0) (bv 32 0x1)))) (storew 0 (var a0) (cast 8 false (cast 8 false (>> (var res) (bv 8 0x8) false)))))
d "unpk -(a0), -(a0), 0x1" 81880001 0x0 (seq (set a0 (cast 32 false (- (var a0) (bv 32 0x1)))) (set src (loadw 0 8 (var a0))) (set adjustment (bv 16 0x1)) (set expanded (| (<< (cast 16 false (& (var src) (bv 8 0xf0))) (bv 8 0x4) false) (cast 16 false (& (var src) (bv 8 0xf))))) (set res (+ (var expanded) (var adjustment))) (set a0 (cast 32 false (- (var a0) (bv 32 0x1)))) (storew 0 (var a0) (cast 8 false (cast 8 false (var res)))) (set a0 (cast 32 false (- (var a0) (bv 32 0x1)))) (storew 0 (var a0) (cast 8 false (cast 8 false (>> (var res) (bv 8 0x8) false)))))
d "bftst d0{0:32}" e8c00000 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set bit_offset (mod (var offset) (bv 32 0x20))) (set container (append (var d0) (var d0))) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bftst (a0){0:32}" e8d00000 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (var a0))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bftst 0x1(a0){0:32}" e8e800000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bftst 0x1(a0, d0.w){0:32}" e8f000000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bftst (a0, d0.w){3:d7}" e8f000ff0100 0x0 (seq (set offset (bv 32 0x3)) (set width (ite (is_zero (& (var d7) (bv 32 0x1f))) (bv 32 0x20) (& (var d7) (bv 32 0x1f)))) (set base (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x0))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bftst ([0x18001ff, a0], 0x8000fff){4:32}" e8f00100017f018001ff08000fff 0x0 (seq (set offset (bv 32 0x4)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (+ (loadw 0 32 (+ (var a0) (bv 32 0x18001ff))) (bv 32 0x0)) (bv 32 0x8000fff)))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bftst 0x9c.w{20:5}" e8f80505009c 0x0 (seq (set offset (bv 32 0x14)) (set width (bv 32 0x5)) (set base (cast 32 false (bv 32 0x9c))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bftst 0x9c.w{d0:32}" e8f80800009c 0x0 (seq (set offset (var d0)) (set width (bv 32 0x20)) (set base (cast 32 false (bv 32 0x9c))) (set bit_offset (& (var offset) (bv 32 0x7))) (set byte_offset (sdiv (- (var offset) (var bit_offset)) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bftst 0x9c.w{d1:d0}" e8f80860009c 0x0 (seq (set offset (var d1)) (set width (ite (is_zero (& (var d0) (bv 32 0x1f))) (bv 32 0x20) (& (var d0) (bv 32 0x1f)))) (set base (cast 32 false (bv 32 0x9c))) (set bit_offset (& (var offset) (bv 32 0x7))) (set byte_offset (sdiv (- (var offset) (var bit_offset)) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bftst 0x10010.l{0:32}" e8f9000000010010 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (bv 32 0x10010))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bftst 0x5(pc){0:32}" e8fa00000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (bv 32 0x5))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bftst 0x5(pc, d0.w){0:32}" e8fb00000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (bv 32 0x5) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bftst 0x4(pc, d0.w){3:d7}" e8fb00ff0100 0x0 (seq (set offset (bv 32 0x3)) (set width (ite (is_zero (& (var d7) (bv 32 0x1f))) (bv 32 0x20) (& (var d7) (bv 32 0x1f)))) (set base (cast 32 false (+ (bv 32 0x4) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bftst ([0x1800203, pc], 0x8000fff){4:32}" e8fb0100017f018001ff08000fff 0x0 (seq (set offset (bv 32 0x4)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (+ (loadw 0 32 (+ (bv 32 0x2) (bv 32 0x1800201))) (bv 32 0x0)) (bv 32 0x8000fff)))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfextu d0{0:32}, d0" e9c00000 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set bit_offset (mod (var offset) (bv 32 0x20))) (set container (append (var d0) (var d0))) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set res (var field)) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfextu (a0){0:32}, d0" e9d00000 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (var a0))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set res (var field)) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfextu 0x1(a0){0:32}, d0" e9e800000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set res (var field)) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfextu 0x1(a0, d0.w){0:32}, d0" e9f000000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set res (var field)) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfextu (a0, d0.w){3:d7}, d0" e9f000ff0100 0x0 (seq (set offset (bv 32 0x3)) (set width (ite (is_zero (& (var d7) (bv 32 0x1f))) (bv 32 0x20) (& (var d7) (bv 32 0x1f)))) (set base (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x0))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set res (var field)) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfextu ([0x18001ff, a0], 0x8000fff){4:32}, d0" e9f00100017f018001ff08000fff 0x0 (seq (set offset (bv 32 0x4)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (+ (loadw 0 32 (+ (var a0) (bv 32 0x18001ff))) (bv 32 0x0)) (bv 32 0x8000fff)))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set res (var field)) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfextu 0x1.w{0:32}, d0" e9f800000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (bv 32 0x1))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set res (var field)) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfextu 0x10010.l{0:32}, d0" e9f9000000010010 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (bv 32 0x10010))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set res (var field)) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfextu 0x5(pc){0:32}, d0" e9fa00000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (bv 32 0x5))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set res (var field)) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfextu 0x5(pc, d0.w){0:32}, d0" e9fb00000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (bv 32 0x5) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set res (var field)) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfextu 0x4(pc, d0.w){3:d7}, d0" e9fb00ff0100 0x0 (seq (set offset (bv 32 0x3)) (set width (ite (is_zero (& (var d7) (bv 32 0x1f))) (bv 32 0x20) (& (var d7) (bv 32 0x1f)))) (set base (cast 32 false (+ (bv 32 0x4) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set res (var field)) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfextu ([0x1800203, pc], 0x8000fff){4:32}, d0" e9fb0100017f018001ff08000fff 0x0 (seq (set offset (bv 32 0x4)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (+ (loadw 0 32 (+ (bv 32 0x2) (bv 32 0x1800201))) (bv 32 0x0)) (bv 32 0x8000fff)))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set res (var field)) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfchg d0{0:32}" eac00000 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set bit_offset (mod (var offset) (bv 32 0x20))) (set container (append (var d0) (var d0))) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set d0 (cast 32 false (| (& (cast 32 false (>> (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (^ (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (bv 8 0x20) false)) (~ (cast 32 false (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)))) (& (cast 32 false (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (^ (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (cast 32 false (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfchg (a0){0:32}" ead00000 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (var a0))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (^ (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfchg 0x1(a0){0:32}" eae800000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (^ (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfchg 0x1(a0, d0.w){0:32}" eaf000000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (^ (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfchg (a0, d0.w){3:d7}" eaf000ff0100 0x0 (seq (set offset (bv 32 0x3)) (set width (ite (is_zero (& (var d7) (bv 32 0x1f))) (bv 32 0x20) (& (var d7) (bv 32 0x1f)))) (set base (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x0))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (^ (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfchg ([0x18001ff, a0], 0x8000fff){4:32}" eaf00100017f018001ff08000fff 0x0 (seq (set offset (bv 32 0x4)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (+ (loadw 0 32 (+ (var a0) (bv 32 0x18001ff))) (bv 32 0x0)) (bv 32 0x8000fff)))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (^ (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfchg 0x1.w{0:32}" eaf800000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (bv 32 0x1))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (^ (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfchg 0x10010.l{0:32}" eaf9000000010010 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (bv 32 0x10010))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (^ (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfexts d0{0:32}, d0" ebc00000 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set bit_offset (mod (var offset) (bv 32 0x20))) (set container (append (var d0) (var d0))) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set res (ite (! (is_zero (& (var field) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (| (var field) (~ (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (var field))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfexts (a0){0:32}, d0" ebd00000 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (var a0))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set res (ite (! (is_zero (& (var field) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (| (var field) (~ (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (var field))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfexts 0x1(a0){0:32}, d0" ebe800000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set res (ite (! (is_zero (& (var field) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (| (var field) (~ (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (var field))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfexts 0x1(a0, d0.w){0:32}, d0" ebf000000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set res (ite (! (is_zero (& (var field) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (| (var field) (~ (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (var field))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfexts (a0, d0.w){3:d7}, d0" ebf000ff0100 0x0 (seq (set offset (bv 32 0x3)) (set width (ite (is_zero (& (var d7) (bv 32 0x1f))) (bv 32 0x20) (& (var d7) (bv 32 0x1f)))) (set base (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x0))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set res (ite (! (is_zero (& (var field) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (| (var field) (~ (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (var field))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfexts ([0x18001ff, a0], 0x8000fff){4:32}, d0" ebf00100017f018001ff08000fff 0x0 (seq (set offset (bv 32 0x4)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (+ (loadw 0 32 (+ (var a0) (bv 32 0x18001ff))) (bv 32 0x0)) (bv 32 0x8000fff)))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set res (ite (! (is_zero (& (var field) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (| (var field) (~ (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (var field))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfexts 0x1.w{0:32}, d0" ebf800000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (bv 32 0x1))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set res (ite (! (is_zero (& (var field) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (| (var field) (~ (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (var field))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfexts 0x10010.l{0:32}, d0" ebf9000000010010 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (bv 32 0x10010))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set res (ite (! (is_zero (& (var field) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (| (var field) (~ (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (var field))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfexts 0x5(pc){0:32}, d0" ebfa00000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (bv 32 0x5))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set res (ite (! (is_zero (& (var field) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (| (var field) (~ (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (var field))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfexts 0x5(pc, d0.w){0:32}, d0" ebfb00000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (bv 32 0x5) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set res (ite (! (is_zero (& (var field) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (| (var field) (~ (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (var field))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfexts 0x4(pc, d0.w){3:d7}, d0" ebfb00ff0100 0x0 (seq (set offset (bv 32 0x3)) (set width (ite (is_zero (& (var d7) (bv 32 0x1f))) (bv 32 0x20) (& (var d7) (bv 32 0x1f)))) (set base (cast 32 false (+ (bv 32 0x4) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set res (ite (! (is_zero (& (var field) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (| (var field) (~ (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (var field))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfexts ([0x1800203, pc], 0x8000fff){4:32}, d0" ebfb0100017f018001ff08000fff 0x0 (seq (set offset (bv 32 0x4)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (+ (loadw 0 32 (+ (bv 32 0x2) (bv 32 0x1800201))) (bv 32 0x0)) (bv 32 0x8000fff)))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set res (ite (! (is_zero (& (var field) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (| (var field) (~ (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (var field))) (set d0 (cast 32 false (var res))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfclr d0{0:32}" ecc00000 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set bit_offset (mod (var offset) (bv 32 0x20))) (set container (append (var d0) (var d0))) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set d0 (cast 32 false (| (& (cast 32 false (>> (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (bv 32 0x0)) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (bv 8 0x20) false)) (~ (cast 32 false (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)))) (& (cast 32 false (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (bv 32 0x0)) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (cast 32 false (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfclr (a0){0:32}" ecd00000 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (var a0))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (bv 32 0x0)) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfclr 0x1(a0){0:32}" ece800000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (bv 32 0x0)) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfclr 0x1(a0, d0.w){0:32}" ecf000000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (bv 32 0x0)) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfclr (a0, d0.w){3:d7}" ecf000ff0100 0x0 (seq (set offset (bv 32 0x3)) (set width (ite (is_zero (& (var d7) (bv 32 0x1f))) (bv 32 0x20) (& (var d7) (bv 32 0x1f)))) (set base (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x0))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (bv 32 0x0)) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfclr ([0x18001ff, a0], 0x8000fff){4:32}" ecf00100017f018001ff08000fff 0x0 (seq (set offset (bv 32 0x4)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (+ (loadw 0 32 (+ (var a0) (bv 32 0x18001ff))) (bv 32 0x0)) (bv 32 0x8000fff)))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (bv 32 0x0)) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfclr 0x1.w{0:32}" ecf800000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (bv 32 0x1))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (bv 32 0x0)) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfclr 0x10010.l{0:32}" ecf9000000010010 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (bv 32 0x10010))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (bv 32 0x0)) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfffo d0{0:32}, d0" edc00000 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set bit_offset (mod (var offset) (bv 32 0x20))) (set container (append (var d0) (var d0))) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set scan (<< (var field) (- (bv 8 0x20) (cast 8 false (var width))) false)) (set first (ite (&& (&& (ule (bv 32 0x0) (var width)) (! (== (bv 32 0x0) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80000000))))) (bv 32 0x0) (ite (&& (&& (ule (bv 32 0x1) (var width)) (! (== (bv 32 0x1) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40000000))))) (bv 32 0x1) (ite (&& (&& (ule (bv 32 0x2) (var width)) (! (== (bv 32 0x2) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20000000))))) (bv 32 0x2) (ite (&& (&& (ule (bv 32 0x3) (var width)) (! (== (bv 32 0x3) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10000000))))) (bv 32 0x3) (ite (&& (&& (ule (bv 32 0x4) (var width)) (! (== (bv 32 0x4) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8000000))))) (bv 32 0x4) (ite (&& (&& (ule (bv 32 0x5) (var width)) (! (== (bv 32 0x5) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4000000))))) (bv 32 0x5) (ite (&& (&& (ule (bv 32 0x6) (var width)) (! (== (bv 32 0x6) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2000000))))) (bv 32 0x6) (ite (&& (&& (ule (bv 32 0x7) (var width)) (! (== (bv 32 0x7) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1000000))))) (bv 32 0x7) (ite (&& (&& (ule (bv 32 0x8) (var width)) (! (== (bv 32 0x8) (var width)))) (! (is_zero (& (var scan) (bv 32 0x800000))))) (bv 32 0x8) (ite (&& (&& (ule (bv 32 0x9) (var width)) (! (== (bv 32 0x9) (var width)))) (! (is_zero (& (var scan) (bv 32 0x400000))))) (bv 32 0x9) (ite (&& (&& (ule (bv 32 0xa) (var width)) (! (== (bv 32 0xa) (var width)))) (! (is_zero (& (var scan) (bv 32 0x200000))))) (bv 32 0xa) (ite (&& (&& (ule (bv 32 0xb) (var width)) (! (== (bv 32 0xb) (var width)))) (! (is_zero (& (var scan) (bv 32 0x100000))))) (bv 32 0xb) (ite (&& (&& (ule (bv 32 0xc) (var width)) (! (== (bv 32 0xc) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80000))))) (bv 32 0xc) (ite (&& (&& (ule (bv 32 0xd) (var width)) (! (== (bv 32 0xd) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40000))))) (bv 32 0xd) (ite (&& (&& (ule (bv 32 0xe) (var width)) (! (== (bv 32 0xe) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20000))))) (bv 32 0xe) (ite (&& (&& (ule (bv 32 0xf) (var width)) (! (== (bv 32 0xf) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10000))))) (bv 32 0xf) (ite (&& (&& (ule (bv 32 0x10) (var width)) (! (== (bv 32 0x10) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8000))))) (bv 32 0x10) (ite (&& (&& (ule (bv 32 0x11) (var width)) (! (== (bv 32 0x11) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4000))))) (bv 32 0x11) (ite (&& (&& (ule (bv 32 0x12) (var width)) (! (== (bv 32 0x12) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2000))))) (bv 32 0x12) (ite (&& (&& (ule (bv 32 0x13) (var width)) (! (== (bv 32 0x13) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1000))))) (bv 32 0x13) (ite (&& (&& (ule (bv 32 0x14) (var width)) (! (== (bv 32 0x14) (var width)))) (! (is_zero (& (var scan) (bv 32 0x800))))) (bv 32 0x14) (ite (&& (&& (ule (bv 32 0x15) (var width)) (! (== (bv 32 0x15) (var width)))) (! (is_zero (& (var scan) (bv 32 0x400))))) (bv 32 0x15) (ite (&& (&& (ule (bv 32 0x16) (var width)) (! (== (bv 32 0x16) (var width)))) (! (is_zero (& (var scan) (bv 32 0x200))))) (bv 32 0x16) (ite (&& (&& (ule (bv 32 0x17) (var width)) (! (== (bv 32 0x17) (var width)))) (! (is_zero (& (var scan) (bv 32 0x100))))) (bv 32 0x17) (ite (&& (&& (ule (bv 32 0x18) (var width)) (! (== (bv 32 0x18) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80))))) (bv 32 0x18) (ite (&& (&& (ule (bv 32 0x19) (var width)) (! (== (bv 32 0x19) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40))))) (bv 32 0x19) (ite (&& (&& (ule (bv 32 0x1a) (var width)) (! (== (bv 32 0x1a) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20))))) (bv 32 0x1a) (ite (&& (&& (ule (bv 32 0x1b) (var width)) (! (== (bv 32 0x1b) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10))))) (bv 32 0x1b) (ite (&& (&& (ule (bv 32 0x1c) (var width)) (! (== (bv 32 0x1c) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8))))) (bv 32 0x1c) (ite (&& (&& (ule (bv 32 0x1d) (var width)) (! (== (bv 32 0x1d) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4))))) (bv 32 0x1d) (ite (&& (&& (ule (bv 32 0x1e) (var width)) (! (== (bv 32 0x1e) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2))))) (bv 32 0x1e) (ite (&& (&& (ule (bv 32 0x1f) (var width)) (! (== (bv 32 0x1f) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1))))) (bv 32 0x1f) (var width)))))))))))))))))))))))))))))))))) (set d0 (cast 32 false (+ (var offset) (var first)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfffo (a0){0:32}, d0" edd00000 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (var a0))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set scan (<< (var field) (- (bv 8 0x20) (cast 8 false (var width))) false)) (set first (ite (&& (&& (ule (bv 32 0x0) (var width)) (! (== (bv 32 0x0) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80000000))))) (bv 32 0x0) (ite (&& (&& (ule (bv 32 0x1) (var width)) (! (== (bv 32 0x1) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40000000))))) (bv 32 0x1) (ite (&& (&& (ule (bv 32 0x2) (var width)) (! (== (bv 32 0x2) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20000000))))) (bv 32 0x2) (ite (&& (&& (ule (bv 32 0x3) (var width)) (! (== (bv 32 0x3) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10000000))))) (bv 32 0x3) (ite (&& (&& (ule (bv 32 0x4) (var width)) (! (== (bv 32 0x4) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8000000))))) (bv 32 0x4) (ite (&& (&& (ule (bv 32 0x5) (var width)) (! (== (bv 32 0x5) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4000000))))) (bv 32 0x5) (ite (&& (&& (ule (bv 32 0x6) (var width)) (! (== (bv 32 0x6) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2000000))))) (bv 32 0x6) (ite (&& (&& (ule (bv 32 0x7) (var width)) (! (== (bv 32 0x7) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1000000))))) (bv 32 0x7) (ite (&& (&& (ule (bv 32 0x8) (var width)) (! (== (bv 32 0x8) (var width)))) (! (is_zero (& (var scan) (bv 32 0x800000))))) (bv 32 0x8) (ite (&& (&& (ule (bv 32 0x9) (var width)) (! (== (bv 32 0x9) (var width)))) (! (is_zero (& (var scan) (bv 32 0x400000))))) (bv 32 0x9) (ite (&& (&& (ule (bv 32 0xa) (var width)) (! (== (bv 32 0xa) (var width)))) (! (is_zero (& (var scan) (bv 32 0x200000))))) (bv 32 0xa) (ite (&& (&& (ule (bv 32 0xb) (var width)) (! (== (bv 32 0xb) (var width)))) (! (is_zero (& (var scan) (bv 32 0x100000))))) (bv 32 0xb) (ite (&& (&& (ule (bv 32 0xc) (var width)) (! (== (bv 32 0xc) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80000))))) (bv 32 0xc) (ite (&& (&& (ule (bv 32 0xd) (var width)) (! (== (bv 32 0xd) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40000))))) (bv 32 0xd) (ite (&& (&& (ule (bv 32 0xe) (var width)) (! (== (bv 32 0xe) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20000))))) (bv 32 0xe) (ite (&& (&& (ule (bv 32 0xf) (var width)) (! (== (bv 32 0xf) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10000))))) (bv 32 0xf) (ite (&& (&& (ule (bv 32 0x10) (var width)) (! (== (bv 32 0x10) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8000))))) (bv 32 0x10) (ite (&& (&& (ule (bv 32 0x11) (var width)) (! (== (bv 32 0x11) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4000))))) (bv 32 0x11) (ite (&& (&& (ule (bv 32 0x12) (var width)) (! (== (bv 32 0x12) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2000))))) (bv 32 0x12) (ite (&& (&& (ule (bv 32 0x13) (var width)) (! (== (bv 32 0x13) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1000))))) (bv 32 0x13) (ite (&& (&& (ule (bv 32 0x14) (var width)) (! (== (bv 32 0x14) (var width)))) (! (is_zero (& (var scan) (bv 32 0x800))))) (bv 32 0x14) (ite (&& (&& (ule (bv 32 0x15) (var width)) (! (== (bv 32 0x15) (var width)))) (! (is_zero (& (var scan) (bv 32 0x400))))) (bv 32 0x15) (ite (&& (&& (ule (bv 32 0x16) (var width)) (! (== (bv 32 0x16) (var width)))) (! (is_zero (& (var scan) (bv 32 0x200))))) (bv 32 0x16) (ite (&& (&& (ule (bv 32 0x17) (var width)) (! (== (bv 32 0x17) (var width)))) (! (is_zero (& (var scan) (bv 32 0x100))))) (bv 32 0x17) (ite (&& (&& (ule (bv 32 0x18) (var width)) (! (== (bv 32 0x18) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80))))) (bv 32 0x18) (ite (&& (&& (ule (bv 32 0x19) (var width)) (! (== (bv 32 0x19) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40))))) (bv 32 0x19) (ite (&& (&& (ule (bv 32 0x1a) (var width)) (! (== (bv 32 0x1a) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20))))) (bv 32 0x1a) (ite (&& (&& (ule (bv 32 0x1b) (var width)) (! (== (bv 32 0x1b) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10))))) (bv 32 0x1b) (ite (&& (&& (ule (bv 32 0x1c) (var width)) (! (== (bv 32 0x1c) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8))))) (bv 32 0x1c) (ite (&& (&& (ule (bv 32 0x1d) (var width)) (! (== (bv 32 0x1d) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4))))) (bv 32 0x1d) (ite (&& (&& (ule (bv 32 0x1e) (var width)) (! (== (bv 32 0x1e) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2))))) (bv 32 0x1e) (ite (&& (&& (ule (bv 32 0x1f) (var width)) (! (== (bv 32 0x1f) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1))))) (bv 32 0x1f) (var width)))))))))))))))))))))))))))))))))) (set d0 (cast 32 false (+ (var offset) (var first)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfffo 0x1(a0){0:32}, d0" ede800000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set scan (<< (var field) (- (bv 8 0x20) (cast 8 false (var width))) false)) (set first (ite (&& (&& (ule (bv 32 0x0) (var width)) (! (== (bv 32 0x0) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80000000))))) (bv 32 0x0) (ite (&& (&& (ule (bv 32 0x1) (var width)) (! (== (bv 32 0x1) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40000000))))) (bv 32 0x1) (ite (&& (&& (ule (bv 32 0x2) (var width)) (! (== (bv 32 0x2) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20000000))))) (bv 32 0x2) (ite (&& (&& (ule (bv 32 0x3) (var width)) (! (== (bv 32 0x3) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10000000))))) (bv 32 0x3) (ite (&& (&& (ule (bv 32 0x4) (var width)) (! (== (bv 32 0x4) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8000000))))) (bv 32 0x4) (ite (&& (&& (ule (bv 32 0x5) (var width)) (! (== (bv 32 0x5) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4000000))))) (bv 32 0x5) (ite (&& (&& (ule (bv 32 0x6) (var width)) (! (== (bv 32 0x6) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2000000))))) (bv 32 0x6) (ite (&& (&& (ule (bv 32 0x7) (var width)) (! (== (bv 32 0x7) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1000000))))) (bv 32 0x7) (ite (&& (&& (ule (bv 32 0x8) (var width)) (! (== (bv 32 0x8) (var width)))) (! (is_zero (& (var scan) (bv 32 0x800000))))) (bv 32 0x8) (ite (&& (&& (ule (bv 32 0x9) (var width)) (! (== (bv 32 0x9) (var width)))) (! (is_zero (& (var scan) (bv 32 0x400000))))) (bv 32 0x9) (ite (&& (&& (ule (bv 32 0xa) (var width)) (! (== (bv 32 0xa) (var width)))) (! (is_zero (& (var scan) (bv 32 0x200000))))) (bv 32 0xa) (ite (&& (&& (ule (bv 32 0xb) (var width)) (! (== (bv 32 0xb) (var width)))) (! (is_zero (& (var scan) (bv 32 0x100000))))) (bv 32 0xb) (ite (&& (&& (ule (bv 32 0xc) (var width)) (! (== (bv 32 0xc) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80000))))) (bv 32 0xc) (ite (&& (&& (ule (bv 32 0xd) (var width)) (! (== (bv 32 0xd) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40000))))) (bv 32 0xd) (ite (&& (&& (ule (bv 32 0xe) (var width)) (! (== (bv 32 0xe) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20000))))) (bv 32 0xe) (ite (&& (&& (ule (bv 32 0xf) (var width)) (! (== (bv 32 0xf) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10000))))) (bv 32 0xf) (ite (&& (&& (ule (bv 32 0x10) (var width)) (! (== (bv 32 0x10) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8000))))) (bv 32 0x10) (ite (&& (&& (ule (bv 32 0x11) (var width)) (! (== (bv 32 0x11) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4000))))) (bv 32 0x11) (ite (&& (&& (ule (bv 32 0x12) (var width)) (! (== (bv 32 0x12) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2000))))) (bv 32 0x12) (ite (&& (&& (ule (bv 32 0x13) (var width)) (! (== (bv 32 0x13) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1000))))) (bv 32 0x13) (ite (&& (&& (ule (bv 32 0x14) (var width)) (! (== (bv 32 0x14) (var width)))) (! (is_zero (& (var scan) (bv 32 0x800))))) (bv 32 0x14) (ite (&& (&& (ule (bv 32 0x15) (var width)) (! (== (bv 32 0x15) (var width)))) (! (is_zero (& (var scan) (bv 32 0x400))))) (bv 32 0x15) (ite (&& (&& (ule (bv 32 0x16) (var width)) (! (== (bv 32 0x16) (var width)))) (! (is_zero (& (var scan) (bv 32 0x200))))) (bv 32 0x16) (ite (&& (&& (ule (bv 32 0x17) (var width)) (! (== (bv 32 0x17) (var width)))) (! (is_zero (& (var scan) (bv 32 0x100))))) (bv 32 0x17) (ite (&& (&& (ule (bv 32 0x18) (var width)) (! (== (bv 32 0x18) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80))))) (bv 32 0x18) (ite (&& (&& (ule (bv 32 0x19) (var width)) (! (== (bv 32 0x19) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40))))) (bv 32 0x19) (ite (&& (&& (ule (bv 32 0x1a) (var width)) (! (== (bv 32 0x1a) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20))))) (bv 32 0x1a) (ite (&& (&& (ule (bv 32 0x1b) (var width)) (! (== (bv 32 0x1b) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10))))) (bv 32 0x1b) (ite (&& (&& (ule (bv 32 0x1c) (var width)) (! (== (bv 32 0x1c) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8))))) (bv 32 0x1c) (ite (&& (&& (ule (bv 32 0x1d) (var width)) (! (== (bv 32 0x1d) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4))))) (bv 32 0x1d) (ite (&& (&& (ule (bv 32 0x1e) (var width)) (! (== (bv 32 0x1e) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2))))) (bv 32 0x1e) (ite (&& (&& (ule (bv 32 0x1f) (var width)) (! (== (bv 32 0x1f) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1))))) (bv 32 0x1f) (var width)))))))))))))))))))))))))))))))))) (set d0 (cast 32 false (+ (var offset) (var first)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfffo 0x1(a0, d0.w){0:32}, d0" edf000000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set scan (<< (var field) (- (bv 8 0x20) (cast 8 false (var width))) false)) (set first (ite (&& (&& (ule (bv 32 0x0) (var width)) (! (== (bv 32 0x0) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80000000))))) (bv 32 0x0) (ite (&& (&& (ule (bv 32 0x1) (var width)) (! (== (bv 32 0x1) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40000000))))) (bv 32 0x1) (ite (&& (&& (ule (bv 32 0x2) (var width)) (! (== (bv 32 0x2) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20000000))))) (bv 32 0x2) (ite (&& (&& (ule (bv 32 0x3) (var width)) (! (== (bv 32 0x3) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10000000))))) (bv 32 0x3) (ite (&& (&& (ule (bv 32 0x4) (var width)) (! (== (bv 32 0x4) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8000000))))) (bv 32 0x4) (ite (&& (&& (ule (bv 32 0x5) (var width)) (! (== (bv 32 0x5) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4000000))))) (bv 32 0x5) (ite (&& (&& (ule (bv 32 0x6) (var width)) (! (== (bv 32 0x6) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2000000))))) (bv 32 0x6) (ite (&& (&& (ule (bv 32 0x7) (var width)) (! (== (bv 32 0x7) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1000000))))) (bv 32 0x7) (ite (&& (&& (ule (bv 32 0x8) (var width)) (! (== (bv 32 0x8) (var width)))) (! (is_zero (& (var scan) (bv 32 0x800000))))) (bv 32 0x8) (ite (&& (&& (ule (bv 32 0x9) (var width)) (! (== (bv 32 0x9) (var width)))) (! (is_zero (& (var scan) (bv 32 0x400000))))) (bv 32 0x9) (ite (&& (&& (ule (bv 32 0xa) (var width)) (! (== (bv 32 0xa) (var width)))) (! (is_zero (& (var scan) (bv 32 0x200000))))) (bv 32 0xa) (ite (&& (&& (ule (bv 32 0xb) (var width)) (! (== (bv 32 0xb) (var width)))) (! (is_zero (& (var scan) (bv 32 0x100000))))) (bv 32 0xb) (ite (&& (&& (ule (bv 32 0xc) (var width)) (! (== (bv 32 0xc) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80000))))) (bv 32 0xc) (ite (&& (&& (ule (bv 32 0xd) (var width)) (! (== (bv 32 0xd) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40000))))) (bv 32 0xd) (ite (&& (&& (ule (bv 32 0xe) (var width)) (! (== (bv 32 0xe) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20000))))) (bv 32 0xe) (ite (&& (&& (ule (bv 32 0xf) (var width)) (! (== (bv 32 0xf) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10000))))) (bv 32 0xf) (ite (&& (&& (ule (bv 32 0x10) (var width)) (! (== (bv 32 0x10) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8000))))) (bv 32 0x10) (ite (&& (&& (ule (bv 32 0x11) (var width)) (! (== (bv 32 0x11) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4000))))) (bv 32 0x11) (ite (&& (&& (ule (bv 32 0x12) (var width)) (! (== (bv 32 0x12) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2000))))) (bv 32 0x12) (ite (&& (&& (ule (bv 32 0x13) (var width)) (! (== (bv 32 0x13) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1000))))) (bv 32 0x13) (ite (&& (&& (ule (bv 32 0x14) (var width)) (! (== (bv 32 0x14) (var width)))) (! (is_zero (& (var scan) (bv 32 0x800))))) (bv 32 0x14) (ite (&& (&& (ule (bv 32 0x15) (var width)) (! (== (bv 32 0x15) (var width)))) (! (is_zero (& (var scan) (bv 32 0x400))))) (bv 32 0x15) (ite (&& (&& (ule (bv 32 0x16) (var width)) (! (== (bv 32 0x16) (var width)))) (! (is_zero (& (var scan) (bv 32 0x200))))) (bv 32 0x16) (ite (&& (&& (ule (bv 32 0x17) (var width)) (! (== (bv 32 0x17) (var width)))) (! (is_zero (& (var scan) (bv 32 0x100))))) (bv 32 0x17) (ite (&& (&& (ule (bv 32 0x18) (var width)) (! (== (bv 32 0x18) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80))))) (bv 32 0x18) (ite (&& (&& (ule (bv 32 0x19) (var width)) (! (== (bv 32 0x19) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40))))) (bv 32 0x19) (ite (&& (&& (ule (bv 32 0x1a) (var width)) (! (== (bv 32 0x1a) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20))))) (bv 32 0x1a) (ite (&& (&& (ule (bv 32 0x1b) (var width)) (! (== (bv 32 0x1b) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10))))) (bv 32 0x1b) (ite (&& (&& (ule (bv 32 0x1c) (var width)) (! (== (bv 32 0x1c) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8))))) (bv 32 0x1c) (ite (&& (&& (ule (bv 32 0x1d) (var width)) (! (== (bv 32 0x1d) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4))))) (bv 32 0x1d) (ite (&& (&& (ule (bv 32 0x1e) (var width)) (! (== (bv 32 0x1e) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2))))) (bv 32 0x1e) (ite (&& (&& (ule (bv 32 0x1f) (var width)) (! (== (bv 32 0x1f) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1))))) (bv 32 0x1f) (var width)))))))))))))))))))))))))))))))))) (set d0 (cast 32 false (+ (var offset) (var first)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfffo (a0, d0.w){3:d7}, d0" edf000ff0100 0x0 (seq (set offset (bv 32 0x3)) (set width (ite (is_zero (& (var d7) (bv 32 0x1f))) (bv 32 0x20) (& (var d7) (bv 32 0x1f)))) (set base (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x0))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set scan (<< (var field) (- (bv 8 0x20) (cast 8 false (var width))) false)) (set first (ite (&& (&& (ule (bv 32 0x0) (var width)) (! (== (bv 32 0x0) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80000000))))) (bv 32 0x0) (ite (&& (&& (ule (bv 32 0x1) (var width)) (! (== (bv 32 0x1) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40000000))))) (bv 32 0x1) (ite (&& (&& (ule (bv 32 0x2) (var width)) (! (== (bv 32 0x2) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20000000))))) (bv 32 0x2) (ite (&& (&& (ule (bv 32 0x3) (var width)) (! (== (bv 32 0x3) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10000000))))) (bv 32 0x3) (ite (&& (&& (ule (bv 32 0x4) (var width)) (! (== (bv 32 0x4) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8000000))))) (bv 32 0x4) (ite (&& (&& (ule (bv 32 0x5) (var width)) (! (== (bv 32 0x5) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4000000))))) (bv 32 0x5) (ite (&& (&& (ule (bv 32 0x6) (var width)) (! (== (bv 32 0x6) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2000000))))) (bv 32 0x6) (ite (&& (&& (ule (bv 32 0x7) (var width)) (! (== (bv 32 0x7) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1000000))))) (bv 32 0x7) (ite (&& (&& (ule (bv 32 0x8) (var width)) (! (== (bv 32 0x8) (var width)))) (! (is_zero (& (var scan) (bv 32 0x800000))))) (bv 32 0x8) (ite (&& (&& (ule (bv 32 0x9) (var width)) (! (== (bv 32 0x9) (var width)))) (! (is_zero (& (var scan) (bv 32 0x400000))))) (bv 32 0x9) (ite (&& (&& (ule (bv 32 0xa) (var width)) (! (== (bv 32 0xa) (var width)))) (! (is_zero (& (var scan) (bv 32 0x200000))))) (bv 32 0xa) (ite (&& (&& (ule (bv 32 0xb) (var width)) (! (== (bv 32 0xb) (var width)))) (! (is_zero (& (var scan) (bv 32 0x100000))))) (bv 32 0xb) (ite (&& (&& (ule (bv 32 0xc) (var width)) (! (== (bv 32 0xc) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80000))))) (bv 32 0xc) (ite (&& (&& (ule (bv 32 0xd) (var width)) (! (== (bv 32 0xd) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40000))))) (bv 32 0xd) (ite (&& (&& (ule (bv 32 0xe) (var width)) (! (== (bv 32 0xe) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20000))))) (bv 32 0xe) (ite (&& (&& (ule (bv 32 0xf) (var width)) (! (== (bv 32 0xf) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10000))))) (bv 32 0xf) (ite (&& (&& (ule (bv 32 0x10) (var width)) (! (== (bv 32 0x10) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8000))))) (bv 32 0x10) (ite (&& (&& (ule (bv 32 0x11) (var width)) (! (== (bv 32 0x11) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4000))))) (bv 32 0x11) (ite (&& (&& (ule (bv 32 0x12) (var width)) (! (== (bv 32 0x12) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2000))))) (bv 32 0x12) (ite (&& (&& (ule (bv 32 0x13) (var width)) (! (== (bv 32 0x13) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1000))))) (bv 32 0x13) (ite (&& (&& (ule (bv 32 0x14) (var width)) (! (== (bv 32 0x14) (var width)))) (! (is_zero (& (var scan) (bv 32 0x800))))) (bv 32 0x14) (ite (&& (&& (ule (bv 32 0x15) (var width)) (! (== (bv 32 0x15) (var width)))) (! (is_zero (& (var scan) (bv 32 0x400))))) (bv 32 0x15) (ite (&& (&& (ule (bv 32 0x16) (var width)) (! (== (bv 32 0x16) (var width)))) (! (is_zero (& (var scan) (bv 32 0x200))))) (bv 32 0x16) (ite (&& (&& (ule (bv 32 0x17) (var width)) (! (== (bv 32 0x17) (var width)))) (! (is_zero (& (var scan) (bv 32 0x100))))) (bv 32 0x17) (ite (&& (&& (ule (bv 32 0x18) (var width)) (! (== (bv 32 0x18) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80))))) (bv 32 0x18) (ite (&& (&& (ule (bv 32 0x19) (var width)) (! (== (bv 32 0x19) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40))))) (bv 32 0x19) (ite (&& (&& (ule (bv 32 0x1a) (var width)) (! (== (bv 32 0x1a) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20))))) (bv 32 0x1a) (ite (&& (&& (ule (bv 32 0x1b) (var width)) (! (== (bv 32 0x1b) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10))))) (bv 32 0x1b) (ite (&& (&& (ule (bv 32 0x1c) (var width)) (! (== (bv 32 0x1c) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8))))) (bv 32 0x1c) (ite (&& (&& (ule (bv 32 0x1d) (var width)) (! (== (bv 32 0x1d) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4))))) (bv 32 0x1d) (ite (&& (&& (ule (bv 32 0x1e) (var width)) (! (== (bv 32 0x1e) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2))))) (bv 32 0x1e) (ite (&& (&& (ule (bv 32 0x1f) (var width)) (! (== (bv 32 0x1f) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1))))) (bv 32 0x1f) (var width)))))))))))))))))))))))))))))))))) (set d0 (cast 32 false (+ (var offset) (var first)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfffo ([0x18001ff, a0], 0x8000fff){4:32}, d0" edf00100017f018001ff08000fff 0x0 (seq (set offset (bv 32 0x4)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (+ (loadw 0 32 (+ (var a0) (bv 32 0x18001ff))) (bv 32 0x0)) (bv 32 0x8000fff)))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set scan (<< (var field) (- (bv 8 0x20) (cast 8 false (var width))) false)) (set first (ite (&& (&& (ule (bv 32 0x0) (var width)) (! (== (bv 32 0x0) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80000000))))) (bv 32 0x0) (ite (&& (&& (ule (bv 32 0x1) (var width)) (! (== (bv 32 0x1) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40000000))))) (bv 32 0x1) (ite (&& (&& (ule (bv 32 0x2) (var width)) (! (== (bv 32 0x2) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20000000))))) (bv 32 0x2) (ite (&& (&& (ule (bv 32 0x3) (var width)) (! (== (bv 32 0x3) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10000000))))) (bv 32 0x3) (ite (&& (&& (ule (bv 32 0x4) (var width)) (! (== (bv 32 0x4) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8000000))))) (bv 32 0x4) (ite (&& (&& (ule (bv 32 0x5) (var width)) (! (== (bv 32 0x5) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4000000))))) (bv 32 0x5) (ite (&& (&& (ule (bv 32 0x6) (var width)) (! (== (bv 32 0x6) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2000000))))) (bv 32 0x6) (ite (&& (&& (ule (bv 32 0x7) (var width)) (! (== (bv 32 0x7) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1000000))))) (bv 32 0x7) (ite (&& (&& (ule (bv 32 0x8) (var width)) (! (== (bv 32 0x8) (var width)))) (! (is_zero (& (var scan) (bv 32 0x800000))))) (bv 32 0x8) (ite (&& (&& (ule (bv 32 0x9) (var width)) (! (== (bv 32 0x9) (var width)))) (! (is_zero (& (var scan) (bv 32 0x400000))))) (bv 32 0x9) (ite (&& (&& (ule (bv 32 0xa) (var width)) (! (== (bv 32 0xa) (var width)))) (! (is_zero (& (var scan) (bv 32 0x200000))))) (bv 32 0xa) (ite (&& (&& (ule (bv 32 0xb) (var width)) (! (== (bv 32 0xb) (var width)))) (! (is_zero (& (var scan) (bv 32 0x100000))))) (bv 32 0xb) (ite (&& (&& (ule (bv 32 0xc) (var width)) (! (== (bv 32 0xc) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80000))))) (bv 32 0xc) (ite (&& (&& (ule (bv 32 0xd) (var width)) (! (== (bv 32 0xd) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40000))))) (bv 32 0xd) (ite (&& (&& (ule (bv 32 0xe) (var width)) (! (== (bv 32 0xe) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20000))))) (bv 32 0xe) (ite (&& (&& (ule (bv 32 0xf) (var width)) (! (== (bv 32 0xf) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10000))))) (bv 32 0xf) (ite (&& (&& (ule (bv 32 0x10) (var width)) (! (== (bv 32 0x10) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8000))))) (bv 32 0x10) (ite (&& (&& (ule (bv 32 0x11) (var width)) (! (== (bv 32 0x11) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4000))))) (bv 32 0x11) (ite (&& (&& (ule (bv 32 0x12) (var width)) (! (== (bv 32 0x12) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2000))))) (bv 32 0x12) (ite (&& (&& (ule (bv 32 0x13) (var width)) (! (== (bv 32 0x13) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1000))))) (bv 32 0x13) (ite (&& (&& (ule (bv 32 0x14) (var width)) (! (== (bv 32 0x14) (var width)))) (! (is_zero (& (var scan) (bv 32 0x800))))) (bv 32 0x14) (ite (&& (&& (ule (bv 32 0x15) (var width)) (! (== (bv 32 0x15) (var width)))) (! (is_zero (& (var scan) (bv 32 0x400))))) (bv 32 0x15) (ite (&& (&& (ule (bv 32 0x16) (var width)) (! (== (bv 32 0x16) (var width)))) (! (is_zero (& (var scan) (bv 32 0x200))))) (bv 32 0x16) (ite (&& (&& (ule (bv 32 0x17) (var width)) (! (== (bv 32 0x17) (var width)))) (! (is_zero (& (var scan) (bv 32 0x100))))) (bv 32 0x17) (ite (&& (&& (ule (bv 32 0x18) (var width)) (! (== (bv 32 0x18) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80))))) (bv 32 0x18) (ite (&& (&& (ule (bv 32 0x19) (var width)) (! (== (bv 32 0x19) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40))))) (bv 32 0x19) (ite (&& (&& (ule (bv 32 0x1a) (var width)) (! (== (bv 32 0x1a) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20))))) (bv 32 0x1a) (ite (&& (&& (ule (bv 32 0x1b) (var width)) (! (== (bv 32 0x1b) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10))))) (bv 32 0x1b) (ite (&& (&& (ule (bv 32 0x1c) (var width)) (! (== (bv 32 0x1c) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8))))) (bv 32 0x1c) (ite (&& (&& (ule (bv 32 0x1d) (var width)) (! (== (bv 32 0x1d) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4))))) (bv 32 0x1d) (ite (&& (&& (ule (bv 32 0x1e) (var width)) (! (== (bv 32 0x1e) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2))))) (bv 32 0x1e) (ite (&& (&& (ule (bv 32 0x1f) (var width)) (! (== (bv 32 0x1f) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1))))) (bv 32 0x1f) (var width)))))))))))))))))))))))))))))))))) (set d0 (cast 32 false (+ (var offset) (var first)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfffo 0x1.w{0:32}, d0" edf800000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (bv 32 0x1))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set scan (<< (var field) (- (bv 8 0x20) (cast 8 false (var width))) false)) (set first (ite (&& (&& (ule (bv 32 0x0) (var width)) (! (== (bv 32 0x0) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80000000))))) (bv 32 0x0) (ite (&& (&& (ule (bv 32 0x1) (var width)) (! (== (bv 32 0x1) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40000000))))) (bv 32 0x1) (ite (&& (&& (ule (bv 32 0x2) (var width)) (! (== (bv 32 0x2) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20000000))))) (bv 32 0x2) (ite (&& (&& (ule (bv 32 0x3) (var width)) (! (== (bv 32 0x3) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10000000))))) (bv 32 0x3) (ite (&& (&& (ule (bv 32 0x4) (var width)) (! (== (bv 32 0x4) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8000000))))) (bv 32 0x4) (ite (&& (&& (ule (bv 32 0x5) (var width)) (! (== (bv 32 0x5) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4000000))))) (bv 32 0x5) (ite (&& (&& (ule (bv 32 0x6) (var width)) (! (== (bv 32 0x6) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2000000))))) (bv 32 0x6) (ite (&& (&& (ule (bv 32 0x7) (var width)) (! (== (bv 32 0x7) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1000000))))) (bv 32 0x7) (ite (&& (&& (ule (bv 32 0x8) (var width)) (! (== (bv 32 0x8) (var width)))) (! (is_zero (& (var scan) (bv 32 0x800000))))) (bv 32 0x8) (ite (&& (&& (ule (bv 32 0x9) (var width)) (! (== (bv 32 0x9) (var width)))) (! (is_zero (& (var scan) (bv 32 0x400000))))) (bv 32 0x9) (ite (&& (&& (ule (bv 32 0xa) (var width)) (! (== (bv 32 0xa) (var width)))) (! (is_zero (& (var scan) (bv 32 0x200000))))) (bv 32 0xa) (ite (&& (&& (ule (bv 32 0xb) (var width)) (! (== (bv 32 0xb) (var width)))) (! (is_zero (& (var scan) (bv 32 0x100000))))) (bv 32 0xb) (ite (&& (&& (ule (bv 32 0xc) (var width)) (! (== (bv 32 0xc) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80000))))) (bv 32 0xc) (ite (&& (&& (ule (bv 32 0xd) (var width)) (! (== (bv 32 0xd) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40000))))) (bv 32 0xd) (ite (&& (&& (ule (bv 32 0xe) (var width)) (! (== (bv 32 0xe) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20000))))) (bv 32 0xe) (ite (&& (&& (ule (bv 32 0xf) (var width)) (! (== (bv 32 0xf) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10000))))) (bv 32 0xf) (ite (&& (&& (ule (bv 32 0x10) (var width)) (! (== (bv 32 0x10) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8000))))) (bv 32 0x10) (ite (&& (&& (ule (bv 32 0x11) (var width)) (! (== (bv 32 0x11) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4000))))) (bv 32 0x11) (ite (&& (&& (ule (bv 32 0x12) (var width)) (! (== (bv 32 0x12) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2000))))) (bv 32 0x12) (ite (&& (&& (ule (bv 32 0x13) (var width)) (! (== (bv 32 0x13) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1000))))) (bv 32 0x13) (ite (&& (&& (ule (bv 32 0x14) (var width)) (! (== (bv 32 0x14) (var width)))) (! (is_zero (& (var scan) (bv 32 0x800))))) (bv 32 0x14) (ite (&& (&& (ule (bv 32 0x15) (var width)) (! (== (bv 32 0x15) (var width)))) (! (is_zero (& (var scan) (bv 32 0x400))))) (bv 32 0x15) (ite (&& (&& (ule (bv 32 0x16) (var width)) (! (== (bv 32 0x16) (var width)))) (! (is_zero (& (var scan) (bv 32 0x200))))) (bv 32 0x16) (ite (&& (&& (ule (bv 32 0x17) (var width)) (! (== (bv 32 0x17) (var width)))) (! (is_zero (& (var scan) (bv 32 0x100))))) (bv 32 0x17) (ite (&& (&& (ule (bv 32 0x18) (var width)) (! (== (bv 32 0x18) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80))))) (bv 32 0x18) (ite (&& (&& (ule (bv 32 0x19) (var width)) (! (== (bv 32 0x19) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40))))) (bv 32 0x19) (ite (&& (&& (ule (bv 32 0x1a) (var width)) (! (== (bv 32 0x1a) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20))))) (bv 32 0x1a) (ite (&& (&& (ule (bv 32 0x1b) (var width)) (! (== (bv 32 0x1b) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10))))) (bv 32 0x1b) (ite (&& (&& (ule (bv 32 0x1c) (var width)) (! (== (bv 32 0x1c) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8))))) (bv 32 0x1c) (ite (&& (&& (ule (bv 32 0x1d) (var width)) (! (== (bv 32 0x1d) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4))))) (bv 32 0x1d) (ite (&& (&& (ule (bv 32 0x1e) (var width)) (! (== (bv 32 0x1e) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2))))) (bv 32 0x1e) (ite (&& (&& (ule (bv 32 0x1f) (var width)) (! (== (bv 32 0x1f) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1))))) (bv 32 0x1f) (var width)))))))))))))))))))))))))))))))))) (set d0 (cast 32 false (+ (var offset) (var first)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfffo 0x10010.l{0:32}, d0" edf9000000010010 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (bv 32 0x10010))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set scan (<< (var field) (- (bv 8 0x20) (cast 8 false (var width))) false)) (set first (ite (&& (&& (ule (bv 32 0x0) (var width)) (! (== (bv 32 0x0) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80000000))))) (bv 32 0x0) (ite (&& (&& (ule (bv 32 0x1) (var width)) (! (== (bv 32 0x1) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40000000))))) (bv 32 0x1) (ite (&& (&& (ule (bv 32 0x2) (var width)) (! (== (bv 32 0x2) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20000000))))) (bv 32 0x2) (ite (&& (&& (ule (bv 32 0x3) (var width)) (! (== (bv 32 0x3) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10000000))))) (bv 32 0x3) (ite (&& (&& (ule (bv 32 0x4) (var width)) (! (== (bv 32 0x4) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8000000))))) (bv 32 0x4) (ite (&& (&& (ule (bv 32 0x5) (var width)) (! (== (bv 32 0x5) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4000000))))) (bv 32 0x5) (ite (&& (&& (ule (bv 32 0x6) (var width)) (! (== (bv 32 0x6) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2000000))))) (bv 32 0x6) (ite (&& (&& (ule (bv 32 0x7) (var width)) (! (== (bv 32 0x7) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1000000))))) (bv 32 0x7) (ite (&& (&& (ule (bv 32 0x8) (var width)) (! (== (bv 32 0x8) (var width)))) (! (is_zero (& (var scan) (bv 32 0x800000))))) (bv 32 0x8) (ite (&& (&& (ule (bv 32 0x9) (var width)) (! (== (bv 32 0x9) (var width)))) (! (is_zero (& (var scan) (bv 32 0x400000))))) (bv 32 0x9) (ite (&& (&& (ule (bv 32 0xa) (var width)) (! (== (bv 32 0xa) (var width)))) (! (is_zero (& (var scan) (bv 32 0x200000))))) (bv 32 0xa) (ite (&& (&& (ule (bv 32 0xb) (var width)) (! (== (bv 32 0xb) (var width)))) (! (is_zero (& (var scan) (bv 32 0x100000))))) (bv 32 0xb) (ite (&& (&& (ule (bv 32 0xc) (var width)) (! (== (bv 32 0xc) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80000))))) (bv 32 0xc) (ite (&& (&& (ule (bv 32 0xd) (var width)) (! (== (bv 32 0xd) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40000))))) (bv 32 0xd) (ite (&& (&& (ule (bv 32 0xe) (var width)) (! (== (bv 32 0xe) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20000))))) (bv 32 0xe) (ite (&& (&& (ule (bv 32 0xf) (var width)) (! (== (bv 32 0xf) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10000))))) (bv 32 0xf) (ite (&& (&& (ule (bv 32 0x10) (var width)) (! (== (bv 32 0x10) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8000))))) (bv 32 0x10) (ite (&& (&& (ule (bv 32 0x11) (var width)) (! (== (bv 32 0x11) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4000))))) (bv 32 0x11) (ite (&& (&& (ule (bv 32 0x12) (var width)) (! (== (bv 32 0x12) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2000))))) (bv 32 0x12) (ite (&& (&& (ule (bv 32 0x13) (var width)) (! (== (bv 32 0x13) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1000))))) (bv 32 0x13) (ite (&& (&& (ule (bv 32 0x14) (var width)) (! (== (bv 32 0x14) (var width)))) (! (is_zero (& (var scan) (bv 32 0x800))))) (bv 32 0x14) (ite (&& (&& (ule (bv 32 0x15) (var width)) (! (== (bv 32 0x15) (var width)))) (! (is_zero (& (var scan) (bv 32 0x400))))) (bv 32 0x15) (ite (&& (&& (ule (bv 32 0x16) (var width)) (! (== (bv 32 0x16) (var width)))) (! (is_zero (& (var scan) (bv 32 0x200))))) (bv 32 0x16) (ite (&& (&& (ule (bv 32 0x17) (var width)) (! (== (bv 32 0x17) (var width)))) (! (is_zero (& (var scan) (bv 32 0x100))))) (bv 32 0x17) (ite (&& (&& (ule (bv 32 0x18) (var width)) (! (== (bv 32 0x18) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80))))) (bv 32 0x18) (ite (&& (&& (ule (bv 32 0x19) (var width)) (! (== (bv 32 0x19) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40))))) (bv 32 0x19) (ite (&& (&& (ule (bv 32 0x1a) (var width)) (! (== (bv 32 0x1a) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20))))) (bv 32 0x1a) (ite (&& (&& (ule (bv 32 0x1b) (var width)) (! (== (bv 32 0x1b) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10))))) (bv 32 0x1b) (ite (&& (&& (ule (bv 32 0x1c) (var width)) (! (== (bv 32 0x1c) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8))))) (bv 32 0x1c) (ite (&& (&& (ule (bv 32 0x1d) (var width)) (! (== (bv 32 0x1d) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4))))) (bv 32 0x1d) (ite (&& (&& (ule (bv 32 0x1e) (var width)) (! (== (bv 32 0x1e) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2))))) (bv 32 0x1e) (ite (&& (&& (ule (bv 32 0x1f) (var width)) (! (== (bv 32 0x1f) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1))))) (bv 32 0x1f) (var width)))))))))))))))))))))))))))))))))) (set d0 (cast 32 false (+ (var offset) (var first)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfffo 0x5(pc){0:32}, d0" edfa00000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (bv 32 0x5))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set scan (<< (var field) (- (bv 8 0x20) (cast 8 false (var width))) false)) (set first (ite (&& (&& (ule (bv 32 0x0) (var width)) (! (== (bv 32 0x0) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80000000))))) (bv 32 0x0) (ite (&& (&& (ule (bv 32 0x1) (var width)) (! (== (bv 32 0x1) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40000000))))) (bv 32 0x1) (ite (&& (&& (ule (bv 32 0x2) (var width)) (! (== (bv 32 0x2) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20000000))))) (bv 32 0x2) (ite (&& (&& (ule (bv 32 0x3) (var width)) (! (== (bv 32 0x3) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10000000))))) (bv 32 0x3) (ite (&& (&& (ule (bv 32 0x4) (var width)) (! (== (bv 32 0x4) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8000000))))) (bv 32 0x4) (ite (&& (&& (ule (bv 32 0x5) (var width)) (! (== (bv 32 0x5) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4000000))))) (bv 32 0x5) (ite (&& (&& (ule (bv 32 0x6) (var width)) (! (== (bv 32 0x6) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2000000))))) (bv 32 0x6) (ite (&& (&& (ule (bv 32 0x7) (var width)) (! (== (bv 32 0x7) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1000000))))) (bv 32 0x7) (ite (&& (&& (ule (bv 32 0x8) (var width)) (! (== (bv 32 0x8) (var width)))) (! (is_zero (& (var scan) (bv 32 0x800000))))) (bv 32 0x8) (ite (&& (&& (ule (bv 32 0x9) (var width)) (! (== (bv 32 0x9) (var width)))) (! (is_zero (& (var scan) (bv 32 0x400000))))) (bv 32 0x9) (ite (&& (&& (ule (bv 32 0xa) (var width)) (! (== (bv 32 0xa) (var width)))) (! (is_zero (& (var scan) (bv 32 0x200000))))) (bv 32 0xa) (ite (&& (&& (ule (bv 32 0xb) (var width)) (! (== (bv 32 0xb) (var width)))) (! (is_zero (& (var scan) (bv 32 0x100000))))) (bv 32 0xb) (ite (&& (&& (ule (bv 32 0xc) (var width)) (! (== (bv 32 0xc) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80000))))) (bv 32 0xc) (ite (&& (&& (ule (bv 32 0xd) (var width)) (! (== (bv 32 0xd) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40000))))) (bv 32 0xd) (ite (&& (&& (ule (bv 32 0xe) (var width)) (! (== (bv 32 0xe) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20000))))) (bv 32 0xe) (ite (&& (&& (ule (bv 32 0xf) (var width)) (! (== (bv 32 0xf) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10000))))) (bv 32 0xf) (ite (&& (&& (ule (bv 32 0x10) (var width)) (! (== (bv 32 0x10) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8000))))) (bv 32 0x10) (ite (&& (&& (ule (bv 32 0x11) (var width)) (! (== (bv 32 0x11) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4000))))) (bv 32 0x11) (ite (&& (&& (ule (bv 32 0x12) (var width)) (! (== (bv 32 0x12) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2000))))) (bv 32 0x12) (ite (&& (&& (ule (bv 32 0x13) (var width)) (! (== (bv 32 0x13) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1000))))) (bv 32 0x13) (ite (&& (&& (ule (bv 32 0x14) (var width)) (! (== (bv 32 0x14) (var width)))) (! (is_zero (& (var scan) (bv 32 0x800))))) (bv 32 0x14) (ite (&& (&& (ule (bv 32 0x15) (var width)) (! (== (bv 32 0x15) (var width)))) (! (is_zero (& (var scan) (bv 32 0x400))))) (bv 32 0x15) (ite (&& (&& (ule (bv 32 0x16) (var width)) (! (== (bv 32 0x16) (var width)))) (! (is_zero (& (var scan) (bv 32 0x200))))) (bv 32 0x16) (ite (&& (&& (ule (bv 32 0x17) (var width)) (! (== (bv 32 0x17) (var width)))) (! (is_zero (& (var scan) (bv 32 0x100))))) (bv 32 0x17) (ite (&& (&& (ule (bv 32 0x18) (var width)) (! (== (bv 32 0x18) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80))))) (bv 32 0x18) (ite (&& (&& (ule (bv 32 0x19) (var width)) (! (== (bv 32 0x19) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40))))) (bv 32 0x19) (ite (&& (&& (ule (bv 32 0x1a) (var width)) (! (== (bv 32 0x1a) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20))))) (bv 32 0x1a) (ite (&& (&& (ule (bv 32 0x1b) (var width)) (! (== (bv 32 0x1b) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10))))) (bv 32 0x1b) (ite (&& (&& (ule (bv 32 0x1c) (var width)) (! (== (bv 32 0x1c) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8))))) (bv 32 0x1c) (ite (&& (&& (ule (bv 32 0x1d) (var width)) (! (== (bv 32 0x1d) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4))))) (bv 32 0x1d) (ite (&& (&& (ule (bv 32 0x1e) (var width)) (! (== (bv 32 0x1e) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2))))) (bv 32 0x1e) (ite (&& (&& (ule (bv 32 0x1f) (var width)) (! (== (bv 32 0x1f) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1))))) (bv 32 0x1f) (var width)))))))))))))))))))))))))))))))))) (set d0 (cast 32 false (+ (var offset) (var first)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfffo 0x5(pc, d0.w){0:32}, d0" edfb00000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (bv 32 0x5) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set scan (<< (var field) (- (bv 8 0x20) (cast 8 false (var width))) false)) (set first (ite (&& (&& (ule (bv 32 0x0) (var width)) (! (== (bv 32 0x0) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80000000))))) (bv 32 0x0) (ite (&& (&& (ule (bv 32 0x1) (var width)) (! (== (bv 32 0x1) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40000000))))) (bv 32 0x1) (ite (&& (&& (ule (bv 32 0x2) (var width)) (! (== (bv 32 0x2) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20000000))))) (bv 32 0x2) (ite (&& (&& (ule (bv 32 0x3) (var width)) (! (== (bv 32 0x3) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10000000))))) (bv 32 0x3) (ite (&& (&& (ule (bv 32 0x4) (var width)) (! (== (bv 32 0x4) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8000000))))) (bv 32 0x4) (ite (&& (&& (ule (bv 32 0x5) (var width)) (! (== (bv 32 0x5) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4000000))))) (bv 32 0x5) (ite (&& (&& (ule (bv 32 0x6) (var width)) (! (== (bv 32 0x6) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2000000))))) (bv 32 0x6) (ite (&& (&& (ule (bv 32 0x7) (var width)) (! (== (bv 32 0x7) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1000000))))) (bv 32 0x7) (ite (&& (&& (ule (bv 32 0x8) (var width)) (! (== (bv 32 0x8) (var width)))) (! (is_zero (& (var scan) (bv 32 0x800000))))) (bv 32 0x8) (ite (&& (&& (ule (bv 32 0x9) (var width)) (! (== (bv 32 0x9) (var width)))) (! (is_zero (& (var scan) (bv 32 0x400000))))) (bv 32 0x9) (ite (&& (&& (ule (bv 32 0xa) (var width)) (! (== (bv 32 0xa) (var width)))) (! (is_zero (& (var scan) (bv 32 0x200000))))) (bv 32 0xa) (ite (&& (&& (ule (bv 32 0xb) (var width)) (! (== (bv 32 0xb) (var width)))) (! (is_zero (& (var scan) (bv 32 0x100000))))) (bv 32 0xb) (ite (&& (&& (ule (bv 32 0xc) (var width)) (! (== (bv 32 0xc) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80000))))) (bv 32 0xc) (ite (&& (&& (ule (bv 32 0xd) (var width)) (! (== (bv 32 0xd) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40000))))) (bv 32 0xd) (ite (&& (&& (ule (bv 32 0xe) (var width)) (! (== (bv 32 0xe) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20000))))) (bv 32 0xe) (ite (&& (&& (ule (bv 32 0xf) (var width)) (! (== (bv 32 0xf) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10000))))) (bv 32 0xf) (ite (&& (&& (ule (bv 32 0x10) (var width)) (! (== (bv 32 0x10) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8000))))) (bv 32 0x10) (ite (&& (&& (ule (bv 32 0x11) (var width)) (! (== (bv 32 0x11) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4000))))) (bv 32 0x11) (ite (&& (&& (ule (bv 32 0x12) (var width)) (! (== (bv 32 0x12) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2000))))) (bv 32 0x12) (ite (&& (&& (ule (bv 32 0x13) (var width)) (! (== (bv 32 0x13) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1000))))) (bv 32 0x13) (ite (&& (&& (ule (bv 32 0x14) (var width)) (! (== (bv 32 0x14) (var width)))) (! (is_zero (& (var scan) (bv 32 0x800))))) (bv 32 0x14) (ite (&& (&& (ule (bv 32 0x15) (var width)) (! (== (bv 32 0x15) (var width)))) (! (is_zero (& (var scan) (bv 32 0x400))))) (bv 32 0x15) (ite (&& (&& (ule (bv 32 0x16) (var width)) (! (== (bv 32 0x16) (var width)))) (! (is_zero (& (var scan) (bv 32 0x200))))) (bv 32 0x16) (ite (&& (&& (ule (bv 32 0x17) (var width)) (! (== (bv 32 0x17) (var width)))) (! (is_zero (& (var scan) (bv 32 0x100))))) (bv 32 0x17) (ite (&& (&& (ule (bv 32 0x18) (var width)) (! (== (bv 32 0x18) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80))))) (bv 32 0x18) (ite (&& (&& (ule (bv 32 0x19) (var width)) (! (== (bv 32 0x19) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40))))) (bv 32 0x19) (ite (&& (&& (ule (bv 32 0x1a) (var width)) (! (== (bv 32 0x1a) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20))))) (bv 32 0x1a) (ite (&& (&& (ule (bv 32 0x1b) (var width)) (! (== (bv 32 0x1b) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10))))) (bv 32 0x1b) (ite (&& (&& (ule (bv 32 0x1c) (var width)) (! (== (bv 32 0x1c) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8))))) (bv 32 0x1c) (ite (&& (&& (ule (bv 32 0x1d) (var width)) (! (== (bv 32 0x1d) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4))))) (bv 32 0x1d) (ite (&& (&& (ule (bv 32 0x1e) (var width)) (! (== (bv 32 0x1e) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2))))) (bv 32 0x1e) (ite (&& (&& (ule (bv 32 0x1f) (var width)) (! (== (bv 32 0x1f) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1))))) (bv 32 0x1f) (var width)))))))))))))))))))))))))))))))))) (set d0 (cast 32 false (+ (var offset) (var first)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfffo 0x4(pc, d0.w){3:d7}, d0" edfb00ff0100 0x0 (seq (set offset (bv 32 0x3)) (set width (ite (is_zero (& (var d7) (bv 32 0x1f))) (bv 32 0x20) (& (var d7) (bv 32 0x1f)))) (set base (cast 32 false (+ (bv 32 0x4) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set scan (<< (var field) (- (bv 8 0x20) (cast 8 false (var width))) false)) (set first (ite (&& (&& (ule (bv 32 0x0) (var width)) (! (== (bv 32 0x0) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80000000))))) (bv 32 0x0) (ite (&& (&& (ule (bv 32 0x1) (var width)) (! (== (bv 32 0x1) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40000000))))) (bv 32 0x1) (ite (&& (&& (ule (bv 32 0x2) (var width)) (! (== (bv 32 0x2) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20000000))))) (bv 32 0x2) (ite (&& (&& (ule (bv 32 0x3) (var width)) (! (== (bv 32 0x3) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10000000))))) (bv 32 0x3) (ite (&& (&& (ule (bv 32 0x4) (var width)) (! (== (bv 32 0x4) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8000000))))) (bv 32 0x4) (ite (&& (&& (ule (bv 32 0x5) (var width)) (! (== (bv 32 0x5) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4000000))))) (bv 32 0x5) (ite (&& (&& (ule (bv 32 0x6) (var width)) (! (== (bv 32 0x6) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2000000))))) (bv 32 0x6) (ite (&& (&& (ule (bv 32 0x7) (var width)) (! (== (bv 32 0x7) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1000000))))) (bv 32 0x7) (ite (&& (&& (ule (bv 32 0x8) (var width)) (! (== (bv 32 0x8) (var width)))) (! (is_zero (& (var scan) (bv 32 0x800000))))) (bv 32 0x8) (ite (&& (&& (ule (bv 32 0x9) (var width)) (! (== (bv 32 0x9) (var width)))) (! (is_zero (& (var scan) (bv 32 0x400000))))) (bv 32 0x9) (ite (&& (&& (ule (bv 32 0xa) (var width)) (! (== (bv 32 0xa) (var width)))) (! (is_zero (& (var scan) (bv 32 0x200000))))) (bv 32 0xa) (ite (&& (&& (ule (bv 32 0xb) (var width)) (! (== (bv 32 0xb) (var width)))) (! (is_zero (& (var scan) (bv 32 0x100000))))) (bv 32 0xb) (ite (&& (&& (ule (bv 32 0xc) (var width)) (! (== (bv 32 0xc) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80000))))) (bv 32 0xc) (ite (&& (&& (ule (bv 32 0xd) (var width)) (! (== (bv 32 0xd) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40000))))) (bv 32 0xd) (ite (&& (&& (ule (bv 32 0xe) (var width)) (! (== (bv 32 0xe) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20000))))) (bv 32 0xe) (ite (&& (&& (ule (bv 32 0xf) (var width)) (! (== (bv 32 0xf) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10000))))) (bv 32 0xf) (ite (&& (&& (ule (bv 32 0x10) (var width)) (! (== (bv 32 0x10) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8000))))) (bv 32 0x10) (ite (&& (&& (ule (bv 32 0x11) (var width)) (! (== (bv 32 0x11) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4000))))) (bv 32 0x11) (ite (&& (&& (ule (bv 32 0x12) (var width)) (! (== (bv 32 0x12) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2000))))) (bv 32 0x12) (ite (&& (&& (ule (bv 32 0x13) (var width)) (! (== (bv 32 0x13) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1000))))) (bv 32 0x13) (ite (&& (&& (ule (bv 32 0x14) (var width)) (! (== (bv 32 0x14) (var width)))) (! (is_zero (& (var scan) (bv 32 0x800))))) (bv 32 0x14) (ite (&& (&& (ule (bv 32 0x15) (var width)) (! (== (bv 32 0x15) (var width)))) (! (is_zero (& (var scan) (bv 32 0x400))))) (bv 32 0x15) (ite (&& (&& (ule (bv 32 0x16) (var width)) (! (== (bv 32 0x16) (var width)))) (! (is_zero (& (var scan) (bv 32 0x200))))) (bv 32 0x16) (ite (&& (&& (ule (bv 32 0x17) (var width)) (! (== (bv 32 0x17) (var width)))) (! (is_zero (& (var scan) (bv 32 0x100))))) (bv 32 0x17) (ite (&& (&& (ule (bv 32 0x18) (var width)) (! (== (bv 32 0x18) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80))))) (bv 32 0x18) (ite (&& (&& (ule (bv 32 0x19) (var width)) (! (== (bv 32 0x19) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40))))) (bv 32 0x19) (ite (&& (&& (ule (bv 32 0x1a) (var width)) (! (== (bv 32 0x1a) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20))))) (bv 32 0x1a) (ite (&& (&& (ule (bv 32 0x1b) (var width)) (! (== (bv 32 0x1b) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10))))) (bv 32 0x1b) (ite (&& (&& (ule (bv 32 0x1c) (var width)) (! (== (bv 32 0x1c) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8))))) (bv 32 0x1c) (ite (&& (&& (ule (bv 32 0x1d) (var width)) (! (== (bv 32 0x1d) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4))))) (bv 32 0x1d) (ite (&& (&& (ule (bv 32 0x1e) (var width)) (! (== (bv 32 0x1e) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2))))) (bv 32 0x1e) (ite (&& (&& (ule (bv 32 0x1f) (var width)) (! (== (bv 32 0x1f) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1))))) (bv 32 0x1f) (var width)))))))))))))))))))))))))))))))))) (set d0 (cast 32 false (+ (var offset) (var first)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfffo ([0x1800203, pc], 0x8000fff){4:32}, d0" edfb0100017f018001ff08000fff 0x0 (seq (set offset (bv 32 0x4)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (+ (loadw 0 32 (+ (bv 32 0x2) (bv 32 0x1800201))) (bv 32 0x0)) (bv 32 0x8000fff)))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set scan (<< (var field) (- (bv 8 0x20) (cast 8 false (var width))) false)) (set first (ite (&& (&& (ule (bv 32 0x0) (var width)) (! (== (bv 32 0x0) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80000000))))) (bv 32 0x0) (ite (&& (&& (ule (bv 32 0x1) (var width)) (! (== (bv 32 0x1) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40000000))))) (bv 32 0x1) (ite (&& (&& (ule (bv 32 0x2) (var width)) (! (== (bv 32 0x2) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20000000))))) (bv 32 0x2) (ite (&& (&& (ule (bv 32 0x3) (var width)) (! (== (bv 32 0x3) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10000000))))) (bv 32 0x3) (ite (&& (&& (ule (bv 32 0x4) (var width)) (! (== (bv 32 0x4) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8000000))))) (bv 32 0x4) (ite (&& (&& (ule (bv 32 0x5) (var width)) (! (== (bv 32 0x5) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4000000))))) (bv 32 0x5) (ite (&& (&& (ule (bv 32 0x6) (var width)) (! (== (bv 32 0x6) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2000000))))) (bv 32 0x6) (ite (&& (&& (ule (bv 32 0x7) (var width)) (! (== (bv 32 0x7) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1000000))))) (bv 32 0x7) (ite (&& (&& (ule (bv 32 0x8) (var width)) (! (== (bv 32 0x8) (var width)))) (! (is_zero (& (var scan) (bv 32 0x800000))))) (bv 32 0x8) (ite (&& (&& (ule (bv 32 0x9) (var width)) (! (== (bv 32 0x9) (var width)))) (! (is_zero (& (var scan) (bv 32 0x400000))))) (bv 32 0x9) (ite (&& (&& (ule (bv 32 0xa) (var width)) (! (== (bv 32 0xa) (var width)))) (! (is_zero (& (var scan) (bv 32 0x200000))))) (bv 32 0xa) (ite (&& (&& (ule (bv 32 0xb) (var width)) (! (== (bv 32 0xb) (var width)))) (! (is_zero (& (var scan) (bv 32 0x100000))))) (bv 32 0xb) (ite (&& (&& (ule (bv 32 0xc) (var width)) (! (== (bv 32 0xc) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80000))))) (bv 32 0xc) (ite (&& (&& (ule (bv 32 0xd) (var width)) (! (== (bv 32 0xd) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40000))))) (bv 32 0xd) (ite (&& (&& (ule (bv 32 0xe) (var width)) (! (== (bv 32 0xe) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20000))))) (bv 32 0xe) (ite (&& (&& (ule (bv 32 0xf) (var width)) (! (== (bv 32 0xf) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10000))))) (bv 32 0xf) (ite (&& (&& (ule (bv 32 0x10) (var width)) (! (== (bv 32 0x10) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8000))))) (bv 32 0x10) (ite (&& (&& (ule (bv 32 0x11) (var width)) (! (== (bv 32 0x11) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4000))))) (bv 32 0x11) (ite (&& (&& (ule (bv 32 0x12) (var width)) (! (== (bv 32 0x12) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2000))))) (bv 32 0x12) (ite (&& (&& (ule (bv 32 0x13) (var width)) (! (== (bv 32 0x13) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1000))))) (bv 32 0x13) (ite (&& (&& (ule (bv 32 0x14) (var width)) (! (== (bv 32 0x14) (var width)))) (! (is_zero (& (var scan) (bv 32 0x800))))) (bv 32 0x14) (ite (&& (&& (ule (bv 32 0x15) (var width)) (! (== (bv 32 0x15) (var width)))) (! (is_zero (& (var scan) (bv 32 0x400))))) (bv 32 0x15) (ite (&& (&& (ule (bv 32 0x16) (var width)) (! (== (bv 32 0x16) (var width)))) (! (is_zero (& (var scan) (bv 32 0x200))))) (bv 32 0x16) (ite (&& (&& (ule (bv 32 0x17) (var width)) (! (== (bv 32 0x17) (var width)))) (! (is_zero (& (var scan) (bv 32 0x100))))) (bv 32 0x17) (ite (&& (&& (ule (bv 32 0x18) (var width)) (! (== (bv 32 0x18) (var width)))) (! (is_zero (& (var scan) (bv 32 0x80))))) (bv 32 0x18) (ite (&& (&& (ule (bv 32 0x19) (var width)) (! (== (bv 32 0x19) (var width)))) (! (is_zero (& (var scan) (bv 32 0x40))))) (bv 32 0x19) (ite (&& (&& (ule (bv 32 0x1a) (var width)) (! (== (bv 32 0x1a) (var width)))) (! (is_zero (& (var scan) (bv 32 0x20))))) (bv 32 0x1a) (ite (&& (&& (ule (bv 32 0x1b) (var width)) (! (== (bv 32 0x1b) (var width)))) (! (is_zero (& (var scan) (bv 32 0x10))))) (bv 32 0x1b) (ite (&& (&& (ule (bv 32 0x1c) (var width)) (! (== (bv 32 0x1c) (var width)))) (! (is_zero (& (var scan) (bv 32 0x8))))) (bv 32 0x1c) (ite (&& (&& (ule (bv 32 0x1d) (var width)) (! (== (bv 32 0x1d) (var width)))) (! (is_zero (& (var scan) (bv 32 0x4))))) (bv 32 0x1d) (ite (&& (&& (ule (bv 32 0x1e) (var width)) (! (== (bv 32 0x1e) (var width)))) (! (is_zero (& (var scan) (bv 32 0x2))))) (bv 32 0x1e) (ite (&& (&& (ule (bv 32 0x1f) (var width)) (! (== (bv 32 0x1f) (var width)))) (! (is_zero (& (var scan) (bv 32 0x1))))) (bv 32 0x1f) (var width)))))))))))))))))))))))))))))))))) (set d0 (cast 32 false (+ (var offset) (var first)))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfset d0{0:32}" eec00000 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set bit_offset (mod (var offset) (bv 32 0x20))) (set container (append (var d0) (var d0))) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set d0 (cast 32 false (| (& (cast 32 false (>> (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (bv 8 0x20) false)) (~ (cast 32 false (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)))) (& (cast 32 false (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (cast 32 false (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfset d0{28:8}" eec00708 0x0 (seq (set offset (bv 32 0x1c)) (set width (bv 32 0x8)) (set bit_offset (mod (var offset) (bv 32 0x20))) (set container (append (var d0) (var d0))) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set d0 (cast 32 false (| (& (cast 32 false (>> (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (bv 8 0x20) false)) (~ (cast 32 false (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)))) (& (cast 32 false (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (cast 32 false (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfset (a0){0:32}" eed00000 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (var a0))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfset (a0){0:1}" eed00001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x1)) (set base (cast 32 false (var a0))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfset 0x1(a0){0:32}" eee800000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfset 0x1(a0, d0.w){0:32}" eef000000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfset (a0, d0.w){3:d7}" eef000ff0100 0x0 (seq (set offset (bv 32 0x3)) (set width (ite (is_zero (& (var d7) (bv 32 0x1f))) (bv 32 0x20) (& (var d7) (bv 32 0x1f)))) (set base (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x0))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfset ([0x18001ff, a0], 0x8000fff){4:32}" eef00100017f018001ff08000fff 0x0 (seq (set offset (bv 32 0x4)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (+ (loadw 0 32 (+ (var a0) (bv 32 0x18001ff))) (bv 32 0x0)) (bv 32 0x8000fff)))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfset 0x1.w{0:32}" eef800000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (bv 32 0x1))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfset 0x10010.l{0:32}" eef9000000010010 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (bv 32 0x10010))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var field) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfins d0, d0{0:32}" efc00000 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set bit_offset (mod (var offset) (bv 32 0x20))) (set container (append (var d0) (var d0))) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set src (& (var d0) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set d0 (cast 32 false (| (& (cast 32 false (>> (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (var src)) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (bv 8 0x20) false)) (~ (cast 32 false (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)))) (& (cast 32 false (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (var src)) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (cast 32 false (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)))))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var src) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var src) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfins d0, (a0){0:32}" efd00000 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (var a0))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set src (& (var d0) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (var src)) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var src) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var src) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfins d0, 0x1(a0){0:32}" efe800000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set src (& (var d0) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (var src)) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var src) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var src) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfins d0, 0x1(a0, d0.w){0:32}" eff000000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x1))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set src (& (var d0) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (var src)) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var src) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var src) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfins d0, (a0, d0.w){3:d7}" eff000ff0100 0x0 (seq (set offset (bv 32 0x3)) (set width (ite (is_zero (& (var d7) (bv 32 0x1f))) (bv 32 0x20) (& (var d7) (bv 32 0x1f)))) (set base (cast 32 false (+ (+ (cast 32 false (var a0)) (cast 32 false (bv 32 0x0))) (cast 32 (msb (cast 16 false (var d0))) (cast 16 false (var d0)))))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set src (& (var d0) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (var src)) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var src) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var src) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfins d0, ([0x18001ff, a0], 0x8000fff){4:32}" eff00100017f018001ff08000fff 0x0 (seq (set offset (bv 32 0x4)) (set width (bv 32 0x20)) (set base (cast 32 false (+ (+ (loadw 0 32 (+ (var a0) (bv 32 0x18001ff))) (bv 32 0x0)) (bv 32 0x8000fff)))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set src (& (var d0) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (var src)) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var src) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var src) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfins d0, 0x1.w{0:32}" eff800000001 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (bv 32 0x1))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set src (& (var d0) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (var src)) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var src) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var src) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "bfins d0, 0x10010.l{0:32}" eff9000000010010 0x0 (seq (set offset (bv 32 0x0)) (set width (bv 32 0x20)) (set base (cast 32 false (bv 32 0x10010))) (set byte_offset (div (var offset) (bv 32 0x8))) (set bit_offset (mod (var offset) (bv 32 0x8))) (set bf_addr (+ (var base) (var byte_offset))) (set byte_count (div (+ (+ (var bit_offset) (var width)) (bv 32 0x7)) (bv 32 0x8))) (set container (bv 64 0x0)) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (var bf_addr))) (bv 8 0x38) false))) (branch (! (ule (var byte_count) (bv 32 0x1))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x1)))) (bv 8 0x30) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x2)))) (bv 8 0x28) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x3)))) (bv 8 0x20) false))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (set container (| (var container) (<< (cast 64 false (loadw 0 8 (+ (var bf_addr) (bv 32 0x4)))) (bv 8 0x18) false))) empty) (set field (& (cast 32 false (>> (var container) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false)) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set src (& (var d0) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (set updated_container (| (& (var container) (~ (<< (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (<< (& (cast 64 false (var src)) (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))) (- (bv 8 0x40) (cast 8 false (+ (var bit_offset) (var width)))) false))) (storew 0 (var bf_addr) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x38) false)))) (branch (! (ule (var byte_count) (bv 32 0x1))) (storew 0 (+ (var bf_addr) (bv 32 0x1)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x30) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x2))) (storew 0 (+ (var bf_addr) (bv 32 0x2)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x28) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x3))) (storew 0 (+ (var bf_addr) (bv 32 0x3)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x20) false)))) empty) (branch (! (ule (var byte_count) (bv 32 0x4))) (storew 0 (+ (var bf_addr) (bv 32 0x4)) (cast 8 false (cast 8 false (>> (var updated_container) (bv 8 0x18) false)))) empty) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (! (is_zero (& (& (var src) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1)))) (<< (bv 32 0x1) (cast 8 false (- (var width) (bv 32 0x1))) false)))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (& (var src) (cast 32 false (- (<< (bv 64 0x1) (cast 8 false (var width)) false) (bv 64 0x1))))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "fbf.w 0x2" f0800000
d "fbeq.w 0x2" f0810000
d "fbogt.w 0x2" f0820000
d "fboge.w 0x2" f0830000
d "fbolt.w 0x2" f0840000
d "fbole.w 0x2" f0850000
d "fbogl.w 0x2" f0860000
d "fbor.w 0x2" f0870000
d "fbun.w 0x2" f0880000
d "fbueq.w 0x2" f0890000
d "fbugt.w 0x2" f08a0000
d "fbuge.w 0x2" f08b0000
d "fbult.w 0x2" f08c0000
d "fbule.w 0x2" f08d0000
d "fbne.w 0x2" f08e0000
d "fbt.w 0x2" f08f0000
d "fbsf.w 0x2" f2900000
d "fbseq.w 0x2" f2910000
d "fbgt.w 0x2" f2920000
d "fbge.w 0x2" f2930000
d "fblt.w 0x2" f2940000
d "fble.w 0x2" f2950000
d "fbgl.w 0x2" f2960000
d "fbgle.w 0x2" f2970000
d "fbngle.w 0x2" f2980000
d "fbngl.w 0x2" f2990000
d "fbnle.w 0x2" f29a0000
d "fbnlt.w 0x2" f29b0000
d "fbnge.w 0x2" f29c0000
d "fbngt.w 0x2" f29d0000
d "fbsne.w 0x2" f29e0000
d "fbst.w 0x2" f29f0000
d "fbf.l 0x3" f0c000000001
d "fbeq.l 0x3" f0c100000001
d "fbogt.l 0x3" f0c200000001
d "fboge.l 0x3" f0c300000001
d "fbolt.l 0x3" f0c400000001
d "fbole.l 0x3" f0c500000001
d "fbogl.l 0x3" f0c600000001
d "fbor.l 0x3" f0c700000001
d "fbun.l 0x3" f0c800000001
d "fbueq.l 0x3" f0c900000001
d "fbugt.l 0x3" f0ca00000001
d "fbuge.l 0x3" f0cb00000001
d "fbult.l 0x3" f0cc00000001
d "fbule.l 0x3" f0cd00000001
d "fbne.l 0x3" f0ce00000001
d "fbt.l 0x3" f0cf00000001
d "fmove fp0, fp0" f2000000
d "fint fp0" f2000001
d "fint fp1, fp2" f2000501
d "fintrz fp1, fp2" f2000503
d "fsqrt fp1, fp2" f2000504
d "flognp1 fp1, fp2" f2000506
d "fatanh fp1, fp2" f2000509
d "fatan fp1, fp2" f200050a
d "fasin fp1, fp2" f200050c
d "fsin fp1, fp2" f200050e
d "ftan fp1, fp2" f200050f
d "flogn fp1, fp2" f2000514
d "flog10 fp1, fp2" f2000515
d "flog2 fp1, fp2" f2000516
d "fabs fp1, fp2" f2000518
d "fneg fp1, fp2" f200051a
d "facos fp1, fp2" f200051c
d "fcos fp1, fp2" f200051d
d "fetox fp0" f2000010
d "fsinh fp1, fp2" f2000502
d "fetoxm1 fp1, fp2" f2000508
d "fetox fp1, fp2" f2000510
d "ftwotox fp1, fp2" f2000511
d "ftentox fp1, fp2" f2000512
d "fcosh fp1, fp2" f2000519
d "fgetexp fp1, fp2" f200051e
d "fgetman fp1, fp2" f200051f
d "fdiv fp1, fp2" f2000520
d "fmod fp1, fp2" f2000521
d "fadd fp1, fp2" f2000522
d "fmul fp1, fp2" f2000523
d "frem fp1, fp2" f2000525
d "fscale fp1, fp2" f2000526
d "fscale.l 0x3, fp0" f23c402600000003
d "fsgldiv fp1, fp2" f2000524
d "fsglmul fp1, fp2" f2000527
d "fsub fp2, fp4" f2000a28
d "fmove.l d0, fp0" f2004000
d "add.x d0, fp7" f2004fff
d "fmove.w d0, fp0" f2005000
d "fcos.d d0, fp4" f2005678
d "fmovecr 0x3f, fp7" f2005fff
d "fmovecr 0xf, fp6" f2005f0f
d "fcmp fp1, fp2" f2000538
d "ftst fp1, fp2" f200053a
d "fmove.s fp0, (a0)" f2106400
d "fmovem (a0), fp6-fp7" f210d003
d "fmovem fp6-fp7, (a0)" f210f003
d "fmovem (a0)+, fp6-fp7" f218d003
d "fmovem fp0-fp1, -(a0)" f220e003
d "fmove.s 1.000000, fp1" f23c44803f800000
d "fmove.d 3.141593, fp1" f23c5480400921fb54442d18
d "fmove.l d0, fpsr" f2008800
d "fmove.l d0, fpcr" f2009000
d "fmove.l fpiar, d0" f200a400
d "fmove.l fpcr, d0" f200b000
d "fmove.l fp0, d0" f2006000
d "fmove.w fp0, d0" f2007000
d "fmove.p fp7, d0{d7}" f2007fff
d "fmove.l a0, fp0" f2084000
d "add.x a0, fp7" f2084fff
d "fmove.w a0, fp0" f2085000
d "fcos.d a0, fp4" f2085678
d "fmove.l fp0, a0" f2086000
d "fmove.w fp0, a0" f2087000
d "fmove.l (a0), fp0" f2104000
d "fmove.x (a0), fp0" f2104800
d "fadd.x (a0), fp0" f2104c22
d "add.x (a0), fp7" f2104fff
d "fmove.w (a0), fp0" f2105000
d "fcos.d (a0), fp4" f2105678
d "fmove.l fp0, (a0)" f2106000
d "fmove.x fp0, (a0)" f2106800
d "fmove.w fp0, (a0)" f2107000
d "fmove.l (a0)+, fp0" f2184000
d "fmove.x (a0)+, fp0" f2184800
d "add.x (a0)+, fp7" f2184fff
d "fmove.w (a0)+, fp0" f2185000
d "fcos.d (a0)+, fp4" f2185678
d "fmove.l fp0, (a0)+" f2186000
d "fmove.x fp0, (a0)+" f2186800
d "fmove.w fp0, (a0)+" f2187000
d "fmove.l -(a0), fp0" f2204000
d "fmove.x -(a0), fp0" f2204800
d "add.x -(a0), fp7" f2204fff
d "fmove.w -(a0), fp0" f2205000
d "fcos.d -(a0), fp4" f2205678
d "fmove.l fp0, -(a0)" f2206000
d "fmove.x fp0, -(a0)" f2206800
d "fmove.w fp0, -(a0)" f2207000
d "fmove.l 0x4fff(a0), fp0" f22840004fff
d "add.x 0x5000(a0), fp7" f2284fff5000
d "fmove.w 0x5fff(a0), fp0" f22850005fff
d "fcos.d -0x6544(a0), fp4" f22856789abc
d "fmove.l fp0, 0x6fff(a0)" f22860006fff
d "fmove.w fp0, 0x7fff(a0)" f22870007fff
d "fmove.l ([0x50005fff], 0x60006fff), fp0" f23040004fff50005fff60006fff
d "add.x 0x0(a0, d5.w), fp7" f2304fff5000
d "fmove.w ([0x60006fff], 0x70007fff), fp0" f23050005fff60006fff70007fff
d "fcos.d -0x44(a0, a1.l * 2), fp4" f23056789abc
d "fmove.l fp0, ([0x70007fff], -0x7fff7f00)" f23060006fff70007fff80008100
d "fmove.w fp0, ([-0x7fff7f00], -0x7e8f6e01)" f23070007fff80008100817091ff
d "fmove.l (a0, a0.w), invalid" f23080008100
d "fmove.l 0x0(a0, d0.w), fpcr" f2309abc0000
d "fmove.l fpcr, (a0, a4.w)" f230b1ffc100
d "fmove.l 0x4fff.w, fp0" f23840004fff
d "add.x 0x5000.w, fp7" f2384fff5000
d "fmove.w 0x5fff.w, fp0" f23850005fff
d "fcos.d 0x9abc.w, fp4" f23856789abc
d "fmove.l fp0, 0x6fff.w" f23860006fff
d "fmove.w fp0, 0x7fff.w" f23870007fff
d "fmove.l 0x4fff5000.l, fp0" f23940004fff5000
d "add.x 0x50005fff.l, fp7" f2394fff50005fff
d "fmove.w 0x5fff6000.l, fp0" f23950005fff6000
d "fcos.d 0x9abc0000.l, fp4" f23956789abc0000
d "fmove.l fp0, 0x6fff7000.l" f23960006fff7000
d "fmove.w fp0, 0x7fff8000.l" f23970007fff8000
d "fmove.l 0x5003(pc), fp0" f23a40004fff
d "add.x 0x5004(pc), fp7" f23a4fff5000
d "fmove.w 0x6003(pc), fp0" f23a50005fff
d "fcos.d 0xffff9ac0(pc), fp4" f23a56789abc
d "fmove.l fp0, 0x7003(pc)" f23a60006fff
d "fmove.w fp0, 0xffff8003(pc)" f23a70007fff
d "fmove.l ([0x50006003], 0x60006fff), fp0" f23b40004fff50005fff60006fff
d "add.x 0x4(pc, d5.w), fp7" f23b4fff5000
d "fmove.w ([0x60007003], 0x70007fff), fp0" f23b50005fff60006fff70007fff
d "fcos.d 0xffffffc0(pc, a1.l * 2), fp4" f23b56789abc
d "fmove.l fp0, ([0x70008003], -0x7fff7f00)" f23b60006fff70007fff80008100
d "fmove.w fp0, ([0x80008104], -0x7e8f6e01)" f23b70007fff80008100817091ff
d "fmove.l 0x4(pc, a0.w), invalid" f23b80008100
d "fmove.l 0x4(pc, d0.w), fpcr" f23b9abc0000
d "fmove.l fpcr, 0x4(pc, a4.w)" f23bb1ffc100
d "fmovem 0x4(pc, a6.w), fp0-fp7" f23bd0ffe100
d "fmove.l 0x4fff5000, fp0" f23c40004fff5000
d "add.x <unsupported>, fp7" f23c4fff50005fff60006fff
d "fmove.w 0x5fff, fp0" f23c50005fff
d "fcos.d -0.000000, fp4" f23c56789abc000000010010
d "fmove.l fp0, 0x6fff7000" f23c60006fff7000
d "fmove.w fp0, 0x7fff" f23c70007fff
d "fsf.b d0" f2400000
d "fseq.b d0" f2400001
d "fsst.b d0" f240007f
d "fslt.b d0" f2401234
d "fsngle.b d0" f2405678
d "fssf.b d0" f2408170
d "fsnge.b d0" f2409abc
d "fdbf d0, 0x5" f24800000001
d "fdbf d0, 0x14" f24800000010
d "fsf.b (a0)" f2500000
d "fseq.b (a0)" f2500001
d "fsst.b (a0)" f250007f
d "fslt.b (a0)" f2501234
d "fsngle.b (a0)" f2505678
d "fssf.b (a0)" f2508170
d "fsnge.b (a0)" f2509abc
d "fsf.b (a0)+" f2580000
d "fseq.b (a0)+" f2580001
d "fsst.b (a0)+" f258007f
d "fslt.b (a0)+" f2581234
d "fsngle.b (a0)+" f2585678
d "fssf.b (a0)+" f2588170
d "fsnge.b (a0)+" f2589abc
d "fsf.b -(a0)" f2600000
d "fseq.b -(a0)" f2600001
d "fsst.b -(a0)" f260007f
d "fslt.b -(a0)" f2601234
d "fsngle.b -(a0)" f2605678
d "fssf.b -(a0)" f2608170
d "fsnge.b -(a0)" f2609abc
d "fsf.b 0x1(a0)" f26800000001
d "fseq.b 0x10(a0)" f26800010010
d "fsst.b 0x80(a0)" f268007f0080
d "fslt.b 0x5678(a0)" f26812345678
d "fsngle.b -0x6544(a0)" f26856789abc
d "fssf.b -0x6e01(a0)" f268817091ff
d "fsnge.b 0x0(a0)" f2689abc0000
d "fsf.b 0x1(a0, d0.w)" f27000000001
d "fseq.b 0x10(a0, d0.w)" f27000010010
d "fsst.b -0x80(a0, d0.w)" f270007f0080
d "fsst.b (a0, d0.w)" f27000ff0100
d "fsf.b ([0x18001ff, a0], 0x8000fff)" f2700100017f018001ff08000fff
d "fslt.b 0x78(a0, d5.w * 8)" f27012345678
d "fsngle.b -0x44(a0, a1.l * 2)" f27056789abc
d "fsf.b (a0, a0.w)" f27080008100
d "fssf.b ([-0x5eff4e01], -0x3eff2e01)" f270817091ffa100b1ffc100d1ff
d "fsnge.b 0x0(a0, d0.w)" f2709abc0000
d "fsst.b ([0x12345678], -0x65440000)" f270f1ffffff123456789abc0000
d "fsf.b 0x1.w" f27800000001
d "fseq.b 0x10.w" f27800010010
d "fsst.b 0x80.w" f278007f0080
d "fslt.b 0x5678.w" f27812345678
d "fsngle.b 0x9abc.w" f27856789abc
d "fssf.b 0x91ff.w" f278817091ff
d "fsnge.b 0x0.w" f2789abc0000
d "fsf.b 0x10010.l" f279000000010010
d "fseq.b 0x10007f.l" f27900010010007f
d "fsst.b 0x8000ff.l" f279007f008000ff
d "fslt.b 0x56789abc.l" f279123456789abc
d "fsngle.b 0x9abc0000.l" f27956789abc0000
d "fssf.b 0x91ffa100.l" f279817091ffa100
d "fsnge.b 0x1.l" f2799abc00000001
d "fbsf.w 0x2" f2b00000
d "fbsf.l 0x3" f2f000000001
d "fdbseq d0, 0x5" f24800310001
d "ftrapge.l 0x12345678" f27b003312345678
d "ftrapf.w 0x1" f27a00000001
d "ftrapeq.w 0x10" f27a00010010
d "ftrapf.w 0x1234" f27a00001234
d "ftrapf.l 0x12345678" f27b000012345678
d "ftrapst.w 0x80" f27a007f0080
d "ftraplt.w 0x5678" f27a12345678
d "ftrapngle.w 0x9abc" f27a56789abc
d "ftrapsf.w 0x91ff" f27a817091ff
d "ftrapnge.w 0x0" f27a9abc0000
d "ftrapf" f27c0000
d "ftrapeq" f27c0001
d "ftrapst" f27c007f
d "ftraplt" f27c1234
d "ftrapngle" f27c5678
d "ftrapsf" f27c8170
d "ftrapnge" f27c9abc
d "fnop" f2800000
d "rte" 4e73 0x0 (branch (! (is_zero (& (cast 16 false (var sr)) (bv 16 0x2000)))) (seq (set rte_state (bv 8 0x1)) (set target (bv 32 0x0)) (repeat (== (var rte_state) (bv 8 0x1)) (seq (set frame (var a7)) (set new_sr (loadw 0 16 (var frame))) (set target (loadw 0 32 (+ (var frame) (bv 32 0x2)))) (set format (>> (loadw 0 16 (+ (var frame) (bv 32 0x6))) (bv 8 0xc) false)) (set frame_size (ite (== (var format) (bv 16 0x0)) (bv 32 0x8) (ite (== (var format) (bv 16 0x1)) (bv 32 0x8) (ite (== (var format) (bv 16 0x2)) (bv 32 0xc) (ite (== (var format) (bv 16 0x3)) (bv 32 0xc) (ite (== (var format) (bv 16 0x4)) (bv 32 0x10) (ite (== (var format) (bv 16 0x7)) (bv 32 0x3c) (ite (== (var format) (bv 16 0x8)) (bv 32 0x3a) (ite (== (var format) (bv 16 0x9)) (bv 32 0x14) (ite (== (var format) (bv 16 0xa)) (bv 32 0x20) (bv 32 0x5c))))))))))) (branch (|| (&& (ule (var format) (bv 16 0x3)) (! (== (var format) (bv 16 0x3)))) (&& (|| (! (ule (var format) (bv 16 0x9))) (== (var format) (bv 16 0x9))) (&& (ule (var format) (bv 16 0xc)) (! (== (var format) (bv 16 0xc)))))) (seq (set a7 (cast 32 false (+ (var frame) (var frame_size)))) (set sr_write_value (cast 16 false (var new_sr))) (branch (! (== (ite (is_zero (& (cast 16 false (var sr)) (bv 16 0x2000))) (bv 8 0x0) (ite (! (is_zero (& (cast 16 false (var sr)) (bv 16 0x1000)))) (bv 8 0x2) (bv 8 0x1))) (ite (is_zero (& (var sr_write_value) (bv 16 0x2000))) (bv 8 0x0) (ite (! (is_zero (& (var sr_write_value) (bv 16 0x1000)))) (bv 8 0x2) (bv 8 0x1))))) (seq (branch (is_zero (& (cast 16 false (var sr)) (bv 16 0x2000))) (set usp (cast 32 false (var a7))) (branch (! (is_zero (& (cast 16 false (var sr)) (bv 16 0x1000)))) (set msp (cast 32 false (var a7))) (set isp (cast 32 false (var a7))))) (branch (is_zero (& (var sr_write_value) (bv 16 0x2000))) (set a7 (cast 32 false (var usp))) (branch (! (is_zero (& (var sr_write_value) (bv 16 0x1000)))) (set a7 (cast 32 false (var msp))) (set a7 (cast 32 false (var isp)))))) empty) (set sr (var sr_write_value)) (set rte_state (ite (== (var format) (bv 16 0x1)) (bv 8 0x1) (bv 8 0x0)))) (set rte_state (bv 8 0x2))))) (branch (== (var rte_state) (bv 8 0x0)) (jmp (var target)) (seq (set trap_op (bv 32 0xa)) (set trap_vector (bv 32 0xe)) (goto m68k_trap)))) (seq (set trap_op (bv 32 0x9)) (set trap_vector (bv 32 0x8)) (goto m68k_privilege)))
d "movem.l a0, -(a0)" 48e00080 0x0 (seq (set addr (var a0)) (set addr (- (var addr) (bv 32 0x4))) (storew 0 (var addr) (cast 32 false (cast 32 false (- (var a0) (bv 32 0x4))))) (set a0 (cast 32 false (var addr))))
d "fmovem 0x10(a0), fp6-fp7" f228d0030010
d "fmovem 0x0(a0, d0.w), fp6-fp7" f230d0030000
d "fmovem 0x1234.w, fp6-fp7" f238d0031234
d "fmovem 0x12345678.l, fp6-fp7" f239d00312345678
d "fmovem 0x4(pc), fp6-fp7" f23ad0030000
d "fmovem fp6-fp7, 0x10(a0)" f228f0030010
d "fmovem fp6-fp7, 0x0(a0, d0.w)" f230f0030000
d "fmovem fp6-fp7, 0x1234.w" f238f0031234
d "fmovem fp6-fp7, 0x12345678.l" f239f00312345678
d "fmovem 0x10(a0), d1" f228d8100010
d "fmovem 0x0(a0, d0.w), d1" f230d8100000
d "fmovem 0x1234.w, d1" f238d8101234
d "fmovem 0x12345678.l, d1" f239d81012345678
d "fmovem 0x4(pc), d1" f23ad8100000
d "fmovem 0x4(pc, d0.w), d1" f23bd8100000
d "fmovem d1, 0x10(a0)" f228f8100010
d "fmovem d1, 0x0(a0, d0.w)" f230f8100000
d "fmovem d1, 0x1234.w" f238f8101234
d "fmovem d1, 0x12345678.l" f239f81012345678
d "fmovem (a0)+, d1" f218d810
d "fmovem (a0), d1" f210d810
d "fmovem d1, (a0)" f210f810
d "fmove.s (a0), fp0" f2104400
d "fmovem d1, -(a0)" f220e810
d "fsave ([0x10, a0, d0.w], 0x20)" f33001330000001000000020
d "frestore ([0x12, pc, d0.w], 0x20)" f37b01330000001000000020
d "fsave (a0)" f310
d "fsave -(a0)" f320
d "fsave 0x0(a0)" f3280000
d "fsave 0x0(a0, d0.w)" f3300000
d "fsave (a0, d0.w)" f3300100
d "fsave ([0x18001ff, a0], 0x8000fff)" f330017f018001ff08000fff
d "fsave 0x0.w" f3380000
d "fsave 0x1.l" f33900000001
d "frestore (a0)" f350
d "frestore (a0)+" f358
d "frestore 0x0(a0)" f3680000
d "frestore 0x0(a0, d0.w)" f3700000
d "frestore (a0, d0.w)" f3700100
d "frestore ([0x18001ff, a0], 0x8000fff)" f370017f018001ff08000fff
d "frestore 0x0.w" f3780000
d "frestore 0x1.l" f37900000001
d "frestore 0x2(pc)" f37a0000
d "frestore 0x2(pc, d0.w)" f37b0000
d "frestore ([0x1800201, pc], 0x8000fff)" f37b017f018001ff08000fff
d "frestore 0x0" f37c0000
d "mulu.l d0, d4:d5" 4c005404 0x0 (seq (set src (var d0)) (set dst (var d5)) (set res (* (cast 64 false (var dst)) (cast 64 false (var src)))) (set d5 (cast 32 false (var res))) (set d4 (cast 32 false (>> (var res) (bv 8 0x20) false))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 64 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 64 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "muls.l d0, d4:d5" 4c005c04 0x0 (seq (set src (var d0)) (set dst (var d5)) (set res (* (cast 64 (msb (var dst)) (var dst)) (cast 64 (msb (var src)) (var src)))) (set d5 (cast 32 false (var res))) (set d4 (cast 32 false (>> (var res) (bv 8 0x20) false))) (set sr (| (& (var sr) (bv 16 0xff00)) (cast 16 false (cast 8 false (| (| (& (| (& (| (& (| (& (& (cast 8 false (var sr)) (bv 8 0xe0)) (bv 8 0xf7)) (<< (ite (msb (cast 64 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x3) false)) (bv 8 0xfb)) (<< (ite (is_zero (cast 64 false (var res))) (bv 8 0x1) (bv 8 0x0)) (bv 8 0x2) false)) (bv 8 0xfd)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x1) false)) (bv 8 0xfe)) (<< (ite false (bv 8 0x1) (bv 8 0x0)) (bv 8 0x0) false)) (& (cast 8 false (var sr)) (bv 8 0x10))))))))
d "lea.l -0x2a(a1, d2.w), a3" 47f12120ffd6 0x0 (set a3 (cast 32 false (+ (+ (cast 32 false (var a1)) (cast 32 false (bv 32 0xffffffd6))) (cast 32 (msb (cast 16 false (var d2))) (cast 16 false (var d2))))))
d "fmove.d (a0), fp0" f2105400
d "fmove.b (a0), fp0" f2105800
d "fbf.w 0x12" f2800010
