# TMS320C674x (unified fixed + floating-point VLIW) native disassembler
# Instruction words are little-endian; addresses are the packet PCE1.
# Several vectors are cross-checked against TI dis6x (c6000 v7.4.4).
d "nop" 00000000 0x0 nop
d "nop 5" 00800000 0x0 nop
d "mvk .s1 0x0,a0" 28000000 0x0 (set a0 (bv 32 0x0))
d "mvk .s2 0x0,b0" 2a000000 0x0 (set b0 (bv 32 0x0))
d "mvkh .s1 0x0,a5" 68008002 0x0 (set a5 (| (& (var a5) (bv 32 0xffff)) (bv 32 0x0)))
d "add .l1 a0,a1,a2" 78000401 0x0 (set a2 (+ (var a0) (var a1)))
d "and .l1 0x8,a3,a0" 580f0d00 0x0 (set a0 (& (bv 32 0x8) (var a3)))
d "mpysp .m1 a0,a1,a2" 000e0401 0x0 (set a2 (fbits (*. rne (float 0 (var a0) ) (float 0 (var a1) ))))
d "adddp .l1 a1:a0,a3:a2,a5:a4" 18030802 0x0 (seq (set _d (fbits (+. rne (float 1 (append (var a1) (var a0)) ) (float 1 (append (var a3) (var a2)) )))) (set a4 (cast 32 false (var _d))) (set a5 (cast 32 false (>> (var _d) (bv 32 0x20) false))))
d "mpydp .m1 a1:a0,a3:a2,a5:a4" 00070802 0x0 (seq (set _d (fbits (*. rne (float 1 (append (var a1) (var a0)) ) (float 1 (append (var a3) (var a2)) )))) (set a4 (cast 32 false (var _d))) (set a5 (cast 32 false (>> (var _d) (bv 32 0x20) false))))
d "add2 .s1 a1,a2,a3" 60208801 0x0 (set a3 (append (+ (cast 16 false (>> (var a1) (bv 32 0x10) false)) (cast 16 false (>> (var a2) (bv 32 0x10) false))) (+ (cast 16 false (var a1)) (cast 16 false (var a2)))))
d "sub2 .s2 b1,b2,b3" 62248801 0x0 (set b3 (append (- (cast 16 false (>> (var b1) (bv 32 0x10) false)) (cast 16 false (>> (var b2) (bv 32 0x10) false))) (- (cast 16 false (var b1)) (cast 16 false (var b2)))))
d "ldb .d1 *a4,a3" 24029001 0x0 (set a3 (cast 32 (msb (loadw 0 8 (+ (var a4) (bv 32 0x0)))) (loadw 0 8 (+ (var a4) (bv 32 0x0)))))
d "ldbu .d1 *+a3[0x1],a3" 14228c01 0x0 (set a3 (cast 32 false (loadw 0 8 (+ (var a3) (bv 32 0x1)))))
d "ldw .d2 *-b1[b5],b28" e6a8041e 0x0 (set b28 (loadw 0 32 (- (var b1) (* (var b5) (bv 32 0x4)))))
d "ldnw .d1 *a5,a0" 34031400 0x0 (set a0 (loadw 0 32 (+ (var a5) (bv 32 0x0))))
d "lddw .d1 *a4,a1:a0" 64031000 0x0 (seq (set ea (+ (var a4) (bv 32 0x0))) (set a0 (loadw 0 32 (var ea))) (set a1 (loadw 0 32 (+ (var ea) (bv 32 0x4)))))
d "[a0] stb .d2 b0,*b4++[0x1]" b63610c0 0x0 (branch (! (is_zero (var a0))) (seq (storew 0 (var b4) (cast 8 false (var b0))) (set b4 (+ (var b4) (bv 32 0x1)))) nop)
d "[a2] ldw .d2 *+b14[0x302c],b3" 6e2cb0a1 0x0 (branch (! (is_zero (var a2))) (set b3 (loadw 0 32 (+ (var b14) (bv 32 0xc0b0)))) nop)
d "[a0] mv .l2x a5,b5" db1f94c2 0x0 (branch (! (is_zero (var a0))) (set b5 (var a5)) nop)
d "[a0] mv .l1x b5,a3" d91f94c1 0x0 (branch (! (is_zero (var a0))) (set a3 (var b5)) nop)
d "[b1] neg .l1 a6,a6" d8001843 0x0 (branch (! (is_zero (var b1))) (set a6 (~- (var a6))) nop)
d "[a0] sub .l2 b4,0x1,b4" 5ae013c2 0x0 (branch (! (is_zero (var a0))) (set b4 (- (var b4) (bv 32 0x1))) nop)
d "bnop .s2 b3,0x4" 62838c00 0x0 (jmp (var b3))
d "b .s1 0x20" 10040000 0x0 (jmp (bv 32 0x20))
d "b .s2 b3" 62030c00 0x0 (jmp (var b3))
d "bpos .s1 0x8,a5" 20408002 0x0 (branch (|| (! (sle (var a5) (bv 32 0x0))) (== (var a5) (bv 32 0x0))) (jmp (bv 32 0x8)) nop)
d "bdec .s1 0x4,a5" 20308002 0x0 (branch (|| (! (sle (var a5) (bv 32 0x0))) (== (var a5) (bv 32 0x0))) (seq (set a5 (- (var a5) (bv 32 0x1))) (jmp (bv 32 0x4))) nop)
d ".fphead n, l, w, bu, nobr, nosat, 0001000b" 000000e1 0x1c
d ".fphead n, l, w, b, nobr, nosat, 1111010b" 082841ef 0x5c
d "[b0] bnop .s1 0x40,0x4" 21810820 0x38 (branch (! (is_zero (var b0))) (jmp (bv 32 0x40)) nop)
d "dint" 00400010 0x0
d "rint" 00600010 0x0
d "shru .s1 a3,0x14,a6" a1890e03 0x0 (set a6 (>> (var a3) (bv 32 0x14) false))
d "shr .s1 a6,0x2,a6" a04d1803 0x0 (set a6 (>> (var a6) (bv 32 0x2) (msb (var a6))))
d "cmpgtsp .s1 a10,a3,a1" 614e8d00 0x0 (set a1 (ite (<. (float 0 (var a3) ) (float 0 (var a10) )) (bv 32 0x1) (bv 32 0x0)))
d "cmpltsp .s1 a4,a3,a1" a18e8c00 0x0 (set a1 (ite (<. (float 0 (var a4) ) (float 0 (var a3) )) (bv 32 0x1) (bv 32 0x0)))
d "cmpgtdp .s2 b5:b4,b7:b6,b1" 628a9800 0x0 (set b1 (ite (<. (float 1 (append (var b7) (var b6)) ) (float 1 (append (var b5) (var b4)) )) (bv 32 0x1) (bv 32 0x0)))
d "cmpltdp .s2 b11:b10,b5:b4,b0" a24a1100 0x0 (set b0 (ite (<. (float 1 (append (var b11) (var b10)) ) (float 1 (append (var b5) (var b4)) )) (bv 32 0x1) (bv 32 0x0)))
d "absdp .s2 b11:b10,b5:b4" 224b2d02 0x0 (seq (set _d (& (append (var b11) (var b10)) (bv 64 0x7fffffffffffffff))) (set b4 (cast 32 false (var _d))) (set b5 (cast 32 false (>> (var _d) (bv 32 0x20) false))))
d "mpydp .m1 a5:a4,a7:a6,a5:a4" 00871802 0x0 (seq (set _d (fbits (*. rne (float 1 (append (var a5) (var a4)) ) (float 1 (append (var a7) (var a6)) )))) (set a4 (cast 32 false (var _d))) (set a5 (cast 32 false (>> (var _d) (bv 32 0x20) false))))
d "intsp .l2 b4,b5" 5a099002 0x0 (set b5 (fbits (fcast_sfloat ieee754-bin32 rne (var b4))))
d "mvc .s2 csr,b4" e2030402 0x0 (set b4 (var csr))
d "mvc .s2 b6,csr" a2039800 0x0 (set csr (var b6))
d "set .s2 b4,31,31,b4" 8aff1302 0x0 (set b4 (| (var b4) (bv 32 0x80000000)))
d "extu .s2 b4,1,21,b4" 0b351002 0x0 (set b4 (>> (<< (var b4) (bv 32 0x1) false) (bv 32 0x15) false))
d "addaw .d2 b15,6,b4" fe060012 0x0 (set b4 (+ (var b15) (<< (bv 32 0x6) (bv 32 0x2) false)))
d "addsp .s2 b5,b7,b5" 1aae9c02 0x0 (set b5 (fbits (+. rne (float 0 (var b5) ) (float 0 (var b7) ))))
d "adddp .s1x a5:a4,b11:b10,a7:a6" 589e2803 0x0 (seq (set _d (fbits (+. rne (float 1 (append (var a5) (var a4)) ) (float 1 (append (var b11) (var b10)) )))) (set a6 (cast 32 false (var _d))) (set a7 (cast 32 false (>> (var _d) (bv 32 0x20) false))))
d "xor .d2x b7,a4,b5" b3fb9002 0x0 (set b5 (^ (var b7) (var a4)))
d "add .d1x 0x8,b15,a4" f01a3d02 0x0 (set a4 (+ (bv 32 0x8) (var b15)))
d "mpy32u .m1 a8,a5,a7:a6" 30061503 0x0 (seq (set _d (* (cast 64 false (var a8)) (cast 64 false (var a5)))) (set a6 (cast 32 false (var _d))) (set a7 (cast 32 false (>> (var _d) (bv 32 0x20) false))))
d "mpyspdp .m1x b4,a11:a10,a7:a6" b0952803 0x0 (seq (set _d (fbits (*. rne (fconvert ieee754-bin64 rne (float 0 (var b4) )) (float 1 (append (var a11) (var a10)) )))) (set a6 (cast 32 false (var _d))) (set a7 (cast 32 false (>> (var _d) (bv 32 0x20) false))))
d "mpysu .m1 0xc,a11,a3" 008fad01 0x0 (set a3 (* (cast 32 (msb (cast 16 false (bv 32 0xc))) (cast 16 false (bv 32 0xc))) (cast 32 false (cast 16 false (var a11)))))
# Assembler idioms rendered like the TI reference (dis6x): MV/NEG/NOT/ZERO and
# the negative-constant SUB, plus the 40-bit (slong) SUB/ADD pair destinations.
d "zero .l1 a3" f8008001 0x0 (set a3 (bv 32 0x0))
d "zero .l1 a7:a6" f8040003 0x0 (seq (set a6 (bv 32 0x0)) (set a7 (bv 32 0x0)))
d "not .s1 a3,a3" a0e28f01 0x0 (set a3 (~ (var a3)))
d "sub .l1x b4,0x6,a1" 58509300 0x0 (set a1 (- (var b4) (bv 32 0x6)))
d "cmpgtu .l1 a5,a7:a6,a1" b8a99800 0x0 (set a1 (ite (! (ule (cast 64 false (var a5)) (& (append (var a7) (var a6)) (bv 64 0xffffffffff)))) (bv 32 0x1) (bv 32 0x0)))
# RzIL scalar-core coverage (bytes from TI asm6x): addk, the five compares,
# signed ext, idle, sign/zero-extended halfword loads, 16x16 multiplies, neg,
# register shl, and byte/half/word stores. Each line's IL is validated by rz-asm.
d "addk .s1 0x64,a0" 50320000 0x0 (set a0 (+ (var a0) (bv 32 0x64)))
d "cmpeq .l1 a1,a2,a3" 782a8801 0x0 (set a3 (ite (== (var a1) (var a2)) (bv 32 0x1) (bv 32 0x0)))
d "cmpgt .l1 a1,a2,a3" f8288801 0x0 (set a3 (ite (! (sle (var a1) (var a2))) (bv 32 0x1) (bv 32 0x0)))
d "cmpgtu .l1 a1,a2,a3" f8298801 0x0 (set a3 (ite (! (ule (var a1) (var a2))) (bv 32 0x1) (bv 32 0x0)))
d "cmplt .l1 a1,a2,a3" f82a8801 0x0 (set a3 (ite (&& (sle (var a1) (var a2)) (! (== (var a1) (var a2)))) (bv 32 0x1) (bv 32 0x0)))
d "cmpltu .l1 a1,a2,a3" f82b8801 0x0 (set a3 (ite (&& (ule (var a1) (var a2)) (! (== (var a1) (var a2)))) (bv 32 0x1) (bv 32 0x0)))
d "ext .s1 a1,8,24,a3" 48188501 0x0 (set a3 (>> (<< (var a1) (bv 32 0x8) false) (bv 32 0x18) (msb (<< (var a1) (bv 32 0x8) false))))
d "idle" 00e00100 0x0 nop
d "ldh .d1 *a4,a3" 44029001 0x0 (set a3 (cast 32 (msb (loadw 0 16 (+ (var a4) (bv 32 0x0)))) (loadw 0 16 (+ (var a4) (bv 32 0x0)))))
d "ldhu .d1 *a4,a3" 04029001 0x0 (set a3 (cast 32 false (loadw 0 16 (+ (var a4) (bv 32 0x0)))))
d "mpy .m1 a1,a2,a3" 802c8801 0x0 (set a3 (* (cast 32 (msb (cast 16 false (var a1))) (cast 16 false (var a1))) (cast 32 (msb (cast 16 false (var a2))) (cast 16 false (var a2)))))
d "mpyh .m1 a1,a2,a3" 80208801 0x0 (set a3 (* (cast 32 (msb (cast 16 false (>> (var a1) (bv 32 0x10) false))) (cast 16 false (>> (var a1) (bv 32 0x10) false))) (cast 32 (msb (cast 16 false (>> (var a2) (bv 32 0x10) false))) (cast 16 false (>> (var a2) (bv 32 0x10) false)))))
d "mpyu .m1 a0,a1,a2" 800f0401 0x0 (set a2 (* (cast 32 false (cast 16 false (var a0))) (cast 32 false (cast 16 false (var a1)))))
d "mpysu .m1 a0,a1,a2" 800d0401 0x0 (set a2 (* (cast 32 (msb (cast 16 false (var a0))) (cast 16 false (var a0))) (cast 32 false (cast 16 false (var a1)))))
d "mpyhu .m1 a0,a1,a2" 80030401 0x0 (set a2 (* (cast 32 false (cast 16 false (>> (var a0) (bv 32 0x10) false))) (cast 32 false (cast 16 false (>> (var a1) (bv 32 0x10) false)))))
d "mpyluhs .m1 a0,a1,a2" 800a0401 0x0 (set a2 (* (cast 32 false (cast 16 false (var a0))) (cast 32 (msb (cast 16 false (>> (var a1) (bv 32 0x10) false))) (cast 16 false (>> (var a1) (bv 32 0x10) false)))))
d "smpy .m1 a0,a1,a2" 000d0401 0x0 (set a2 (let _p (* (cast 32 (msb (cast 16 false (var a0))) (cast 16 false (var a0))) (cast 32 (msb (cast 16 false (var a1))) (cast 16 false (var a1)))) (ite (== (var _p) (bv 32 0x40000000)) (bv 32 0x7fffffff) (<< (var _p) (bv 32 0x1) false))))
d "smpylh .m1 a0,a1,a2" 00090401 0x0 (set a2 (let _p (* (cast 32 (msb (cast 16 false (var a0))) (cast 16 false (var a0))) (cast 32 (msb (cast 16 false (>> (var a1) (bv 32 0x10) false))) (cast 16 false (>> (var a1) (bv 32 0x10) false)))) (ite (== (var _p) (bv 32 0x40000000)) (bv 32 0x7fffffff) (<< (var _p) (bv 32 0x1) false))))
d "mpyi .m1 a0,a1,a2" 00020401 0x0 (set a2 (* (var a0) (var a1)))
d "mpyid .m1 a0,a1,a3:a2" 00040401 0x0 (seq (set _d (* (cast 64 (msb (var a0)) (var a0)) (cast 64 (msb (var a1)) (var a1)))) (set a2 (cast 32 false (var _d))) (set a3 (cast 32 false (>> (var _d) (bv 32 0x20) false))))
d "sptrunc .l1 a0,a2" 78010001 0x0 (set a2 (fcast_sint 32 rtz (float 0 (var a0) )))
d "neg .l1 a1,a3" d8008401 0x0 (set a3 (~- (var a1)))
d "shl .s1 a1,0x2,a3" a04c8401 0x0 (set a3 (<< (var a1) (bv 32 0x2) false))
d "stw .d1 a3,*a4" 74029001 0x0 (storew 0 (+ (var a4) (bv 32 0x0)) (var a3))
d "stnw .d1 a2,*a5" 54031401 0x0 (storew 0 (+ (var a5) (bv 32 0x0)) (var a2))
d "stb .d1 a3,*a4" 34029001 0x0 (storew 0 (+ (var a4) (bv 32 0x0)) (cast 8 false (var a3)))
d "sth .d1 a3,*a4" 54029001 0x0 (storew 0 (+ (var a4) (bv 32 0x0)) (cast 16 false (var a3)))
# Non-aligned doubleword store (STNDW): same 64-bit data path as STDW.
d "stndw .d1 a3:a2,*a4" 74039001 0x0 (seq (set ea (+ (var a4) (bv 32 0x0))) (storew 0 (var ea) (var a2)) (storew 0 (+ (var ea) (bv 32 0x4)) (var a3)))
# MVC reads of further control registers: irp (common to all C6000) and ssr
# (C64x+ extension), confirming the control-register bindings resolve.
d "mvc .s2 irp,b4" e2031802 0x0 (set b4 (var irp))
d "mvc .s2 ssr,b4" e2035402 0x0 (set b4 (var ssr))
# Packed byte add/sub (ADD4/SUB4, C64x+): four independent 8-bit lanes.
d "add4 .l1 a1,a2,a3" b82c8801 0x0 (set a3 (append (+ (cast 8 false (>> (var a1) (bv 32 0x18) false)) (cast 8 false (>> (var a2) (bv 32 0x18) false))) (append (+ (cast 8 false (>> (var a1) (bv 32 0x10) false)) (cast 8 false (>> (var a2) (bv 32 0x10) false))) (append (+ (cast 8 false (>> (var a1) (bv 32 0x8) false)) (cast 8 false (>> (var a2) (bv 32 0x8) false))) (+ (cast 8 false (var a1)) (cast 8 false (var a2)))))))
d "sub4 .l1 a1,a2,a3" d82c8801 0x0 (set a3 (append (- (cast 8 false (>> (var a1) (bv 32 0x18) false)) (cast 8 false (>> (var a2) (bv 32 0x18) false))) (append (- (cast 8 false (>> (var a1) (bv 32 0x10) false)) (cast 8 false (>> (var a2) (bv 32 0x10) false))) (append (- (cast 8 false (>> (var a1) (bv 32 0x8) false)) (cast 8 false (>> (var a2) (bv 32 0x8) false))) (- (cast 8 false (var a1)) (cast 8 false (var a2)))))))
# Halfword packs (PACK2/PACKH2/PACKLH2/PACKHL2) and byte unpacks (UNPKLU4/UNPKHU4).
d "pack2 .l1 a1,a2,a3" 18208801 0x0 (set a3 (append (cast 16 false (var a1)) (cast 16 false (var a2))))
d "packh2 .l1 a1,a2,a3" d8238801 0x0 (set a3 (append (cast 16 false (>> (var a1) (bv 32 0x10) false)) (cast 16 false (>> (var a2) (bv 32 0x10) false))))
d "packlh2 .l1 a1,a2,a3" 78238801 0x0 (set a3 (append (cast 16 false (var a1)) (cast 16 false (>> (var a2) (bv 32 0x10) false))))
d "packhl2 .l1 a1,a2,a3" 98238801 0x0 (set a3 (append (cast 16 false (>> (var a1) (bv 32 0x10) false)) (cast 16 false (var a2))))
d "unpklu4 .l1 a2,a3" 58438801 0x0 (set a3 (append (cast 16 false (cast 8 false (>> (var a2) (bv 32 0x8) false))) (cast 16 false (cast 8 false (var a2)))))
d "unpkhu4 .l1 a2,a3" 58638801 0x0 (set a3 (append (cast 16 false (cast 8 false (>> (var a2) (bv 32 0x18) false))) (cast 16 false (cast 8 false (>> (var a2) (bv 32 0x10) false)))))
# Saturating packed ops (C64x+): signed halfword add/sub (SADD2/SSUB2) and the
# signed 32->16 pack (SPACK2), each lane clamped to the signed range.
d "sadd2 .s1 a1,a2,a3" 302c8801 0x0 (set a3 (append (let _sat (+ (cast 32 (msb (cast 16 false (>> (var a1) (bv 32 0x10) false))) (cast 16 false (>> (var a1) (bv 32 0x10) false))) (cast 32 (msb (cast 16 false (>> (var a2) (bv 32 0x10) false))) (cast 16 false (>> (var a2) (bv 32 0x10) false)))) (ite (! (sle (var _sat) (bv 32 0x7fff))) (bv 16 0x7fff) (ite (&& (sle (var _sat) (bv 32 0xffff8000)) (! (== (var _sat) (bv 32 0xffff8000)))) (bv 16 0x8000) (cast 16 false (var _sat))))) (let _sat (+ (cast 32 (msb (cast 16 false (var a1))) (cast 16 false (var a1))) (cast 32 (msb (cast 16 false (var a2))) (cast 16 false (var a2)))) (ite (! (sle (var _sat) (bv 32 0x7fff))) (bv 16 0x7fff) (ite (&& (sle (var _sat) (bv 32 0xffff8000)) (! (== (var _sat) (bv 32 0xffff8000)))) (bv 16 0x8000) (cast 16 false (var _sat)))))))
d "ssub2 .l1 a1,a2,a3" 982c8801 0x0 (set a3 (append (let _sat (- (cast 32 (msb (cast 16 false (>> (var a1) (bv 32 0x10) false))) (cast 16 false (>> (var a1) (bv 32 0x10) false))) (cast 32 (msb (cast 16 false (>> (var a2) (bv 32 0x10) false))) (cast 16 false (>> (var a2) (bv 32 0x10) false)))) (ite (! (sle (var _sat) (bv 32 0x7fff))) (bv 16 0x7fff) (ite (&& (sle (var _sat) (bv 32 0xffff8000)) (! (== (var _sat) (bv 32 0xffff8000)))) (bv 16 0x8000) (cast 16 false (var _sat))))) (let _sat (- (cast 32 (msb (cast 16 false (var a1))) (cast 16 false (var a1))) (cast 32 (msb (cast 16 false (var a2))) (cast 16 false (var a2)))) (ite (! (sle (var _sat) (bv 32 0x7fff))) (bv 16 0x7fff) (ite (&& (sle (var _sat) (bv 32 0xffff8000)) (! (== (var _sat) (bv 32 0xffff8000)))) (bv 16 0x8000) (cast 16 false (var _sat)))))))
d "spack2 .s1 a1,a2,a3" b02c8801 0x0 (set a3 (append (let _sat (var a1) (ite (! (sle (var _sat) (bv 32 0x7fff))) (bv 16 0x7fff) (ite (&& (sle (var _sat) (bv 32 0xffff8000)) (! (== (var _sat) (bv 32 0xffff8000)))) (bv 16 0x8000) (cast 16 false (var _sat))))) (let _sat (var a2) (ite (! (sle (var _sat) (bv 32 0x7fff))) (bv 16 0x7fff) (ite (&& (sle (var _sat) (bv 32 0xffff8000)) (! (== (var _sat) (bv 32 0xffff8000)))) (bv 16 0x8000) (cast 16 false (var _sat)))))))
# Dot products (DOTP2 = lo*lo+hi*hi, DOTPN2 = hi*hi-lo*lo) and packed min/max
# (MIN2/MAX2 signed halfwords, MINU4/MAXU4 unsigned bytes).
d "dotp2 .m1 a1,a2,a3" 30238801 0x0 (set a3 (+ (* (cast 32 (msb (cast 16 false (var a1))) (cast 16 false (var a1))) (cast 32 (msb (cast 16 false (var a2))) (cast 16 false (var a2)))) (* (cast 32 (msb (cast 16 false (>> (var a1) (bv 32 0x10) false))) (cast 16 false (>> (var a1) (bv 32 0x10) false))) (cast 32 (msb (cast 16 false (>> (var a2) (bv 32 0x10) false))) (cast 16 false (>> (var a2) (bv 32 0x10) false))))))
d "dotpn2 .m1 a1,a2,a3" 70228801 0x0 (set a3 (- (* (cast 32 (msb (cast 16 false (>> (var a1) (bv 32 0x10) false))) (cast 16 false (>> (var a1) (bv 32 0x10) false))) (cast 32 (msb (cast 16 false (>> (var a2) (bv 32 0x10) false))) (cast 16 false (>> (var a2) (bv 32 0x10) false)))) (* (cast 32 (msb (cast 16 false (var a1))) (cast 16 false (var a1))) (cast 32 (msb (cast 16 false (var a2))) (cast 16 false (var a2))))))
d "min2 .l1 a1,a2,a3" 38288801 0x0 (set a3 (append (ite (sle (cast 16 false (>> (var a1) (bv 32 0x10) false)) (cast 16 false (>> (var a2) (bv 32 0x10) false))) (cast 16 false (>> (var a1) (bv 32 0x10) false)) (cast 16 false (>> (var a2) (bv 32 0x10) false))) (ite (sle (cast 16 false (var a1)) (cast 16 false (var a2))) (cast 16 false (var a1)) (cast 16 false (var a2)))))
d "max2 .l1 a1,a2,a3" 58288801 0x0 (set a3 (append (ite (sle (cast 16 false (>> (var a1) (bv 32 0x10) false)) (cast 16 false (>> (var a2) (bv 32 0x10) false))) (cast 16 false (>> (var a2) (bv 32 0x10) false)) (cast 16 false (>> (var a1) (bv 32 0x10) false))) (ite (sle (cast 16 false (var a1)) (cast 16 false (var a2))) (cast 16 false (var a2)) (cast 16 false (var a1)))))
d "minu4 .l1 a1,a2,a3" 18298801 0x0 (set a3 (append (ite (ule (cast 8 false (>> (var a1) (bv 32 0x18) false)) (cast 8 false (>> (var a2) (bv 32 0x18) false))) (cast 8 false (>> (var a1) (bv 32 0x18) false)) (cast 8 false (>> (var a2) (bv 32 0x18) false))) (append (ite (ule (cast 8 false (>> (var a1) (bv 32 0x10) false)) (cast 8 false (>> (var a2) (bv 32 0x10) false))) (cast 8 false (>> (var a1) (bv 32 0x10) false)) (cast 8 false (>> (var a2) (bv 32 0x10) false))) (append (ite (ule (cast 8 false (>> (var a1) (bv 32 0x8) false)) (cast 8 false (>> (var a2) (bv 32 0x8) false))) (cast 8 false (>> (var a1) (bv 32 0x8) false)) (cast 8 false (>> (var a2) (bv 32 0x8) false))) (ite (ule (cast 8 false (var a1)) (cast 8 false (var a2))) (cast 8 false (var a1)) (cast 8 false (var a2)))))))
d "maxu4 .l1 a1,a2,a3" 78288801 0x0 (set a3 (append (ite (ule (cast 8 false (>> (var a1) (bv 32 0x18) false)) (cast 8 false (>> (var a2) (bv 32 0x18) false))) (cast 8 false (>> (var a2) (bv 32 0x18) false)) (cast 8 false (>> (var a1) (bv 32 0x18) false))) (append (ite (ule (cast 8 false (>> (var a1) (bv 32 0x10) false)) (cast 8 false (>> (var a2) (bv 32 0x10) false))) (cast 8 false (>> (var a2) (bv 32 0x10) false)) (cast 8 false (>> (var a1) (bv 32 0x10) false))) (append (ite (ule (cast 8 false (>> (var a1) (bv 32 0x8) false)) (cast 8 false (>> (var a2) (bv 32 0x8) false))) (cast 8 false (>> (var a2) (bv 32 0x8) false)) (cast 8 false (>> (var a1) (bv 32 0x8) false))) (ite (ule (cast 8 false (var a1)) (cast 8 false (var a2))) (cast 8 false (var a2)) (cast 8 false (var a1)))))))
# Absolute value with saturation (ABS 32-bit, ABS2 per-halfword) and four-way
# byte dot products (DOTPU4 unsigned, DOTPSU4 signed src1 x unsigned src2).
d "abs .l1 a2,a3" 58038801 0x0 (set a3 (let _a (var a2) (ite (|| (! (sle (var _a) (bv 32 0x0))) (== (var _a) (bv 32 0x0))) (var _a) (ite (== (var _a) (bv 32 0x80000000)) (bv 32 0x7fffffff) (~- (var _a))))))
d "abs2 .l1 a2,a3" 58838801 0x0 (set a3 (append (let _h (cast 16 false (>> (var a2) (bv 32 0x10) false)) (ite (|| (! (sle (var _h) (bv 16 0x0))) (== (var _h) (bv 16 0x0))) (var _h) (ite (== (var _h) (bv 16 0x8000)) (bv 16 0x7fff) (~- (var _h))))) (let _h (cast 16 false (var a2)) (ite (|| (! (sle (var _h) (bv 16 0x0))) (== (var _h) (bv 16 0x0))) (var _h) (ite (== (var _h) (bv 16 0x8000)) (bv 16 0x7fff) (~- (var _h)))))))
d "dotpu4 .m1 a1,a2,a3" b0218801 0x0 (set a3 (+ (+ (+ (* (cast 32 false (cast 8 false (var a1))) (cast 32 false (cast 8 false (var a2)))) (* (cast 32 false (cast 8 false (>> (var a1) (bv 32 0x8) false))) (cast 32 false (cast 8 false (>> (var a2) (bv 32 0x8) false))))) (* (cast 32 false (cast 8 false (>> (var a1) (bv 32 0x10) false))) (cast 32 false (cast 8 false (>> (var a2) (bv 32 0x10) false))))) (* (cast 32 false (cast 8 false (>> (var a1) (bv 32 0x18) false))) (cast 32 false (cast 8 false (>> (var a2) (bv 32 0x18) false))))))
d "dotpsu4 .m1 a1,a2,a3" b0208801 0x0 (set a3 (+ (+ (+ (* (cast 32 (msb (cast 8 false (var a1))) (cast 8 false (var a1))) (cast 32 false (cast 8 false (var a2)))) (* (cast 32 (msb (cast 8 false (>> (var a1) (bv 32 0x8) false))) (cast 8 false (>> (var a1) (bv 32 0x8) false))) (cast 32 false (cast 8 false (>> (var a2) (bv 32 0x8) false))))) (* (cast 32 (msb (cast 8 false (>> (var a1) (bv 32 0x10) false))) (cast 8 false (>> (var a1) (bv 32 0x10) false))) (cast 32 false (cast 8 false (>> (var a2) (bv 32 0x10) false))))) (* (cast 32 (msb (cast 8 false (>> (var a1) (bv 32 0x18) false))) (cast 8 false (>> (var a1) (bv 32 0x18) false))) (cast 32 false (cast 8 false (>> (var a2) (bv 32 0x18) false))))))
d "dotprsu2 .m1 a0,a1,a2" 70030401 0x0 (set a2 (cast 32 false (>> (+ (+ (* (cast 64 (msb (cast 16 false (>> (var a0) (bv 32 0x10) false))) (cast 16 false (>> (var a0) (bv 32 0x10) false))) (cast 64 false (cast 16 false (>> (var a1) (bv 32 0x10) false)))) (* (cast 64 (msb (cast 16 false (var a0))) (cast 16 false (var a0))) (cast 64 false (cast 16 false (var a1))))) (bv 64 0x8000)) (bv 32 0x10) (msb (+ (+ (* (cast 64 (msb (cast 16 false (>> (var a0) (bv 32 0x10) false))) (cast 16 false (>> (var a0) (bv 32 0x10) false))) (cast 64 false (cast 16 false (>> (var a1) (bv 32 0x10) false)))) (* (cast 64 (msb (cast 16 false (var a0))) (cast 16 false (var a0))) (cast 64 false (cast 16 false (var a1))))) (bv 64 0x8000))))))
d "dotpnrsu2 .m1 a0,a1,a2" f0010401 0x0 (set a2 (cast 32 false (>> (+ (- (* (cast 64 (msb (cast 16 false (>> (var a0) (bv 32 0x10) false))) (cast 16 false (>> (var a0) (bv 32 0x10) false))) (cast 64 false (cast 16 false (>> (var a1) (bv 32 0x10) false)))) (* (cast 64 (msb (cast 16 false (var a0))) (cast 16 false (var a0))) (cast 64 false (cast 16 false (var a1))))) (bv 64 0x8000)) (bv 32 0x10) (msb (+ (- (* (cast 64 (msb (cast 16 false (>> (var a0) (bv 32 0x10) false))) (cast 16 false (>> (var a0) (bv 32 0x10) false))) (cast 64 false (cast 16 false (>> (var a1) (bv 32 0x10) false)))) (* (cast 64 (msb (cast 16 false (var a0))) (cast 16 false (var a0))) (cast 64 false (cast 16 false (var a1))))) (bv 64 0x8000))))))
d "cmpy .m1 a0,a1,a3:a2" b0020411 0x0 (seq (set _d (let _a (var a0) (let _b (var a1) (append (cast 32 false (- (* (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _a) (bv 32 0x10) false))) (cast 16 false (>> (var _a) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _a) (bv 32 0x10) false))) (cast 16 false (>> (var _a) (bv 32 0x10) false)))) (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _b) (bv 32 0x10) false))) (cast 16 false (>> (var _b) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _b) (bv 32 0x10) false))) (cast 16 false (>> (var _b) (bv 32 0x10) false))))) (* (cast 64 (msb (cast 32 (msb (cast 16 false (var _a))) (cast 16 false (var _a)))) (cast 32 (msb (cast 16 false (var _a))) (cast 16 false (var _a)))) (cast 64 (msb (cast 32 (msb (cast 16 false (var _b))) (cast 16 false (var _b)))) (cast 32 (msb (cast 16 false (var _b))) (cast 16 false (var _b))))))) (let _s (+ (* (cast 64 (msb (cast 32 (msb (cast 16 false (var _a))) (cast 16 false (var _a)))) (cast 32 (msb (cast 16 false (var _a))) (cast 16 false (var _a)))) (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _b) (bv 32 0x10) false))) (cast 16 false (>> (var _b) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _b) (bv 32 0x10) false))) (cast 16 false (>> (var _b) (bv 32 0x10) false))))) (* (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _a) (bv 32 0x10) false))) (cast 16 false (>> (var _a) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _a) (bv 32 0x10) false))) (cast 16 false (>> (var _a) (bv 32 0x10) false)))) (cast 64 (msb (cast 32 (msb (cast 16 false (var _b))) (cast 16 false (var _b)))) (cast 32 (msb (cast 16 false (var _b))) (cast 16 false (var _b)))))) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s))))))))) (set a2 (cast 32 false (var _d))) (set a3 (cast 32 false (>> (var _d) (bv 32 0x20) false))))
d "cmpyr .m1 a0,a1,a2" f0020411 0x0 (set a2 (let _a (var a0) (let _b (var a1) (append (cast 16 false (>> (let _s (+ (cast 64 (msb (let _s (- (* (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _a) (bv 32 0x10) false))) (cast 16 false (>> (var _a) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _a) (bv 32 0x10) false))) (cast 16 false (>> (var _a) (bv 32 0x10) false)))) (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _b) (bv 32 0x10) false))) (cast 16 false (>> (var _b) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _b) (bv 32 0x10) false))) (cast 16 false (>> (var _b) (bv 32 0x10) false))))) (* (cast 64 (msb (cast 32 (msb (cast 16 false (var _a))) (cast 16 false (var _a)))) (cast 32 (msb (cast 16 false (var _a))) (cast 16 false (var _a)))) (cast 64 (msb (cast 32 (msb (cast 16 false (var _b))) (cast 16 false (var _b)))) (cast 32 (msb (cast 16 false (var _b))) (cast 16 false (var _b)))))) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s)))))) (let _s (- (* (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _a) (bv 32 0x10) false))) (cast 16 false (>> (var _a) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _a) (bv 32 0x10) false))) (cast 16 false (>> (var _a) (bv 32 0x10) false)))) (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _b) (bv 32 0x10) false))) (cast 16 false (>> (var _b) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _b) (bv 32 0x10) false))) (cast 16 false (>> (var _b) (bv 32 0x10) false))))) (* (cast 64 (msb (cast 32 (msb (cast 16 false (var _a))) (cast 16 false (var _a)))) (cast 32 (msb (cast 16 false (var _a))) (cast 16 false (var _a)))) (cast 64 (msb (cast 32 (msb (cast 16 false (var _b))) (cast 16 false (var _b)))) (cast 32 (msb (cast 16 false (var _b))) (cast 16 false (var _b)))))) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s)))))) (bv 64 0x8000)) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s))))) (bv 32 0x10) false)) (cast 16 false (>> (let _s (+ (cast 64 (msb (let _s (+ (* (cast 64 (msb (cast 32 (msb (cast 16 false (var _a))) (cast 16 false (var _a)))) (cast 32 (msb (cast 16 false (var _a))) (cast 16 false (var _a)))) (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _b) (bv 32 0x10) false))) (cast 16 false (>> (var _b) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _b) (bv 32 0x10) false))) (cast 16 false (>> (var _b) (bv 32 0x10) false))))) (* (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _a) (bv 32 0x10) false))) (cast 16 false (>> (var _a) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _a) (bv 32 0x10) false))) (cast 16 false (>> (var _a) (bv 32 0x10) false)))) (cast 64 (msb (cast 32 (msb (cast 16 false (var _b))) (cast 16 false (var _b)))) (cast 32 (msb (cast 16 false (var _b))) (cast 16 false (var _b)))))) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s)))))) (let _s (+ (* (cast 64 (msb (cast 32 (msb (cast 16 false (var _a))) (cast 16 false (var _a)))) (cast 32 (msb (cast 16 false (var _a))) (cast 16 false (var _a)))) (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _b) (bv 32 0x10) false))) (cast 16 false (>> (var _b) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _b) (bv 32 0x10) false))) (cast 16 false (>> (var _b) (bv 32 0x10) false))))) (* (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _a) (bv 32 0x10) false))) (cast 16 false (>> (var _a) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _a) (bv 32 0x10) false))) (cast 16 false (>> (var _a) (bv 32 0x10) false)))) (cast 64 (msb (cast 32 (msb (cast 16 false (var _b))) (cast 16 false (var _b)))) (cast 32 (msb (cast 16 false (var _b))) (cast 16 false (var _b)))))) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s)))))) (bv 64 0x8000)) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s))))) (bv 32 0x10) false))))))
d "cmpyr1 .m1 a0,a1,a2" 30030411 0x0 (set a2 (let _a (var a0) (let _b (var a1) (append (cast 16 false (>> (let _s (<< (+ (cast 64 (msb (let _s (- (* (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _a) (bv 32 0x10) false))) (cast 16 false (>> (var _a) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _a) (bv 32 0x10) false))) (cast 16 false (>> (var _a) (bv 32 0x10) false)))) (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _b) (bv 32 0x10) false))) (cast 16 false (>> (var _b) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _b) (bv 32 0x10) false))) (cast 16 false (>> (var _b) (bv 32 0x10) false))))) (* (cast 64 (msb (cast 32 (msb (cast 16 false (var _a))) (cast 16 false (var _a)))) (cast 32 (msb (cast 16 false (var _a))) (cast 16 false (var _a)))) (cast 64 (msb (cast 32 (msb (cast 16 false (var _b))) (cast 16 false (var _b)))) (cast 32 (msb (cast 16 false (var _b))) (cast 16 false (var _b)))))) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s)))))) (let _s (- (* (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _a) (bv 32 0x10) false))) (cast 16 false (>> (var _a) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _a) (bv 32 0x10) false))) (cast 16 false (>> (var _a) (bv 32 0x10) false)))) (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _b) (bv 32 0x10) false))) (cast 16 false (>> (var _b) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _b) (bv 32 0x10) false))) (cast 16 false (>> (var _b) (bv 32 0x10) false))))) (* (cast 64 (msb (cast 32 (msb (cast 16 false (var _a))) (cast 16 false (var _a)))) (cast 32 (msb (cast 16 false (var _a))) (cast 16 false (var _a)))) (cast 64 (msb (cast 32 (msb (cast 16 false (var _b))) (cast 16 false (var _b)))) (cast 32 (msb (cast 16 false (var _b))) (cast 16 false (var _b)))))) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s)))))) (bv 64 0x4000)) (bv 32 0x1) false) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s))))) (bv 32 0x10) false)) (cast 16 false (>> (let _s (<< (+ (cast 64 (msb (let _s (+ (* (cast 64 (msb (cast 32 (msb (cast 16 false (var _a))) (cast 16 false (var _a)))) (cast 32 (msb (cast 16 false (var _a))) (cast 16 false (var _a)))) (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _b) (bv 32 0x10) false))) (cast 16 false (>> (var _b) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _b) (bv 32 0x10) false))) (cast 16 false (>> (var _b) (bv 32 0x10) false))))) (* (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _a) (bv 32 0x10) false))) (cast 16 false (>> (var _a) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _a) (bv 32 0x10) false))) (cast 16 false (>> (var _a) (bv 32 0x10) false)))) (cast 64 (msb (cast 32 (msb (cast 16 false (var _b))) (cast 16 false (var _b)))) (cast 32 (msb (cast 16 false (var _b))) (cast 16 false (var _b)))))) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s)))))) (let _s (+ (* (cast 64 (msb (cast 32 (msb (cast 16 false (var _a))) (cast 16 false (var _a)))) (cast 32 (msb (cast 16 false (var _a))) (cast 16 false (var _a)))) (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _b) (bv 32 0x10) false))) (cast 16 false (>> (var _b) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _b) (bv 32 0x10) false))) (cast 16 false (>> (var _b) (bv 32 0x10) false))))) (* (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _a) (bv 32 0x10) false))) (cast 16 false (>> (var _a) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _a) (bv 32 0x10) false))) (cast 16 false (>> (var _a) (bv 32 0x10) false)))) (cast 64 (msb (cast 32 (msb (cast 16 false (var _b))) (cast 16 false (var _b)))) (cast 32 (msb (cast 16 false (var _b))) (cast 16 false (var _b)))))) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s)))))) (bv 64 0x4000)) (bv 32 0x1) false) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s))))) (bv 32 0x10) false))))))
d "mpyu4 .m1 a0,a1,a3:a2" 30010401 0x0 (seq (set _d (append (* (cast 16 false (cast 8 false (>> (var a0) (bv 32 0x18) false))) (cast 16 false (cast 8 false (>> (var a1) (bv 32 0x18) false)))) (append (* (cast 16 false (cast 8 false (>> (var a0) (bv 32 0x10) false))) (cast 16 false (cast 8 false (>> (var a1) (bv 32 0x10) false)))) (append (* (cast 16 false (cast 8 false (>> (var a0) (bv 32 0x8) false))) (cast 16 false (cast 8 false (>> (var a1) (bv 32 0x8) false)))) (* (cast 16 false (cast 8 false (var a0))) (cast 16 false (cast 8 false (var a1)))))))) (set a2 (cast 32 false (var _d))) (set a3 (cast 32 false (>> (var _d) (bv 32 0x20) false))))
d "mpysu4 .m1 a0,a1,a5:a4" 70010402 0x0 (seq (set _d (append (* (cast 16 (msb (cast 8 false (>> (var a0) (bv 32 0x18) false))) (cast 8 false (>> (var a0) (bv 32 0x18) false))) (cast 16 false (cast 8 false (>> (var a1) (bv 32 0x18) false)))) (append (* (cast 16 (msb (cast 8 false (>> (var a0) (bv 32 0x10) false))) (cast 8 false (>> (var a0) (bv 32 0x10) false))) (cast 16 false (cast 8 false (>> (var a1) (bv 32 0x10) false)))) (append (* (cast 16 (msb (cast 8 false (>> (var a0) (bv 32 0x8) false))) (cast 8 false (>> (var a0) (bv 32 0x8) false))) (cast 16 false (cast 8 false (>> (var a1) (bv 32 0x8) false)))) (* (cast 16 (msb (cast 8 false (var a0))) (cast 8 false (var a0))) (cast 16 false (cast 8 false (var a1)))))))) (set a4 (cast 32 false (var _d))) (set a5 (cast 32 false (>> (var _d) (bv 32 0x20) false))))
# Packed compares to a bit-per-lane mask: CMPEQ2/CMPGT2 (signed halfwords),
# CMPEQ4/CMPGTU4 (bytes, unsigned for CMPGTU4); lane i sets bit i.
d "cmpeq2 .s1 a1,a2,a3" 60278801 0x0 (set a3 (cast 32 false (append (ite (== (cast 16 false (>> (var a1) (bv 32 0x10) false)) (cast 16 false (>> (var a2) (bv 32 0x10) false))) (bv 1 0x1) (bv 1 0x0)) (ite (== (cast 16 false (var a1)) (cast 16 false (var a2))) (bv 1 0x1) (bv 1 0x0)))))
d "cmpgt2 .s1 a1,a2,a3" 20258801 0x0 (set a3 (cast 32 false (append (ite (! (sle (cast 16 false (>> (var a1) (bv 32 0x10) false)) (cast 16 false (>> (var a2) (bv 32 0x10) false)))) (bv 1 0x1) (bv 1 0x0)) (ite (! (sle (cast 16 false (var a1)) (cast 16 false (var a2)))) (bv 1 0x1) (bv 1 0x0)))))
d "cmpeq4 .s1 a1,a2,a3" 20278801 0x0 (set a3 (cast 32 false (append (ite (== (cast 8 false (>> (var a1) (bv 32 0x18) false)) (cast 8 false (>> (var a2) (bv 32 0x18) false))) (bv 1 0x1) (bv 1 0x0)) (append (ite (== (cast 8 false (>> (var a1) (bv 32 0x10) false)) (cast 8 false (>> (var a2) (bv 32 0x10) false))) (bv 1 0x1) (bv 1 0x0)) (append (ite (== (cast 8 false (>> (var a1) (bv 32 0x8) false)) (cast 8 false (>> (var a2) (bv 32 0x8) false))) (bv 1 0x1) (bv 1 0x0)) (ite (== (cast 8 false (var a1)) (cast 8 false (var a2))) (bv 1 0x1) (bv 1 0x0)))))))
d "cmpgtu4 .s1 a1,a2,a3" 60258801 0x0 (set a3 (cast 32 false (append (ite (! (ule (cast 8 false (>> (var a1) (bv 32 0x18) false)) (cast 8 false (>> (var a2) (bv 32 0x18) false)))) (bv 1 0x1) (bv 1 0x0)) (append (ite (! (ule (cast 8 false (>> (var a1) (bv 32 0x10) false)) (cast 8 false (>> (var a2) (bv 32 0x10) false)))) (bv 1 0x1) (bv 1 0x0)) (append (ite (! (ule (cast 8 false (>> (var a1) (bv 32 0x8) false)) (cast 8 false (>> (var a2) (bv 32 0x8) false)))) (bv 1 0x1) (bv 1 0x0)) (ite (! (ule (cast 8 false (var a1)) (cast 8 false (var a2)))) (bv 1 0x1) (bv 1 0x0)))))))
# Single-precision float: ADDSP/SUBSP/MPYSP (IEEE-754 binary32, round to nearest
# even) and INTSP (signed int -> single).
d "addsp .l1 a1,a2,a3" 18228801 0x0 (set a3 (fbits (+. rne (float 0 (var a1) ) (float 0 (var a2) ))))
d "subsp .l1 a1,a2,a3" 38228801 0x0 (set a3 (fbits (-. rne (float 0 (var a1) ) (float 0 (var a2) ))))
d "mpysp .m1 a1,a2,a3" 002e8801 0x0 (set a3 (fbits (*. rne (float 0 (var a1) ) (float 0 (var a2) ))))
d "intsp .l1 a2,a3" 58098801 0x0 (set a3 (fbits (fcast_sfloat ieee754-bin32 rne (var a2))))
# Double-precision float over register pairs (IEEE-754 binary64): ADDDP/SUBDP/
# MPYDP, plus INTDP (int -> double) and SPDP (single -> double).
d "adddp .l1 a1:a0,a3:a2,a5:a4" 18030802 0x0 (seq (set _d (fbits (+. rne (float 1 (append (var a1) (var a0)) ) (float 1 (append (var a3) (var a2)) )))) (set a4 (cast 32 false (var _d))) (set a5 (cast 32 false (>> (var _d) (bv 32 0x20) false))))
d "subdp .l1 a1:a0,a3:a2,a5:a4" 38030802 0x0 (seq (set _d (fbits (-. rne (float 1 (append (var a1) (var a0)) ) (float 1 (append (var a3) (var a2)) )))) (set a4 (cast 32 false (var _d))) (set a5 (cast 32 false (>> (var _d) (bv 32 0x20) false))))
d "mpydp .m1 a1:a0,a3:a2,a5:a4" 00070802 0x0 (seq (set _d (fbits (*. rne (float 1 (append (var a1) (var a0)) ) (float 1 (append (var a3) (var a2)) )))) (set a4 (cast 32 false (var _d))) (set a5 (cast 32 false (>> (var _d) (bv 32 0x20) false))))
d "intdp .l1 a2,a5:a4" 38070802 0x0 (seq (set _d (fbits (fcast_sfloat ieee754-bin64 rne (var a2)))) (set a4 (cast 32 false (var _d))) (set a5 (cast 32 false (>> (var _d) (bv 32 0x20) false))))
d "spdp .s1 a2,a5:a4" a0000802 0x0 (seq (set _d (fbits (fconvert ieee754-bin64 rne (float 0 (var a2) )))) (set a4 (cast 32 false (var _d))) (set a5 (cast 32 false (>> (var _d) (bv 32 0x20) false))))
d "spint .l1 a2,a3" 58018801 0x0 (set a3 (fcast_sint 32 rne (float 0 (var a2) )))
# address arithmetic, saturating ALU, rotate, byte-merge, packed-shift, pack (RzIL)
d "addab .d1 a4,a5,a6" 40b81003 0x0 (set a6 (+ (var a4) (var a5)))
d "addah .d1 a4,a5,a6" 40ba1003 0x0 (set a6 (+ (var a4) (<< (var a5) (bv 32 0x1) false)))
d "addaw .d1 a4,a5,a6" 40bc1003 0x0 (set a6 (+ (var a4) (<< (var a5) (bv 32 0x2) false)))
d "subab .d1 a4,a5,a6" c0b81003 0x0 (set a6 (- (var a4) (var a5)))
d "subah .d1 a4,a5,a6" c0ba1003 0x0 (set a6 (- (var a4) (<< (var a5) (bv 32 0x1) false)))
d "subaw .d1 a4,a5,a6" c0bc1003 0x0 (set a6 (- (var a4) (<< (var a5) (bv 32 0x2) false)))
d "sadd .l1 a0,a1,a2" 78020401 0x0 (set a2 (let _s (+ (cast 64 (msb (var a0)) (var a0)) (cast 64 (msb (var a1)) (var a1))) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s))))))
d "ssub .l1 a0,a1,a2" f8010401 0x0 (set a2 (let _s (- (cast 64 (msb (var a0)) (var a0)) (cast 64 (msb (var a1)) (var a1))) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s))))))
d "sshl .s1 a0,a1,a2" e0280001 0x0 (set a2 (let _s (<< (cast 64 (msb (var a0)) (var a0)) (& (var a1) (bv 32 0x1f)) false) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s))))))
d "addad .d1 a4,a5,a6" 40be1003 0x0 (set a6 (+ (var a4) (<< (var a5) (bv 32 0x3) false)))
d "rotl .m1 a1,a0,a2" 70270001 0x0 (set a2 (let _rv (var a0) (let _rn (& (var a1) (bv 32 0x1f)) (| (<< (var _rv) (var _rn) false) (>> (var _rv) (- (bv 32 0x20) (var _rn)) false)))))
d "shlmb .s1 a0,a1,a2" 700e0401 0x0 (set a2 (| (<< (var a1) (bv 32 0x8) false) (& (>> (var a0) (bv 32 0x18) false) (bv 32 0xff))))
d "shrmb .s1 a0,a1,a2" b00e0401 0x0 (set a2 (| (>> (var a1) (bv 32 0x8) false) (<< (& (var a0) (bv 32 0xff)) (bv 32 0x18) false)))
d "shr2 .s1 a0,a1,a2" f02d0001 0x0 (set a2 (let _sv (var a0) (let _sn (cast 16 false (& (var a1) (bv 32 0xf))) (append (>> (cast 16 false (>> (var _sv) (bv 32 0x10) false)) (var _sn) (msb (cast 16 false (>> (var _sv) (bv 32 0x10) false)))) (>> (cast 16 false (var _sv)) (var _sn) (msb (cast 16 false (var _sv))))))))
d "shru2 .s1 a0,a1,a2" 302e0001 0x0 (set a2 (let _sv (var a0) (let _sn (cast 16 false (& (var a1) (bv 32 0xf))) (append (>> (cast 16 false (>> (var _sv) (bv 32 0x10) false)) (var _sn) false) (>> (cast 16 false (var _sv)) (var _sn) false)))))
d "swap4 .l1 a0,a2" 58230001 0x0 (set a2 (let _w4 (var a0) (| (<< (& (var _w4) (bv 32 0xff00ff)) (bv 32 0x8) false) (& (>> (var _w4) (bv 32 0x8) false) (bv 32 0xff00ff)))))
d "packl4 .l1 a0,a1,a2" 180d0401 0x0 (set a2 (let _q1 (var a0) (let _q2 (var a1) (| (| (<< (& (>> (var _q1) (bv 32 0x10) false) (bv 32 0xff)) (bv 32 0x18) false) (<< (& (>> (var _q1) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0x10) false)) (| (<< (& (>> (var _q2) (bv 32 0x10) false) (bv 32 0xff)) (bv 32 0x8) false) (& (>> (var _q2) (bv 32 0x0) false) (bv 32 0xff)))))))
d "packh4 .l1 a0,a1,a2" 380d0401 0x0 (set a2 (let _q1 (var a0) (let _q2 (var a1) (| (| (<< (& (>> (var _q1) (bv 32 0x18) false) (bv 32 0xff)) (bv 32 0x18) false) (<< (& (>> (var _q1) (bv 32 0x8) false) (bv 32 0xff)) (bv 32 0x10) false)) (| (<< (& (>> (var _q2) (bv 32 0x18) false) (bv 32 0xff)) (bv 32 0x8) false) (& (>> (var _q2) (bv 32 0x8) false) (bv 32 0xff)))))))
# bit-field set/clear and leftmost-bit/normalize (RzIL)
d "set .s1 a1,8,16,a2" 88100501 0x0 (set a2 (| (var a1) (bv 32 0x1ff00)))
d "clr .s1 a1,8,16,a2" c8100501 0x0 (set a2 (& (var a1) (bv 32 0xfffe00ff)))
d "lmbd .l1 a0,a1,a2" 780d0401 0x0 (seq (set _clzv (let _lm (var a1) (ite (is_zero (& (var a0) (bv 32 0x1))) (~ (var _lm)) (var _lm)))) (set _n (bv 32 0x0)) (repeat (&& (&& (ule (var _n) (bv 32 0x20)) (! (== (var _n) (bv 32 0x20)))) (! (msb (var _clzv)))) (seq (set _clzv (<< (var _clzv) (bv 32 0x1) false)) (set _n (+ (var _n) (bv 32 0x1))))) (set a2 (var _n)))
d "norm .l1 a1,a2" 780c0401 0x0 (seq (set _clzv (let _nm (var a1) (^ (var _nm) (>> (var _nm) (bv 32 0x1f) (msb (var _nm)))))) (set _n (bv 32 0x0)) (repeat (&& (&& (ule (var _n) (bv 32 0x20)) (! (== (var _n) (bv 32 0x20)))) (! (msb (var _clzv)))) (seq (set _clzv (<< (var _clzv) (bv 32 0x1) false)) (set _n (+ (var _n) (bv 32 0x1))))) (set a2 (- (var _n) (bv 32 0x1))))
# C64x+ bit reverse/count, deal/shuffle and expand-to-mask (RzIL)
d "bitr .m1 a1,a2" f0e00701 0x0 (set a2 (let _r0 (var a1) (let _r1 (| (<< (& (var _r0) (bv 32 0x55555555)) (bv 32 0x1) false) (& (>> (var _r0) (bv 32 0x1) false) (bv 32 0x55555555))) (let _r2 (| (<< (& (var _r1) (bv 32 0x33333333)) (bv 32 0x2) false) (& (>> (var _r1) (bv 32 0x2) false) (bv 32 0x33333333))) (let _r3 (| (<< (& (var _r2) (bv 32 0xf0f0f0f)) (bv 32 0x4) false) (& (>> (var _r2) (bv 32 0x4) false) (bv 32 0xf0f0f0f))) (let _r4 (| (<< (& (var _r3) (bv 32 0xff00ff)) (bv 32 0x8) false) (& (>> (var _r3) (bv 32 0x8) false) (bv 32 0xff00ff))) (| (<< (& (var _r4) (bv 32 0xffff)) (bv 32 0x10) false) (& (>> (var _r4) (bv 32 0x10) false) (bv 32 0xffff)))))))))
d "bitc4 .m1 a1,a2" f0c00701 0x0 (set a2 (let _b0 (var a1) (let _b1 (- (var _b0) (& (>> (var _b0) (bv 32 0x1) false) (bv 32 0x55555555))) (let _b2 (+ (& (var _b1) (bv 32 0x33333333)) (& (>> (var _b1) (bv 32 0x2) false) (bv 32 0x33333333))) (& (+ (var _b2) (>> (var _b2) (bv 32 0x4) false)) (bv 32 0xf0f0f0f))))))
d "xpnd2 .m1 a1,a2" f0200701 0x0 (set a2 (let _x (var a1) (| (<< (* (& (>> (var _x) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0xffff)) (bv 32 0x10) false) (* (& (var _x) (bv 32 0x1)) (bv 32 0xffff)))))
d "xpnd4 .m1 a1,a2" f0000701 0x0 (set a2 (let _x (var a1) (| (| (<< (* (& (>> (var _x) (bv 32 0x3) false) (bv 32 0x1)) (bv 32 0xff)) (bv 32 0x18) false) (<< (* (& (>> (var _x) (bv 32 0x2) false) (bv 32 0x1)) (bv 32 0xff)) (bv 32 0x10) false)) (| (<< (* (& (>> (var _x) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0xff)) (bv 32 0x8) false) (* (& (var _x) (bv 32 0x1)) (bv 32 0xff))))))
d "deal .m1 a1,a2" f0a00701 0x0 (set a2 (let _dx (var a1) (let _e0 (& (var _dx) (bv 32 0x55555555)) (let _e1 (& (| (var _e0) (>> (var _e0) (bv 32 0x1) false)) (bv 32 0x33333333)) (let _e2 (& (| (var _e1) (>> (var _e1) (bv 32 0x2) false)) (bv 32 0xf0f0f0f)) (let _e3 (& (| (var _e2) (>> (var _e2) (bv 32 0x4) false)) (bv 32 0xff00ff)) (let _elo (& (| (var _e3) (>> (var _e3) (bv 32 0x8) false)) (bv 32 0xffff)) (let _o0 (& (>> (var _dx) (bv 32 0x1) false) (bv 32 0x55555555)) (let _o1 (& (| (var _o0) (>> (var _o0) (bv 32 0x1) false)) (bv 32 0x33333333)) (let _o2 (& (| (var _o1) (>> (var _o1) (bv 32 0x2) false)) (bv 32 0xf0f0f0f)) (let _o3 (& (| (var _o2) (>> (var _o2) (bv 32 0x4) false)) (bv 32 0xff00ff)) (let _ohi (& (| (var _o3) (>> (var _o3) (bv 32 0x8) false)) (bv 32 0xffff)) (| (<< (var _ohi) (bv 32 0x10) false) (var _elo))))))))))))))
d "shfl .m1 a1,a2" f0800701 0x0 (set a2 (let _sx (var a1) (let _l0 (& (var _sx) (bv 32 0xffff)) (let _l1 (& (| (var _l0) (<< (var _l0) (bv 32 0x8) false)) (bv 32 0xff00ff)) (let _l2 (& (| (var _l1) (<< (var _l1) (bv 32 0x4) false)) (bv 32 0xf0f0f0f)) (let _l3 (& (| (var _l2) (<< (var _l2) (bv 32 0x2) false)) (bv 32 0x33333333)) (let _llo (& (| (var _l3) (<< (var _l3) (bv 32 0x1) false)) (bv 32 0x55555555)) (let _h0 (& (>> (var _sx) (bv 32 0x10) false) (bv 32 0xffff)) (let _h1 (& (| (var _h0) (<< (var _h0) (bv 32 0x8) false)) (bv 32 0xff00ff)) (let _h2 (& (| (var _h1) (<< (var _h1) (bv 32 0x4) false)) (bv 32 0xf0f0f0f)) (let _h3 (& (| (var _h2) (<< (var _h2) (bv 32 0x2) false)) (bv 32 0x33333333)) (let _hhi (& (| (var _h3) (<< (var _h3) (bv 32 0x1) false)) (bv 32 0x55555555)) (| (<< (var _hhi) (bv 32 0x1) false) (var _llo))))))))))))))
# subc, packed saturating add, reverse-pack, packed average, variable saturating shift
d "subc .l1 a0,a1,a2" 78090401 0x0 (set a2 (let _s1 (var a0) (let _df (- (var _s1) (var a1)) (ite (|| (! (sle (var _df) (bv 32 0x0))) (== (var _df) (bv 32 0x0))) (| (<< (var _df) (bv 32 0x1) false) (bv 32 0x1)) (<< (var _s1) (bv 32 0x1) false)))))
d "saddu4 .s1 a0,a1,a2" f00c0401 0x0 (set a2 (let _a (var a0) (let _b (var a1) (| (| (<< (ite (! (ule (+ (& (>> (var _a) (bv 32 0x18) false) (bv 32 0xff)) (& (>> (var _b) (bv 32 0x18) false) (bv 32 0xff))) (bv 32 0xff))) (bv 32 0xff) (+ (& (>> (var _a) (bv 32 0x18) false) (bv 32 0xff)) (& (>> (var _b) (bv 32 0x18) false) (bv 32 0xff)))) (bv 32 0x18) false) (<< (ite (! (ule (+ (& (>> (var _a) (bv 32 0x10) false) (bv 32 0xff)) (& (>> (var _b) (bv 32 0x10) false) (bv 32 0xff))) (bv 32 0xff))) (bv 32 0xff) (+ (& (>> (var _a) (bv 32 0x10) false) (bv 32 0xff)) (& (>> (var _b) (bv 32 0x10) false) (bv 32 0xff)))) (bv 32 0x10) false)) (| (<< (ite (! (ule (+ (& (>> (var _a) (bv 32 0x8) false) (bv 32 0xff)) (& (>> (var _b) (bv 32 0x8) false) (bv 32 0xff))) (bv 32 0xff))) (bv 32 0xff) (+ (& (>> (var _a) (bv 32 0x8) false) (bv 32 0xff)) (& (>> (var _b) (bv 32 0x8) false) (bv 32 0xff)))) (bv 32 0x8) false) (<< (ite (! (ule (+ (& (>> (var _a) (bv 32 0x0) false) (bv 32 0xff)) (& (>> (var _b) (bv 32 0x0) false) (bv 32 0xff))) (bv 32 0xff))) (bv 32 0xff) (+ (& (>> (var _a) (bv 32 0x0) false) (bv 32 0xff)) (& (>> (var _b) (bv 32 0x0) false) (bv 32 0xff)))) (bv 32 0x0) false))))))
d "rpack2 .s1 a0,a1,a2" f00e0411 0x0 (set a2 (| (<< (& (>> (let _s (<< (cast 64 (msb (var a0)) (var a0)) (bv 32 0x1) false) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s))))) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (& (>> (let _s (<< (cast 64 (msb (var a1)) (var a1)) (bv 32 0x1) false) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s))))) (bv 32 0x10) false) (bv 32 0xffff))))
d "avg2 .m1 a0,a1,a2" f0040401 0x0 (set a2 (let _a (var a0) (let _b (var a1) (| (<< (& (>> (+ (+ (cast 32 (msb (cast 16 false (>> (var _a) (bv 32 0x10) false))) (cast 16 false (>> (var _a) (bv 32 0x10) false))) (cast 32 (msb (cast 16 false (>> (var _b) (bv 32 0x10) false))) (cast 16 false (>> (var _b) (bv 32 0x10) false)))) (bv 32 0x1)) (bv 32 0x1) (msb (+ (+ (cast 32 (msb (cast 16 false (>> (var _a) (bv 32 0x10) false))) (cast 16 false (>> (var _a) (bv 32 0x10) false))) (cast 32 (msb (cast 16 false (>> (var _b) (bv 32 0x10) false))) (cast 16 false (>> (var _b) (bv 32 0x10) false)))) (bv 32 0x1)))) (bv 32 0xffff)) (bv 32 0x10) false) (& (>> (+ (+ (cast 32 (msb (cast 16 false (var _a))) (cast 16 false (var _a))) (cast 32 (msb (cast 16 false (var _b))) (cast 16 false (var _b)))) (bv 32 0x1)) (bv 32 0x1) (msb (+ (+ (cast 32 (msb (cast 16 false (var _a))) (cast 16 false (var _a))) (cast 32 (msb (cast 16 false (var _b))) (cast 16 false (var _b)))) (bv 32 0x1)))) (bv 32 0xffff))))))
d "avgu4 .m1 a0,a1,a2" b0040401 0x0 (set a2 (let _a (var a0) (let _b (var a1) (| (| (<< (& (>> (+ (+ (& (>> (var _a) (bv 32 0x18) false) (bv 32 0xff)) (& (>> (var _b) (bv 32 0x18) false) (bv 32 0xff))) (bv 32 0x1)) (bv 32 0x1) false) (bv 32 0xff)) (bv 32 0x18) false) (<< (& (>> (+ (+ (& (>> (var _a) (bv 32 0x10) false) (bv 32 0xff)) (& (>> (var _b) (bv 32 0x10) false) (bv 32 0xff))) (bv 32 0x1)) (bv 32 0x1) false) (bv 32 0xff)) (bv 32 0x10) false)) (| (<< (& (>> (+ (+ (& (>> (var _a) (bv 32 0x8) false) (bv 32 0xff)) (& (>> (var _b) (bv 32 0x8) false) (bv 32 0xff))) (bv 32 0x1)) (bv 32 0x1) false) (bv 32 0xff)) (bv 32 0x8) false) (<< (& (>> (+ (+ (& (>> (var _a) (bv 32 0x0) false) (bv 32 0xff)) (& (>> (var _b) (bv 32 0x0) false) (bv 32 0xff))) (bv 32 0x1)) (bv 32 0x1) false) (bv 32 0xff)) (bv 32 0x0) false))))))
d "saddus2 .s1 a0,a1,a2" 700c0401 0x0 (set a2 (| (<< (let _hi (+ (& (>> (var a0) (bv 32 0x10) false) (bv 32 0xffff)) (cast 32 (msb (cast 16 false (>> (var a1) (bv 32 0x10) false))) (cast 16 false (>> (var a1) (bv 32 0x10) false)))) (ite (&& (sle (var _hi) (bv 32 0x0)) (! (== (var _hi) (bv 32 0x0)))) (bv 32 0x0) (ite (! (sle (var _hi) (bv 32 0xffff))) (bv 32 0xffff) (var _hi)))) (bv 32 0x10) false) (let _lo (+ (& (var a0) (bv 32 0xffff)) (cast 32 (msb (cast 16 false (var a1))) (cast 16 false (var a1)))) (ite (&& (sle (var _lo) (bv 32 0x0)) (! (== (var _lo) (bv 32 0x0)))) (bv 32 0x0) (ite (! (sle (var _lo) (bv 32 0xffff))) (bv 32 0xffff) (var _lo))))))
d "sshvl .m1 a0,a1,a2" 30270001 0x0 (set a2 (let _v (var a0) (let _sc (var a1) (let _n (ite (! (sle (var _sc) (bv 32 0x1f))) (bv 32 0x1f) (ite (&& (sle (var _sc) (bv 32 0xffffffe1)) (! (== (var _sc) (bv 32 0xffffffe1)))) (bv 32 0xffffffe1) (var _sc))) (ite (|| (! (sle (var _n) (bv 32 0x0))) (== (var _n) (bv 32 0x0))) (let _s (<< (cast 64 (msb (var _v)) (var _v)) (var _n) false) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s))))) (>> (var _v) (~- (var _n)) (msb (var _v))))))))
d "sshvr .m1 a0,a1,a2" b0260001 0x0 (set a2 (let _v (var a0) (let _sc (var a1) (let _n (ite (! (sle (var _sc) (bv 32 0x1f))) (bv 32 0x1f) (ite (&& (sle (var _sc) (bv 32 0xffffffe1)) (! (== (var _sc) (bv 32 0xffffffe1)))) (bv 32 0xffffffe1) (var _sc))) (ite (|| (! (sle (var _n) (bv 32 0x0))) (== (var _n) (bv 32 0x0))) (>> (var _v) (var _n) (msb (var _v))) (let _s (<< (cast 64 (msb (var _v)) (var _v)) (~- (var _n)) false) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s))))))))))
# .L byte-merge shifts, NORM long, C64x+ packed multiply/pack (decode + RzIL)
d "shlmb .l1 a0,a1,a2" 380c0401 0x0 (set a2 (| (<< (var a1) (bv 32 0x8) false) (& (>> (var a0) (bv 32 0x18) false) (bv 32 0xff))))
d "shrmb .l1 a0,a1,a2" 580c0401 0x0 (set a2 (| (>> (var a1) (bv 32 0x8) false) (<< (& (var a0) (bv 32 0xff)) (bv 32 0x18) false)))
d "mpy2 .m1 a0,a1,a3:a2" 30000401 0x0 (seq (set _d (append (* (cast 32 (msb (cast 16 false (>> (var a0) (bv 32 0x10) false))) (cast 16 false (>> (var a0) (bv 32 0x10) false))) (cast 32 (msb (cast 16 false (>> (var a1) (bv 32 0x10) false))) (cast 16 false (>> (var a1) (bv 32 0x10) false)))) (* (cast 32 (msb (cast 16 false (var a0))) (cast 16 false (var a0))) (cast 32 (msb (cast 16 false (var a1))) (cast 16 false (var a1)))))) (set a2 (cast 32 false (var _d))) (set a3 (cast 32 false (>> (var _d) (bv 32 0x20) false))))
d "smpy2 .m1 a0,a1,a3:a2" 70000401 0x0 (seq (set _d (append (let _s (<< (cast 64 (msb (* (cast 32 (msb (cast 16 false (>> (var a0) (bv 32 0x10) false))) (cast 16 false (>> (var a0) (bv 32 0x10) false))) (cast 32 (msb (cast 16 false (>> (var a1) (bv 32 0x10) false))) (cast 16 false (>> (var a1) (bv 32 0x10) false))))) (* (cast 32 (msb (cast 16 false (>> (var a0) (bv 32 0x10) false))) (cast 16 false (>> (var a0) (bv 32 0x10) false))) (cast 32 (msb (cast 16 false (>> (var a1) (bv 32 0x10) false))) (cast 16 false (>> (var a1) (bv 32 0x10) false))))) (bv 32 0x1) false) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s))))) (let _s (<< (cast 64 (msb (* (cast 32 (msb (cast 16 false (var a0))) (cast 16 false (var a0))) (cast 32 (msb (cast 16 false (var a1))) (cast 16 false (var a1))))) (* (cast 32 (msb (cast 16 false (var a0))) (cast 16 false (var a0))) (cast 32 (msb (cast 16 false (var a1))) (cast 16 false (var a1))))) (bv 32 0x1) false) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s))))))) (set a2 (cast 32 false (var _d))) (set a3 (cast 32 false (>> (var _d) (bv 32 0x20) false))))
d "mpyhi .m1 a0,a1,a3:a2" 30050401 0x0 (seq (set _d (* (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var a0) (bv 32 0x10) false))) (cast 16 false (>> (var a0) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var a0) (bv 32 0x10) false))) (cast 16 false (>> (var a0) (bv 32 0x10) false)))) (cast 64 (msb (var a1)) (var a1)))) (set a2 (cast 32 false (var _d))) (set a3 (cast 32 false (>> (var _d) (bv 32 0x20) false))))
d "mpyli .m1 a0,a1,a3:a2" 70050401 0x0 (seq (set _d (* (cast 64 (msb (cast 32 (msb (cast 16 false (var a0))) (cast 16 false (var a0)))) (cast 32 (msb (cast 16 false (var a0))) (cast 16 false (var a0)))) (cast 64 (msb (var a1)) (var a1)))) (set a2 (cast 32 false (var _d))) (set a3 (cast 32 false (>> (var _d) (bv 32 0x20) false))))
d "mpyhir .m1 a0,a1,a2" 30040401 0x0 (set a2 (cast 32 false (>> (+ (* (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var a0) (bv 32 0x10) false))) (cast 16 false (>> (var a0) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var a0) (bv 32 0x10) false))) (cast 16 false (>> (var a0) (bv 32 0x10) false)))) (cast 64 (msb (var a1)) (var a1))) (bv 64 0x4000)) (bv 32 0xf) (msb (+ (* (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var a0) (bv 32 0x10) false))) (cast 16 false (>> (var a0) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var a0) (bv 32 0x10) false))) (cast 16 false (>> (var a0) (bv 32 0x10) false)))) (cast 64 (msb (var a1)) (var a1))) (bv 64 0x4000))))))
d "mpylir .m1 a0,a1,a2" b0030401 0x0 (set a2 (cast 32 false (>> (+ (* (cast 64 (msb (cast 32 (msb (cast 16 false (var a0))) (cast 16 false (var a0)))) (cast 32 (msb (cast 16 false (var a0))) (cast 16 false (var a0)))) (cast 64 (msb (var a1)) (var a1))) (bv 64 0x4000)) (bv 32 0xf) (msb (+ (* (cast 64 (msb (cast 32 (msb (cast 16 false (var a0))) (cast 16 false (var a0)))) (cast 32 (msb (cast 16 false (var a0))) (cast 16 false (var a0)))) (cast 64 (msb (var a1)) (var a1))) (bv 64 0x4000))))))
d "spacku4 .s1 a0,a1,a2" 300d0401 0x0 (set a2 (let _a (var a0) (let _b (var a1) (let _h3 (cast 32 (msb (cast 16 false (>> (var _a) (bv 32 0x10) false))) (cast 16 false (>> (var _a) (bv 32 0x10) false))) (let _h2 (cast 32 (msb (cast 16 false (var _a))) (cast 16 false (var _a))) (let _h1 (cast 32 (msb (cast 16 false (>> (var _b) (bv 32 0x10) false))) (cast 16 false (>> (var _b) (bv 32 0x10) false))) (let _h0 (cast 32 (msb (cast 16 false (var _b))) (cast 16 false (var _b))) (| (| (<< (ite (&& (sle (var _h3) (bv 32 0x0)) (! (== (var _h3) (bv 32 0x0)))) (bv 32 0x0) (ite (! (sle (var _h3) (bv 32 0xff))) (bv 32 0xff) (var _h3))) (bv 32 0x18) false) (<< (ite (&& (sle (var _h2) (bv 32 0x0)) (! (== (var _h2) (bv 32 0x0)))) (bv 32 0x0) (ite (! (sle (var _h2) (bv 32 0xff))) (bv 32 0xff) (var _h2))) (bv 32 0x10) false)) (| (<< (ite (&& (sle (var _h1) (bv 32 0x0)) (! (== (var _h1) (bv 32 0x0)))) (bv 32 0x0) (ite (! (sle (var _h1) (bv 32 0xff))) (bv 32 0xff) (var _h1))) (bv 32 0x8) false) (ite (&& (sle (var _h0) (bv 32 0x0)) (! (== (var _h0) (bv 32 0x0)))) (bv 32 0x0) (ite (! (sle (var _h0) (bv 32 0xff))) (bv 32 0xff) (var _h0))))))))))))
d "norm .l1 a1:a0,a2" 180c0001 0x0 (seq (set _clzv (let _nl (>> (<< (append (var a1) (var a0)) (bv 32 0x18) false) (bv 32 0x18) (msb (<< (append (var a1) (var a0)) (bv 32 0x18) false))) (^ (var _nl) (>> (var _nl) (bv 32 0x3f) (msb (var _nl)))))) (set _n (bv 32 0x0)) (repeat (&& (&& (ule (var _n) (bv 32 0x40)) (! (== (var _n) (bv 32 0x40)))) (! (msb (var _clzv)))) (seq (set _clzv (<< (var _clzv) (bv 64 0x1) false)) (set _n (+ (var _n) (bv 32 0x1))))) (set a2 (- (var _n) (bv 32 0x19))))
# 40-bit long ABS/SAT decode, single/double float abs (RzIL)
d "abs .l1 a1:a0,a3:a2" 18070001 0x0 (seq (set _d (let _a (>> (<< (append (var a1) (var a0)) (bv 32 0x18) false) (bv 32 0x18) (msb (<< (append (var a1) (var a0)) (bv 32 0x18) false))) (ite (|| (! (sle (var _a) (bv 64 0x0))) (== (var _a) (bv 64 0x0))) (var _a) (ite (== (var _a) (bv 64 0xffffff8000000000)) (bv 64 0x7fffffffff) (~- (var _a)))))) (set a2 (cast 32 false (var _d))) (set a3 (cast 32 false (>> (var _d) (bv 32 0x20) false))))
d "sat .l1 a1:a0,a2" 18080001 0x0 (set a2 (let _s (>> (<< (append (var a1) (var a0)) (bv 32 0x18) false) (bv 32 0x18) (msb (<< (append (var a1) (var a0)) (bv 32 0x18) false))) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s))))))
d "abssp .s1 a0,a2" 200f0001 0x0 (set a2 (& (var a0) (bv 32 0x7fffffff)))
d "absdp .s1 a1:a0,a3:a2" 200b0401 0x0 (seq (set _d (& (append (var a1) (var a0)) (bv 64 0x7fffffffffffffff))) (set a2 (cast 32 false (var _d))) (set a3 (cast 32 false (>> (var _d) (bv 32 0x20) false))))
# single/double float equality and SPxSP->DP multiply (decode + RzIL)
d "cmpeqsp .s1 a0,a1,a2" 200e0401 0x0 (set a2 (ite (! (|| (|| (is_nan (float 0 (var a0) )) (is_nan (float 0 (var a1) ))) (|| (<. (float 0 (var a0) ) (float 0 (var a1) )) (<. (float 0 (var a1) ) (float 0 (var a0) ))))) (bv 32 0x1) (bv 32 0x0)))
d "cmpeqdp .s1 a1:a0,a3:a2,a4" 200a0802 0x0 (set a4 (ite (! (|| (|| (is_nan (float 1 (append (var a1) (var a0)) )) (is_nan (float 1 (append (var a3) (var a2)) ))) (|| (<. (float 1 (append (var a1) (var a0)) ) (float 1 (append (var a3) (var a2)) )) (<. (float 1 (append (var a3) (var a2)) ) (float 1 (append (var a1) (var a0)) ))))) (bv 32 0x1) (bv 32 0x0)))
d "mpysp2dp .m1 a0,a1,a3:a2" f0050401 0x0 (seq (set _d (fbits (*. rne (fconvert ieee754-bin64 rne (float 0 (var a0) )) (fconvert ieee754-bin64 rne (float 0 (var a1) ))))) (set a2 (cast 32 false (var _d))) (set a3 (cast 32 false (>> (var _d) (bv 32 0x20) false))))
# double-precision -> int/single conversions (decode + RzIL; encoded per SPRUFE8, not disassembled by dis6x)
d "dpint .l1 a1:a0,a2" 18010401 0x0 (set a2 (fcast_sint 32 rne (float 1 (append (var a1) (var a0)) )))
d "dpsp .l1 a1:a0,a2" 38010401 0x0 (set a2 (fbits (fconvert ieee754-bin32 rne (float 1 (append (var a1) (var a0)) ))))
d "dptrunc .l1 a1:a0,a2" 38000401 0x0 (set a2 (fcast_sint 32 rtz (float 1 (append (var a1) (var a0)) )))
d "ddotpl2 .m1 a1:a0,a2,a5:a4" b0050812 0x0 (seq (set _d (let _e (var a0) (let _o (var a1) (let _c (var a2) (append (let _s (+ (* (cast 64 (msb (cast 32 (msb (cast 16 false (var _o))) (cast 16 false (var _o)))) (cast 32 (msb (cast 16 false (var _o))) (cast 16 false (var _o)))) (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _c) (bv 32 0x10) false))) (cast 16 false (>> (var _c) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _c) (bv 32 0x10) false))) (cast 16 false (>> (var _c) (bv 32 0x10) false))))) (* (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _e) (bv 32 0x10) false))) (cast 16 false (>> (var _e) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _e) (bv 32 0x10) false))) (cast 16 false (>> (var _e) (bv 32 0x10) false)))) (cast 64 (msb (cast 32 (msb (cast 16 false (var _c))) (cast 16 false (var _c)))) (cast 32 (msb (cast 16 false (var _c))) (cast 16 false (var _c)))))) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s))))) (let _s (+ (* (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _e) (bv 32 0x10) false))) (cast 16 false (>> (var _e) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _e) (bv 32 0x10) false))) (cast 16 false (>> (var _e) (bv 32 0x10) false)))) (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _c) (bv 32 0x10) false))) (cast 16 false (>> (var _c) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _c) (bv 32 0x10) false))) (cast 16 false (>> (var _c) (bv 32 0x10) false))))) (* (cast 64 (msb (cast 32 (msb (cast 16 false (var _e))) (cast 16 false (var _e)))) (cast 32 (msb (cast 16 false (var _e))) (cast 16 false (var _e)))) (cast 64 (msb (cast 32 (msb (cast 16 false (var _c))) (cast 16 false (var _c)))) (cast 32 (msb (cast 16 false (var _c))) (cast 16 false (var _c)))))) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s)))))))))) (set a4 (cast 32 false (var _d))) (set a5 (cast 32 false (>> (var _d) (bv 32 0x20) false))))
d "ddotph2 .m1 a5:a4,a6,a9:a8" f0851814 0x0 (seq (set _d (let _e (var a4) (let _o (var a5) (let _c (var a6) (append (let _s (+ (* (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _o) (bv 32 0x10) false))) (cast 16 false (>> (var _o) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _o) (bv 32 0x10) false))) (cast 16 false (>> (var _o) (bv 32 0x10) false)))) (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _c) (bv 32 0x10) false))) (cast 16 false (>> (var _c) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _c) (bv 32 0x10) false))) (cast 16 false (>> (var _c) (bv 32 0x10) false))))) (* (cast 64 (msb (cast 32 (msb (cast 16 false (var _o))) (cast 16 false (var _o)))) (cast 32 (msb (cast 16 false (var _o))) (cast 16 false (var _o)))) (cast 64 (msb (cast 32 (msb (cast 16 false (var _c))) (cast 16 false (var _c)))) (cast 32 (msb (cast 16 false (var _c))) (cast 16 false (var _c)))))) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s))))) (let _s (+ (* (cast 64 (msb (cast 32 (msb (cast 16 false (var _o))) (cast 16 false (var _o)))) (cast 32 (msb (cast 16 false (var _o))) (cast 16 false (var _o)))) (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _c) (bv 32 0x10) false))) (cast 16 false (>> (var _c) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _c) (bv 32 0x10) false))) (cast 16 false (>> (var _c) (bv 32 0x10) false))))) (* (cast 64 (msb (cast 32 (msb (cast 16 false (>> (var _e) (bv 32 0x10) false))) (cast 16 false (>> (var _e) (bv 32 0x10) false)))) (cast 32 (msb (cast 16 false (>> (var _e) (bv 32 0x10) false))) (cast 16 false (>> (var _e) (bv 32 0x10) false)))) (cast 64 (msb (cast 32 (msb (cast 16 false (var _c))) (cast 16 false (var _c)))) (cast 32 (msb (cast 16 false (var _c))) (cast 16 false (var _c)))))) (ite (! (sle (var _s) (bv 64 0x7fffffff))) (bv 32 0x7fffffff) (ite (&& (sle (var _s) (bv 64 0xffffffff80000000)) (! (== (var _s) (bv 64 0xffffffff80000000)))) (bv 32 0x80000000) (cast 32 false (var _s)))))))))) (set a8 (cast 32 false (var _d))) (set a9 (cast 32 false (>> (var _d) (bv 32 0x20) false))))

d "zero .l1 a3" f8008001 0x0
d "zero .l1 a7:a6" f8040003 0x0
d "not .s1 a3,a3" a0e28f01 0x0
d "sub .l1x b4,0x6,a1" 58509300 0x0
d "cmpgtu .l1 a5,a7:a6,a1" b8a99800 0x0
d "spint .l1 a2,a3" 58018801 0x0
# Software-pipelined loop buffer and unsigned int/float conversions, all
# cross-checked against TI dis6x (c6000 v7.4.4) and found in real C674x firmware.
d "sploop 1" 00800300 0x0
d "sploopd 1" 00a00300 0x0
d "sploopw 1" 00e00300 0x0
d "[a0] sploopw 6" 00e083c2 0x0
d "spkernel 0" 01400300 0x0
d "spkernel 40" 0140030a 0x0
d "spmask s1" 01001300 0x0
d "spmask l1,s2" 00002700 0x0
d "spmask m2" 00000302 0x0
d "intdpu .l1 a3,a5:a4" 78070c02 0x0
d "intspu .l1 a6,a4" 39091802 0x0
d "mpy .m2 0xc,b4,b4" 028c1102 0x0
d "[!a0] subah .d1 a11,0x15,a3" c0bbaed1 0x0
# .D address arithmetic with a 15-bit constant reuses the byte/halfword/word
# store slots; without the creg=0/z=1 marker these stay stores. Cross-checked
# against TI dis6x and found mis-decoded as stb/sth on real C674x firmware.
d "addab .d2 b15,17,b4" be110012 0x0
d "addah .d1x b15,127,a4" dd7f0012 0x0

# Unsigned subtract widening into a register pair: both sources stay single and
# the cross path feeds src1. Found on real C674x firmware, matched to TI dis6x.
d "subu .l2x a3,b6,b7:b6" fb771803 0x0

# A word whose top nibble is the fetch-packet header tag is only a header when
# it sits at packet offset 0x1c. rz-asm decodes at pc 0, so this one is an
# ordinary instruction; emitting a .fphead here put packet metadata in the
# middle of code (#6751).
d "ldh .d1 *+a14[0x10],b21" 4602baea 0x0
