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Rename VecPolyMultiplyLE to VecIntelMultiply (PR #908)
The LE multiplies are compatible with Intel's _mm_clmulepi64_si128
This commit is contained in:
Jeffrey Walton
GitHub
parent
fa39314b7a
commit
183fba44bf
38
gcm_simd.cpp
38
gcm_simd.cpp
@ -190,8 +190,8 @@ bool CPU_ProbePMULL()
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0xe0,0xe0,0xe0,0xe0,0xe0,0xe0,0xe0,0xe0};
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const uint32x4_p a2=VecLoad(wa2), b2=VecLoad(wb2);
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const uint64x2_p r1 = VecPolyMultiply00LE(a1, b1);
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const uint64x2_p r2 = VecPolyMultiply11LE((uint64x2_p)a2, (uint64x2_p)b2);
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const uint64x2_p r1 = VecIntelMultiply00(a1, b1);
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const uint64x2_p r2 = VecIntelMultiply11((uint64x2_p)a2, (uint64x2_p)b2);
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const uint64_t wc1[]={W64LIT(0x5300530053005300), W64LIT(0x5300530053005300)},
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wc2[]={W64LIT(0x6c006c006c006c00), W64LIT(0x6c006c006c006c00)};
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@ -575,9 +575,9 @@ uint64x2_p GCM_Reduce_VMULL(uint64x2_p c0, uint64x2_p c1, uint64x2_p c2, uint64x
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const uint64x2_p m1 = {1,1}, m63 = {63,63};
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c1 = VecXor(c1, VecShiftRightOctet<8>(c0));
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c1 = VecXor(c1, VecPolyMultiply10LE(c0, r));
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c1 = VecXor(c1, VecIntelMultiply10(c0, r));
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c0 = VecXor(c1, VecShiftLeftOctet<8>(c0));
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c0 = VecPolyMultiply00LE(vec_sl(c0, m1), r);
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c0 = VecIntelMultiply00(vec_sl(c0, m1), r);
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c2 = VecXor(c2, c0);
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c2 = VecXor(c2, VecShiftLeftOctet<8>(c1));
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c1 = vec_sr(vec_mergeh(c1, c2), m63);
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@ -588,9 +588,9 @@ uint64x2_p GCM_Reduce_VMULL(uint64x2_p c0, uint64x2_p c1, uint64x2_p c2, uint64x
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inline uint64x2_p GCM_Multiply_VMULL(uint64x2_p x, uint64x2_p h, uint64x2_p r)
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{
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const uint64x2_p c0 = VecPolyMultiply00LE(x, h);
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const uint64x2_p c1 = VecXor(VecPolyMultiply01LE(x, h), VecPolyMultiply10LE(x, h));
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const uint64x2_p c2 = VecPolyMultiply11LE(x, h);
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const uint64x2_p c0 = VecIntelMultiply00(x, h);
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const uint64x2_p c1 = VecXor(VecIntelMultiply01(x, h), VecIntelMultiply10(x, h));
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const uint64x2_p c2 = VecIntelMultiply11(x, h);
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return GCM_Reduce_VMULL(c0, c1, c2, r);
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}
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@ -685,35 +685,35 @@ size_t GCM_AuthenticateBlocks_VMULL(const byte *data, size_t len, const byte *mt
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{
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d1 = LoadBuffer2(data);
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d1 = VecXor(d1, x);
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c0 = VecXor(c0, VecPolyMultiply00LE(d1, h0));
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c2 = VecXor(c2, VecPolyMultiply01LE(d1, h1));
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c0 = VecXor(c0, VecIntelMultiply00(d1, h0));
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c2 = VecXor(c2, VecIntelMultiply01(d1, h1));
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d1 = VecXor(d1, SwapWords(d1));
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c1 = VecXor(c1, VecPolyMultiply00LE(d1, h2));
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c1 = VecXor(c1, VecIntelMultiply00(d1, h2));
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break;
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}
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d1 = LoadBuffer1(data+(s-i)*16-8);
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c0 = VecXor(c0, VecPolyMultiply01LE(d2, h0));
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c2 = VecXor(c2, VecPolyMultiply01LE(d1, h1));
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c0 = VecXor(c0, VecIntelMultiply01(d2, h0));
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c2 = VecXor(c2, VecIntelMultiply01(d1, h1));
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d2 = VecXor(d2, d1);
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c1 = VecXor(c1, VecPolyMultiply01LE(d2, h2));
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c1 = VecXor(c1, VecIntelMultiply01(d2, h2));
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if (++i == s)
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{
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d1 = LoadBuffer2(data);
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d1 = VecXor(d1, x);
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c0 = VecXor(c0, VecPolyMultiply10LE(d1, h0));
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c2 = VecXor(c2, VecPolyMultiply11LE(d1, h1));
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c0 = VecXor(c0, VecIntelMultiply10(d1, h0));
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c2 = VecXor(c2, VecIntelMultiply11(d1, h1));
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d1 = VecXor(d1, SwapWords(d1));
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c1 = VecXor(c1, VecPolyMultiply10LE(d1, h2));
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c1 = VecXor(c1, VecIntelMultiply10(d1, h2));
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break;
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}
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d2 = LoadBuffer2(data+(s-i)*16-8);
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c0 = VecXor(c0, VecPolyMultiply10LE(d1, h0));
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c2 = VecXor(c2, VecPolyMultiply10LE(d2, h1));
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c0 = VecXor(c0, VecIntelMultiply10(d1, h0));
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c2 = VecXor(c2, VecIntelMultiply10(d2, h1));
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d1 = VecXor(d1, d2);
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c1 = VecXor(c1, VecPolyMultiply10LE(d1, h2));
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c1 = VecXor(c1, VecIntelMultiply10(d1, h2));
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}
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data += s*16;
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len -= s*16;
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@ -325,8 +325,8 @@ using CryptoPP::VecMergeHigh;
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using CryptoPP::VecShiftLeft;
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using CryptoPP::VecShiftRight;
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using CryptoPP::VecPolyMultiply00LE;
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using CryptoPP::VecPolyMultiply11LE;
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using CryptoPP::VecIntelMultiply00;
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using CryptoPP::VecIntelMultiply11;
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// c1c0 = a * b
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inline void
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@ -335,13 +335,13 @@ F2N_Multiply_128x128_POWER8(uint64x2_p& c1, uint64x2_p& c0, const uint64x2_p& a,
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uint64x2_p t1, t2;
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const uint64x2_p z0={0};
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c0 = VecPolyMultiply00LE(a, b);
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c1 = VecPolyMultiply11LE(a, b);
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c0 = VecIntelMultiply00(a, b);
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c1 = VecIntelMultiply11(a, b);
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t1 = VecMergeLow(a, a);
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t1 = VecXor(a, t1);
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t2 = VecMergeLow(b, b);
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t2 = VecXor(b, t2);
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t1 = VecPolyMultiply00LE(t1, t2);
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t1 = VecIntelMultiply00(t1, t2);
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t1 = VecXor(c0, t1);
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t1 = VecXor(c1, t1);
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t2 = t1;
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@ -380,10 +380,10 @@ inline void
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F2N_Square_256_POWER8(uint64x2_p& c3, uint64x2_p& c2, uint64x2_p& c1,
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uint64x2_p& c0, const uint64x2_p& a1, const uint64x2_p& a0)
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{
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c0 = VecPolyMultiply00LE(a0, a0);
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c1 = VecPolyMultiply11LE(a0, a0);
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c2 = VecPolyMultiply00LE(a1, a1);
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c3 = VecPolyMultiply11LE(a1, a1);
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c0 = VecIntelMultiply00(a0, a0);
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c1 = VecIntelMultiply11(a0, a0);
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c2 = VecIntelMultiply00(a1, a1);
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c3 = VecIntelMultiply11(a1, a1);
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}
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// x = (x << n), z = 0
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@ -73,7 +73,7 @@ bool CPU_ProbePower7()
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result = (0 == std::memcmp(b1+3, b2+1, 16));
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#else
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result = false;
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#endif
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#endif
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}
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sigprocmask(SIG_SETMASK, (sigset_t*)&oldMask, NULLPTR);
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16
ppc_simd.h
16
ppc_simd.h
@ -1437,7 +1437,7 @@ inline uint64x2_p VecPolyMultiply(const uint64x2_p& a, const uint64x2_p& b)
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/// \param a the first term
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/// \param b the second term
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/// \returns vector product
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/// \details VecPolyMultiply00LE() performs polynomial multiplication and presents
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/// \details VecIntelMultiply00() performs polynomial multiplication and presents
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/// the result like Intel's <tt>c = _mm_clmulepi64_si128(a, b, 0x00)</tt>.
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/// The <tt>0x00</tt> indicates the low 64-bits of <tt>a</tt> and <tt>b</tt>
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/// are multiplied.
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@ -1446,7 +1446,7 @@ inline uint64x2_p VecPolyMultiply(const uint64x2_p& a, const uint64x2_p& b)
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/// \par Wraps
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/// __vpmsumd, __builtin_altivec_crypto_vpmsumd and __builtin_crypto_vpmsumd.
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/// \since Crypto++ 8.0
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inline uint64x2_p VecPolyMultiply00LE(const uint64x2_p& a, const uint64x2_p& b)
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inline uint64x2_p VecIntelMultiply00(const uint64x2_p& a, const uint64x2_p& b)
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{
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#if (CRYPTOPP_BIG_ENDIAN)
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return VecSwapWords(VecPolyMultiply(VecGetHigh(a), VecGetHigh(b)));
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@ -1459,7 +1459,7 @@ inline uint64x2_p VecPolyMultiply00LE(const uint64x2_p& a, const uint64x2_p& b)
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/// \param a the first term
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/// \param b the second term
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/// \returns vector product
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/// \details VecPolyMultiply01LE performs() polynomial multiplication and presents
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/// \details VecIntelMultiply01 performs() polynomial multiplication and presents
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/// the result like Intel's <tt>c = _mm_clmulepi64_si128(a, b, 0x01)</tt>.
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/// The <tt>0x01</tt> indicates the low 64-bits of <tt>a</tt> and high
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/// 64-bits of <tt>b</tt> are multiplied.
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@ -1468,7 +1468,7 @@ inline uint64x2_p VecPolyMultiply00LE(const uint64x2_p& a, const uint64x2_p& b)
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/// \par Wraps
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/// __vpmsumd, __builtin_altivec_crypto_vpmsumd and __builtin_crypto_vpmsumd.
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/// \since Crypto++ 8.0
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inline uint64x2_p VecPolyMultiply01LE(const uint64x2_p& a, const uint64x2_p& b)
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inline uint64x2_p VecIntelMultiply01(const uint64x2_p& a, const uint64x2_p& b)
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{
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#if (CRYPTOPP_BIG_ENDIAN)
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return VecSwapWords(VecPolyMultiply(a, VecGetHigh(b)));
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@ -1481,7 +1481,7 @@ inline uint64x2_p VecPolyMultiply01LE(const uint64x2_p& a, const uint64x2_p& b)
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/// \param a the first term
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/// \param b the second term
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/// \returns vector product
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/// \details VecPolyMultiply10LE() performs polynomial multiplication and presents
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/// \details VecIntelMultiply10() performs polynomial multiplication and presents
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/// the result like Intel's <tt>c = _mm_clmulepi64_si128(a, b, 0x10)</tt>.
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/// The <tt>0x10</tt> indicates the high 64-bits of <tt>a</tt> and low
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/// 64-bits of <tt>b</tt> are multiplied.
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@ -1490,7 +1490,7 @@ inline uint64x2_p VecPolyMultiply01LE(const uint64x2_p& a, const uint64x2_p& b)
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/// \par Wraps
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/// __vpmsumd, __builtin_altivec_crypto_vpmsumd and __builtin_crypto_vpmsumd.
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/// \since Crypto++ 8.0
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inline uint64x2_p VecPolyMultiply10LE(const uint64x2_p& a, const uint64x2_p& b)
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inline uint64x2_p VecIntelMultiply10(const uint64x2_p& a, const uint64x2_p& b)
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{
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#if (CRYPTOPP_BIG_ENDIAN)
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return VecSwapWords(VecPolyMultiply(VecGetHigh(a), b));
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@ -1503,7 +1503,7 @@ inline uint64x2_p VecPolyMultiply10LE(const uint64x2_p& a, const uint64x2_p& b)
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/// \param a the first term
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/// \param b the second term
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/// \returns vector product
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/// \details VecPolyMultiply11LE() performs polynomial multiplication and presents
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/// \details VecIntelMultiply11() performs polynomial multiplication and presents
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/// the result like Intel's <tt>c = _mm_clmulepi64_si128(a, b, 0x11)</tt>.
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/// The <tt>0x11</tt> indicates the high 64-bits of <tt>a</tt> and <tt>b</tt>
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/// are multiplied.
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@ -1512,7 +1512,7 @@ inline uint64x2_p VecPolyMultiply10LE(const uint64x2_p& a, const uint64x2_p& b)
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/// \par Wraps
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/// __vpmsumd, __builtin_altivec_crypto_vpmsumd and __builtin_crypto_vpmsumd.
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/// \since Crypto++ 8.0
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inline uint64x2_p VecPolyMultiply11LE(const uint64x2_p& a, const uint64x2_p& b)
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inline uint64x2_p VecIntelMultiply11(const uint64x2_p& a, const uint64x2_p& b)
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{
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#if (CRYPTOPP_BIG_ENDIAN)
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return VecSwapWords(VecPolyMultiply(VecGetLow(a), b));
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