mirror of
https://github.com/shadps4-emu/ext-cryptopp.git
synced 2024-11-23 01:49:41 +00:00
Remove ARIA SIMD code (GH #1235)
ARIA SIMD code existed to perform an XOR and the end of encryption and decryption. It was a lot of work to save for the final XOR. Worse, the final XOR seemed to be causing problems as described in GH #1235. Once we unrolled the XOR and used them when building outBlock, the 1235 issue went away.
This commit is contained in:
parent
8d3e357c9c
commit
5250ab2bf2
@ -17,7 +17,6 @@ arc4.cpp
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arc4.h
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ariatab.cpp
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aria.cpp
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aria_simd.cpp
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aria.h
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argnames.h
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arm_simd.h
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@ -1635,10 +1635,6 @@ NOSTD_CXXFLAGS=$(filter-out -stdlib=%,$(filter-out -std=%,$(CXXFLAGS)))
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aes_armv4.o : aes_armv4.S
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$(CXX) $(strip $(CPPFLAGS) $(ASFLAGS) $(NOSTD_CXXFLAGS) $(CRYPTOGAMS_ARM_THUMB_FLAG) -c) $<
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# SSSE3 or NEON available
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aria_simd.o : aria_simd.cpp
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$(CXX) $(strip $(CPPFLAGS) $(CXXFLAGS) $(ARIA_FLAG) -c) $<
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# SSE, NEON or POWER7 available
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blake2s_simd.o : blake2s_simd.cpp
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$(CXX) $(strip $(CPPFLAGS) $(CXXFLAGS) $(BLAKE2S_FLAG) -c) $<
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@ -975,10 +975,6 @@ aes_armv4.o : aes_armv4.S
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cpu-features.o: cpu-features.h cpu-features.c
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$(CXX) -x c $(strip $(CPPFLAGS) $(NOSTD_CXXFLAGS) -c) cpu-features.c
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# SSSE3 or NEON available
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aria_simd.o : aria_simd.cpp
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$(CXX) $(strip $(CPPFLAGS) $(CXXFLAGS) $(ARIA_FLAG) -c) $<
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# SSE, NEON or POWER7 available
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blake2s_simd.o : blake2s_simd.cpp
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$(CXX) $(strip $(CPPFLAGS) $(CXXFLAGS) $(BLAKE2S_FLAG) -c) $<
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@ -120,7 +120,7 @@ do
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# In the past we looked for the vector loads, stores and shifts using vld and friends.
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# It looks like objdump changed its output format on Android after Clang, so we need
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# to check for statements like eor v0.16b, v2.16b, v0.16b nowadays.
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count=$(${OBJDUMP} --disassemble aria_simd.o 2>&1 | grep -c -E 'vld|vst|vshl|vshr|veor|v0\.|v1\.|v2\.|v3\.|v4\.|v5\.|v6\.|v7\.')
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count=$(${OBJDUMP} --disassemble chacha_simd.o 2>&1 | grep -c -E 'vld|vst|vshl|vshr|veor|v0\.|v1\.|v2\.|v3\.|v4\.|v5\.|v6\.|v7\.')
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if [[ "${count}" -gt 64 ]]
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then
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echo "${platform} : NEON ==> SUCCESS" >> "${TMPDIR}/build.log"
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@ -136,7 +136,7 @@ do
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# In the past we looked for the vector loads, stores and shifts using vld and friends.
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# It looks like objdump changed its output format on Android after Clang, so we need
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# to check for statements like eor v0.16b, v2.16b, v0.16b nowadays.
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count=$(${OBJDUMP} --disassemble aria_simd.o 2>&1 | grep -c -E 'vld|vst|vshl|vshr|veor|v0\.|v1\.|v2\.|v3\.|v4\.|v5\.|v6\.|v7\.')
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count=$(${OBJDUMP} --disassemble chacha_simd.o 2>&1 | grep -c -E 'vld|vst|vshl|vshr|veor|v0\.|v1\.|v2\.|v3\.|v4\.|v5\.|v6\.|v7\.')
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if [[ "${count}" -gt 64 ]]
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then
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echo "${platform} : ASIMD ==> SUCCESS" >> "${TMPDIR}/build.log"
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@ -109,7 +109,7 @@ do
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then
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# Test NEON code generation
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count=$(otool -tV aria_simd.o 2>&1 | grep -c -E 'vld|vst|vshl|vshr|veor')
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count=$(otool -tV chacha_simd.o 2>&1 | grep -c -E 'vld|vst|vshl|vshr|veor')
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if [[ "${count}" -gt 64 ]]
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then
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echo "${platform} : NEON ==> SUCCESS" >> "${TMPDIR}/build.log"
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@ -122,7 +122,7 @@ do
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then
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# Test ASIMD code generation
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count=$(otool -tV aria_simd.o 2>&1 | grep -c -E 'ldr[[:space:]]*q|str[[:space:]]*q|shl.4|shr.4|eor.16')
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count=$(otool -tV chacha_simd.o 2>&1 | grep -c -E 'ldr[[:space:]]*q|str[[:space:]]*q|shl.4|shr.4|eor.16')
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if [[ "${count}" -gt 64 ]]
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then
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echo "${platform} : ASIMD ==> SUCCESS" >> "${TMPDIR}/build.log"
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@ -1645,7 +1645,7 @@ if [[ ("$HAVE_DISASS" -ne 0 && ("$IS_ARM32" -ne 0 || "$IS_ARM64" -ne 0)) ]]; the
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TEST_LIST+=("ARM NEON code generation")
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OBJFILE=aria_simd.o; rm -f "$OBJFILE" 2>/dev/null
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OBJFILE=chacha_simd.o; rm -f "$OBJFILE" 2>/dev/null
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CXX="${CXX}" CXXFLAGS="$RELEASE_CXXFLAGS" "$MAKE" "${MAKEARGS[@]}" $OBJFILE 2>&1 | tee -a "$TEST_RESULTS"
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COUNT=0
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84
aria.cpp
84
aria.cpp
@ -7,14 +7,6 @@
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#include "misc.h"
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#include "cpu.h"
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#if CRYPTOPP_SSE2_INTRIN_AVAILABLE
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# define CRYPTOPP_ENABLE_ARIA_SSE2_INTRINSICS 1
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#endif
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#if CRYPTOPP_SSSE3_AVAILABLE
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# define CRYPTOPP_ENABLE_ARIA_SSSE3_INTRINSICS 1
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#endif
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NAMESPACE_BEGIN(CryptoPP)
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NAMESPACE_BEGIN(ARIATab)
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@ -97,15 +89,6 @@ inline void ARIA_FE(word32 t[4]) {
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ARIA_MM(t[0],t[1],t[2],t[3]);
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}
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#if (CRYPTOPP_ARM_NEON_AVAILABLE)
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extern void ARIA_UncheckedSetKey_Schedule_NEON(byte* rk, word32* ws, unsigned int keylen);
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extern void ARIA_ProcessAndXorBlock_NEON(const byte* xorBlock, byte* outblock, const byte *rk, word32 *t);
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#endif
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#if (CRYPTOPP_SSSE3_AVAILABLE)
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extern void ARIA_ProcessAndXorBlock_SSSE3(const byte* xorBlock, byte* outBlock, const byte *rk, word32 *t);
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#endif
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// n-bit right shift of Y XORed to X
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template <unsigned int N>
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inline void ARIA_GSRK(const word32 X[4], const word32 Y[4], byte RK[16])
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@ -190,38 +173,29 @@ void ARIA::Base::UncheckedSetKey(const byte *key, unsigned int keylen, const Nam
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w3[0]=t[0]^w1[0]; w3[1]=t[1]^w1[1]; w3[2]=t[2]^w1[2]; w3[3]=t[3]^w1[3];
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#if CRYPTOPP_ARM_NEON_AVAILABLE
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if (HasNEON())
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{
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ARIA_UncheckedSetKey_Schedule_NEON(rk, m_w, keylen);
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}
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else
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#endif // CRYPTOPP_ARM_NEON_AVAILABLE
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{
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ARIA_GSRK<19>(w0, w1, rk + 0);
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ARIA_GSRK<19>(w1, w2, rk + 16);
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ARIA_GSRK<19>(w2, w3, rk + 32);
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ARIA_GSRK<19>(w3, w0, rk + 48);
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ARIA_GSRK<31>(w0, w1, rk + 64);
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ARIA_GSRK<31>(w1, w2, rk + 80);
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ARIA_GSRK<31>(w2, w3, rk + 96);
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ARIA_GSRK<31>(w3, w0, rk + 112);
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ARIA_GSRK<67>(w0, w1, rk + 128);
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ARIA_GSRK<67>(w1, w2, rk + 144);
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ARIA_GSRK<67>(w2, w3, rk + 160);
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ARIA_GSRK<67>(w3, w0, rk + 176);
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ARIA_GSRK<97>(w0, w1, rk + 192);
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ARIA_GSRK<19>(w0, w1, rk + 0);
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ARIA_GSRK<19>(w1, w2, rk + 16);
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ARIA_GSRK<19>(w2, w3, rk + 32);
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ARIA_GSRK<19>(w3, w0, rk + 48);
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ARIA_GSRK<31>(w0, w1, rk + 64);
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ARIA_GSRK<31>(w1, w2, rk + 80);
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ARIA_GSRK<31>(w2, w3, rk + 96);
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ARIA_GSRK<31>(w3, w0, rk + 112);
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ARIA_GSRK<67>(w0, w1, rk + 128);
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ARIA_GSRK<67>(w1, w2, rk + 144);
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ARIA_GSRK<67>(w2, w3, rk + 160);
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ARIA_GSRK<67>(w3, w0, rk + 176);
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ARIA_GSRK<97>(w0, w1, rk + 192);
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if (keylen > 16)
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if (keylen > 16)
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{
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ARIA_GSRK<97>(w1, w2, rk + 208);
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ARIA_GSRK<97>(w2, w3, rk + 224);
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if (keylen > 24)
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{
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ARIA_GSRK<97>(w1, w2, rk + 208);
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ARIA_GSRK<97>(w2, w3, rk + 224);
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if (keylen > 24)
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{
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ARIA_GSRK< 97>(w3, w0, rk + 240);
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ARIA_GSRK<109>(w0, w1, rk + 256);
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}
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ARIA_GSRK< 97>(w3, w0, rk + 240);
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ARIA_GSRK<109>(w0, w1, rk + 256);
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}
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}
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@ -293,22 +267,6 @@ void ARIA::Base::ProcessAndXorBlock(const byte *inBlock, const byte *xorBlock, b
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rk = ARIA_KXL(rk, t); ARIA_FO(t); rk = ARIA_KXL(rk, t); ARIA_FE(t);
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rk = ARIA_KXL(rk, t); ARIA_FO(t); rk = ARIA_KXL(rk, t);
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#if CRYPTOPP_ENABLE_ARIA_SSSE3_INTRINSICS
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if (HasSSSE3())
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{
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ARIA_ProcessAndXorBlock_SSSE3(xorBlock, outBlock, rk, t);
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return;
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}
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else
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#endif // CRYPTOPP_ENABLE_ARIA_SSSE3_INTRINSICS
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#if (CRYPTOPP_ARM_NEON_AVAILABLE)
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if (HasNEON())
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{
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ARIA_ProcessAndXorBlock_NEON(xorBlock, outBlock, rk, t);
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return;
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}
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else
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#endif // CRYPTOPP_ARM_NEON_AVAILABLE
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#if (CRYPTOPP_LITTLE_ENDIAN)
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{
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outBlock[ 0] = (byte)(X1[ARIA_BRF(t[0],3)] ) ^ rk[ 3];
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194
aria_simd.cpp
194
aria_simd.cpp
@ -1,194 +0,0 @@
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// aria_simd.cpp - written and placed in the public domain by
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// Jeffrey Walton, Uri Blumenthal and Marcel Raad.
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//
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// This source file uses intrinsics to gain access to ARMv7a and
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// ARMv8a NEON instructions. A separate source file is needed
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// because additional CXXFLAGS are required to enable the
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// appropriate instructions sets in some build configurations.
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#include "pch.h"
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#include "config.h"
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#include "misc.h"
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#if (CRYPTOPP_SSSE3_AVAILABLE)
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# include <tmmintrin.h>
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#endif
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#if (CRYPTOPP_ARM_NEON_HEADER)
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# include <arm_neon.h>
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#endif
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#if (CRYPTOPP_ARM_ACLE_HEADER)
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# include <stdint.h>
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# include <arm_acle.h>
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#endif
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// Squash MS LNK4221 and libtool warnings
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extern const char ARIA_SIMD_FNAME[] = __FILE__;
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NAMESPACE_BEGIN(CryptoPP)
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NAMESPACE_BEGIN(ARIATab)
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extern const word32 S1[256];
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extern const word32 S2[256];
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extern const word32 X1[256];
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extern const word32 X2[256];
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extern const word32 KRK[3][4];
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NAMESPACE_END
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NAMESPACE_END
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ANONYMOUS_NAMESPACE_BEGIN
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using CryptoPP::byte;
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using CryptoPP::word32;
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inline byte ARIA_BRF(const word32 x, const int y) {
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return static_cast<byte>(GETBYTE(x, y));
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}
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ANONYMOUS_NAMESPACE_END
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NAMESPACE_BEGIN(CryptoPP)
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using CryptoPP::ARIATab::S1;
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using CryptoPP::ARIATab::S2;
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using CryptoPP::ARIATab::X1;
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using CryptoPP::ARIATab::X2;
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using CryptoPP::ARIATab::KRK;
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#if (CRYPTOPP_ARM_NEON_AVAILABLE)
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template <unsigned int N>
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inline void ARIA_GSRK_NEON(const uint32x4_t X, const uint32x4_t Y, byte RK[16])
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{
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enum { Q1 = (4-(N/32)) % 4,
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Q2 = (3-(N/32)) % 4,
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R = N % 32
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};
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vst1q_u8(RK, vreinterpretq_u8_u32(
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veorq_u32(X, veorq_u32(
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vshrq_n_u32(vextq_u32(Y, Y, Q1), R),
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vshlq_n_u32(vextq_u32(Y, Y, Q2), 32-R)))));
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}
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void ARIA_UncheckedSetKey_Schedule_NEON(byte* rk, word32* ws, unsigned int keylen)
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{
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const uint32x4_t w0 = vld1q_u32(ws+ 0);
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const uint32x4_t w1 = vld1q_u32(ws+ 8);
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const uint32x4_t w2 = vld1q_u32(ws+12);
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const uint32x4_t w3 = vld1q_u32(ws+16);
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ARIA_GSRK_NEON<19>(w0, w1, rk + 0);
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ARIA_GSRK_NEON<19>(w1, w2, rk + 16);
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ARIA_GSRK_NEON<19>(w2, w3, rk + 32);
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ARIA_GSRK_NEON<19>(w3, w0, rk + 48);
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ARIA_GSRK_NEON<31>(w0, w1, rk + 64);
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ARIA_GSRK_NEON<31>(w1, w2, rk + 80);
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ARIA_GSRK_NEON<31>(w2, w3, rk + 96);
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ARIA_GSRK_NEON<31>(w3, w0, rk + 112);
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ARIA_GSRK_NEON<67>(w0, w1, rk + 128);
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ARIA_GSRK_NEON<67>(w1, w2, rk + 144);
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ARIA_GSRK_NEON<67>(w2, w3, rk + 160);
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ARIA_GSRK_NEON<67>(w3, w0, rk + 176);
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ARIA_GSRK_NEON<97>(w0, w1, rk + 192);
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if (keylen > 16)
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{
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ARIA_GSRK_NEON<97>(w1, w2, rk + 208);
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ARIA_GSRK_NEON<97>(w2, w3, rk + 224);
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if (keylen > 24)
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{
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ARIA_GSRK_NEON< 97>(w3, w0, rk + 240);
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ARIA_GSRK_NEON<109>(w0, w1, rk + 256);
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}
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}
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}
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void ARIA_ProcessAndXorBlock_NEON(const byte* xorBlock, byte* outBlock, const byte *rk, word32 *t)
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{
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outBlock[ 0] = (byte)(X1[ARIA_BRF(t[0],3)] );
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outBlock[ 1] = (byte)(X2[ARIA_BRF(t[0],2)]>>8);
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outBlock[ 2] = (byte)(S1[ARIA_BRF(t[0],1)] );
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outBlock[ 3] = (byte)(S2[ARIA_BRF(t[0],0)] );
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outBlock[ 4] = (byte)(X1[ARIA_BRF(t[1],3)] );
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outBlock[ 5] = (byte)(X2[ARIA_BRF(t[1],2)]>>8);
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outBlock[ 6] = (byte)(S1[ARIA_BRF(t[1],1)] );
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outBlock[ 7] = (byte)(S2[ARIA_BRF(t[1],0)] );
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outBlock[ 8] = (byte)(X1[ARIA_BRF(t[2],3)] );
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outBlock[ 9] = (byte)(X2[ARIA_BRF(t[2],2)]>>8);
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outBlock[10] = (byte)(S1[ARIA_BRF(t[2],1)] );
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outBlock[11] = (byte)(S2[ARIA_BRF(t[2],0)] );
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outBlock[12] = (byte)(X1[ARIA_BRF(t[3],3)] );
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outBlock[13] = (byte)(X2[ARIA_BRF(t[3],2)]>>8);
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outBlock[14] = (byte)(S1[ARIA_BRF(t[3],1)] );
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outBlock[15] = (byte)(S2[ARIA_BRF(t[3],0)] );
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// 'outBlock' and 'xorBlock' may be unaligned.
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if (xorBlock != NULLPTR)
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{
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vst1q_u8(outBlock,
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veorq_u8(
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vld1q_u8(xorBlock),
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veorq_u8(
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vld1q_u8(outBlock),
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vrev32q_u8(vld1q_u8((rk))))));
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}
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else
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{
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vst1q_u8(outBlock,
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veorq_u8(
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vld1q_u8(outBlock),
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vrev32q_u8(vld1q_u8(rk))));
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}
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}
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#endif // CRYPTOPP_ARM_NEON_AVAILABLE
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#if (CRYPTOPP_SSSE3_AVAILABLE)
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void ARIA_ProcessAndXorBlock_SSSE3(const byte* xorBlock, byte* outBlock, const byte *rk, word32 *t)
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{
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const __m128i MASK = _mm_set_epi8(12,13,14,15, 8,9,10,11, 4,5,6,7, 0,1,2,3);
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outBlock[ 0] = (byte)(X1[ARIA_BRF(t[0],3)] );
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outBlock[ 1] = (byte)(X2[ARIA_BRF(t[0],2)]>>8);
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outBlock[ 2] = (byte)(S1[ARIA_BRF(t[0],1)] );
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outBlock[ 3] = (byte)(S2[ARIA_BRF(t[0],0)] );
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outBlock[ 4] = (byte)(X1[ARIA_BRF(t[1],3)] );
|
||||
outBlock[ 5] = (byte)(X2[ARIA_BRF(t[1],2)]>>8);
|
||||
outBlock[ 6] = (byte)(S1[ARIA_BRF(t[1],1)] );
|
||||
outBlock[ 7] = (byte)(S2[ARIA_BRF(t[1],0)] );
|
||||
outBlock[ 8] = (byte)(X1[ARIA_BRF(t[2],3)] );
|
||||
outBlock[ 9] = (byte)(X2[ARIA_BRF(t[2],2)]>>8);
|
||||
outBlock[10] = (byte)(S1[ARIA_BRF(t[2],1)] );
|
||||
outBlock[11] = (byte)(S2[ARIA_BRF(t[2],0)] );
|
||||
outBlock[12] = (byte)(X1[ARIA_BRF(t[3],3)] );
|
||||
outBlock[13] = (byte)(X2[ARIA_BRF(t[3],2)]>>8);
|
||||
outBlock[14] = (byte)(S1[ARIA_BRF(t[3],1)] );
|
||||
outBlock[15] = (byte)(S2[ARIA_BRF(t[3],0)] );
|
||||
|
||||
// 'outBlock' and 'xorBlock' may be unaligned.
|
||||
if (xorBlock != NULLPTR)
|
||||
{
|
||||
_mm_storeu_si128(M128_CAST(outBlock),
|
||||
_mm_xor_si128(
|
||||
_mm_loadu_si128(CONST_M128_CAST(xorBlock)),
|
||||
_mm_xor_si128(
|
||||
_mm_loadu_si128(CONST_M128_CAST(outBlock)),
|
||||
_mm_shuffle_epi8(_mm_load_si128(CONST_M128_CAST(rk)), MASK)))
|
||||
);
|
||||
}
|
||||
else
|
||||
{
|
||||
_mm_storeu_si128(M128_CAST(outBlock),
|
||||
_mm_xor_si128(_mm_loadu_si128(CONST_M128_CAST(outBlock)),
|
||||
_mm_shuffle_epi8(_mm_load_si128(CONST_M128_CAST(rk)), MASK)));
|
||||
}
|
||||
}
|
||||
|
||||
#endif // CRYPTOPP_SSSE3_AVAILABLE
|
||||
|
||||
NAMESPACE_END
|
@ -57,7 +57,7 @@
|
||||
|
||||
LIB_SRCS = \
|
||||
cryptlib.cpp cpu.cpp integer.cpp 3way.cpp adler32.cpp algebra.cpp \
|
||||
algparam.cpp allocate.cpp arc4.cpp aria.cpp aria_simd.cpp ariatab.cpp \
|
||||
algparam.cpp allocate.cpp arc4.cpp aria.cpp ariatab.cpp \
|
||||
asn.cpp authenc.cpp base32.cpp base64.cpp basecode.cpp bfinit.cpp \
|
||||
blake2.cpp blake2b_simd.cpp blake2s_simd.cpp blowfish.cpp blumshub.cpp \
|
||||
camellia.cpp cast.cpp casts.cpp cbcmac.cpp ccm.cpp chacha.cpp \
|
||||
@ -88,7 +88,7 @@ LIB_SRCS = \
|
||||
|
||||
LIB_OBJS = \
|
||||
cryptlib.obj cpu.obj integer.obj 3way.obj adler32.obj algebra.obj \
|
||||
algparam.obj allocate.obj arc4.obj aria.obj aria_simd.obj ariatab.obj \
|
||||
algparam.obj allocate.obj arc4.obj aria.obj ariatab.obj \
|
||||
asn.obj authenc.obj base32.obj base64.obj basecode.obj bfinit.obj \
|
||||
blake2.obj blake2b_simd.obj blake2s_simd.obj blowfish.obj blumshub.obj \
|
||||
camellia.obj cast.obj casts.obj cbcmac.obj ccm.obj chacha.obj \
|
||||
|
@ -174,7 +174,6 @@
|
||||
<ClCompile Include="allocate.cpp" />
|
||||
<ClCompile Include="arc4.cpp" />
|
||||
<ClCompile Include="aria.cpp" />
|
||||
<ClCompile Include="aria_simd.cpp" />
|
||||
<ClCompile Include="ariatab.cpp" />
|
||||
<ClCompile Include="asn.cpp" />
|
||||
<ClCompile Include="authenc.cpp" />
|
||||
|
@ -35,9 +35,6 @@
|
||||
<ClCompile Include="aria.cpp">
|
||||
<Filter>Source Files</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="aria_simd.cpp">
|
||||
<Filter>Source Files</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="ariatab.cpp">
|
||||
<Filter>Source Files</Filter>
|
||||
</ClCompile>
|
||||
|
Loading…
Reference in New Issue
Block a user