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@ -2,16 +2,17 @@
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// Jack Lloyd and Jeffrey Walton
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//
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// This source file uses intrinsics and built-ins to gain access to
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// SSE2, ARM NEON and ARMv8a, and Power7 Altivec instructions. A separate
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// source file is needed because additional CXXFLAGS are required to enable
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// the appropriate instructions sets in some build configurations.
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// AVX2 instructions. A separate source file is needed because
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// additional CXXFLAGS are required to enable the appropriate
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// instructions sets in some build configurations.
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//
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// AVX implementation based on Botan's chacha_avx.cpp. Many thanks
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// AVX2 implementation based on Botan's chacha_avx.cpp. Many thanks
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// to Jack Lloyd and the Botan team for allowing us to use it.
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//
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// Here are some relative numbers for ChaCha8:
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// * Intel Skylake, 3.0 GHz: AVX2 at 4385 MB/s; 0.59 cpb.
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// * AMD Bulldozer, 3.3 GHz: AVX2 at 1680 MB/s; 1.47 cpb.
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// * Intel Skylake, 3.0 GHz: AVX2 at 4411 MB/s; 0.57 cpb.
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// * Intel Broadwell, 2.3 GHz: AVX2 at 3828 MB/s; 0.58 cpb.
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// * AMD Bulldozer, 3.3 GHz: AVX2 at 1680 MB/s; 1.47 cpb.
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#include "pch.h"
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#include "config.h"
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@ -28,7 +29,7 @@
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// Squash MS LNK4221 and libtool warnings
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extern const char CHACHA_AVX_FNAME[] = __FILE__;
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// Sun Studio 12.4 OK, 12.5 and 12.6 error.
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// Sun Studio 12.4 OK, 12.5 and 12.6 compile error.
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#if (__SUNPRO_CC >= 0x5140) && (__SUNPRO_CC <= 0x5150)
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# define MAYBE_CONST
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#else
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@ -283,13 +284,13 @@ void ChaCha_OperateKeystream_AVX2(const word32 *state, const byte* input, byte *
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if (input_mm)
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{
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_mm256_storeu_si256(output_mm + 0, _mm256_xor_si256(_mm256_loadu_si256(input_mm + 0),
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_mm256_permute2x128_si256(X0_0, X0_1, 1 + (3 << 4))));
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_mm256_permute2x128_si256(X0_0, X0_1, 1 + (3 << 4))));
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_mm256_storeu_si256(output_mm + 1, _mm256_xor_si256(_mm256_loadu_si256(input_mm + 1),
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_mm256_permute2x128_si256(X0_2, X0_3, 1 + (3 << 4))));
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_mm256_permute2x128_si256(X0_2, X0_3, 1 + (3 << 4))));
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_mm256_storeu_si256(output_mm + 2, _mm256_xor_si256(_mm256_loadu_si256(input_mm + 2),
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_mm256_permute2x128_si256(X1_0, X1_1, 1 + (3 << 4))));
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_mm256_permute2x128_si256(X1_0, X1_1, 1 + (3 << 4))));
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_mm256_storeu_si256(output_mm + 3, _mm256_xor_si256(_mm256_loadu_si256(input_mm + 3),
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_mm256_permute2x128_si256(X1_2, X1_3, 1 + (3 << 4))));
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_mm256_permute2x128_si256(X1_2, X1_3, 1 + (3 << 4))));
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}
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else
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{
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