Commit Graph

130 Commits

Author SHA1 Message Date
Jeffrey Walton
18b535fb5a
Add CPUID64 for MSVC missing __cpuidex 2020-02-07 14:19:46 -05:00
Jeffrey Walton
eb67356732
Set g_x86DetectionDone when CRYPTOPP_DISABLE_ASM is in effect
Previously we were re-entering DetectX86Features when CpuId failed or CRYPTOPP_DISABLE_ASM was in effect
2020-01-23 02:46:30 -05:00
Jeffrey Walton
95d8f2abfa
Disable RDRAND and RDSEED on AMD cpu's with family 15h or 16h (GH #924) 2020-01-17 01:05:42 -05:00
Jeffrey Walton
9013cb60fb
Fix semicolons yet again (GH #889)
So it looks like sed added a '\r' between the closing paren and the semi. Grepping for '^;' failed because the '\r' was considered part of the previous line, so it showed no hits. I finally had to write a C program to properly identify and fix those damn stray semicolons.
2019-10-14 12:30:10 -04:00
Jeffrey Walton
589c25264a Don't add semicolon to CRYPTOPP_CONSTANT abd DOCUMENTED_TYPEDEF (GH #889)
This issue is a recurring issue. Let's try fixing it in the #define this time.
2019-10-03 19:40:53 -04:00
Jeffrey Walton
4c1b2dc424 Clear sign conversion warnings 2019-09-28 21:30:01 -04:00
Jeffrey Walton
b76a010dda
Cleanup PowerPC defines 2019-07-06 07:35:36 -04:00
Jeffrey Walton
81da61fe7b
Breakout sha_block_data_order and sha_block_data_order_neon (GH #847) 2019-05-26 22:10:26 -04:00
Jeffrey Walton
1400757fea
Update comments 2019-05-25 00:43:27 -04:00
Jeffrey Walton
ea96b9d375
Use CRYPTOGAMS_armcap_P for ARM (GH #846)
Andy advised against removing the global caps variable. This commit reintroduces CRYPTOGAMS_armcap_P. However, due to the shared object symbol loading problem, we needed to use CRYPTOGAMS_armcap_P as a global, and not CRYPTOGAMS_armcap as a local. Using CRYPTOGAMS_armcap_P directly caused the symbol to be marked as R_ARM_ABS32 which avoids the problem with R_ARM_REL32.
2019-05-24 16:33:47 -04:00
Jeffrey Walton
f396ade93a
Rename XGETBV to XGETBV64 2019-05-21 19:44:48 -04:00
Jeffrey Walton
02cdbf61d3
Rename ExtendedControlRegister to XGETBV 2019-05-21 19:31:13 -04:00
Jeffrey Walton
cc011d2e44
Remove Aarch32 and Aarch64 from CPU_QueryARMv7
I believe some of the code may be generated differently. When testing CPU_ProbeARMv7 I had trouble compiling it on ARMv8.
2019-05-20 23:09:57 -04:00
Jeffrey Walton
a9be7ced86
Fix CPU_QueryARMv7 for Clang (GH #844)
This fixes the query under Clang. This appears to be a trickier problem because there is no explicit define for HWCAP_ARMv7. We rely on HWCAP_NEON as a proxy, or fallback to a CPU_ProbeARMv7.
2019-05-20 23:02:36 -04:00
Jeffrey Walton
c51f0ecbfd
Make config.h more Autoconf friendly (GH #835, PR #836) 2019-05-17 15:18:17 -04:00
Jeffrey Walton
ef3968f551
Guard x86 cache line size 2019-05-08 21:20:49 -04:00
Jeffrey Walton
72a71eb230
Use fallback in detecting ARM and PowerPC cache line size 2019-05-08 19:54:05 -04:00
Jeffrey Walton
c91813c0b4
Use fallback in detecting VIA cach line size 2019-05-08 19:46:23 -04:00
Jeffrey Walton
40e5891635
Use CPU_QuerySHA256 for ARM 2019-05-08 19:31:31 -04:00
Jeffrey Walton
73bf2f29c0
Add "AMDisbetter!" cpuid detection 2019-05-08 18:51:12 -04:00
Jeffrey Walton
986fded372
Spelling 2019-05-08 18:33:55 -04:00
Jeffrey Walton
d9aed27ad3
Add code for VIA L1 data cache line size 2019-05-08 18:29:33 -04:00
Jeffrey Walton
c9703ab5ea
Prepare for Crypto++ 8.2 release
Fix VS2010 compile on WIndows Vista
2019-04-28 17:27:09 -04:00
Jeffrey Walton
8edc5cf2d5
Add "cc" clobber due to GCC 3.3 compile failure 2018-12-29 00:09:59 -05:00
Jeffrey Walton
29d1c1772d
Fix missing ExtendedControlRegister when CRYPTOPP_DISABLE_ASM
Also see https://github.com/noloader/cryptopp-cmake/issues/44
2018-12-28 12:19:13 -05:00
Shmueli Englard
fc87f8666a Add check for VS version and ExtendedControlRegister (PR #766) 2018-12-21 19:54:24 -05:00
hygonsoc
6dfb428f10 Add Hygon Dhyana support to enable RDRAND/RDSEED/ADX/AVX2 Feature (PR #765)
Hugh, interesting.

Thank you very much.

Ping @randombit. Botan may want or need this, too.
2018-12-20 17:33:16 -05:00
Jeffrey Walton
0aa217b91c
Update comments in config.h
Some comments in config.h were old. Time for a refresh.
Switch from CRYPTOPP_BOOL_ARM64 to CRYPTOPP_BOOL_ARMV8. Aarch32 is ARMv8, and that's the important part.
2018-12-09 10:24:55 -05:00
Jeffrey Walton
3e909c13d4
Add IBM XLC init priority support 2018-11-30 08:23:35 -05:00
Jeffrey Walton
af7cdcdbec
Update documentation 2018-11-30 05:57:02 -05:00
Jeffrey Walton
3db34abf2f
Add Power9 Random Number Generator support (GH #747, PR #748) 2018-11-27 02:54:26 -05:00
Jeffrey Walton
cc5eb3919f
Fix compile using SunCC 5.9 2018-11-08 15:08:30 -05:00
Jeffrey Walton
5c3532597a
Whitespace check-in 2018-08-20 01:33:09 -04:00
Jeffrey Walton
082ad86132
Fix missing _xgetbv for Visual Studio 2008 and below 2018-08-19 10:19:29 -04:00
Jeffrey Walton
048c2721fb
Remove unneeded defines from cpu.cpp 2018-08-08 20:55:00 -04:00
Jeffrey Walton
9ff731824b
Prepare for POWER8 carryless multiplies using vpmsum 2018-08-06 05:40:38 -04:00
Tanzinul Islam
da00422d3c Fix build with Embarcadero C++Builder 10.2.3 (#696)
Fix two compilation errors encountered with C++Builder (Starter Edition):

 - In `cpu.cpp`, 0ccdc197b introduced a dependency on `_xgetbv()` from `<immintrin.h>` that doesn't exist on C++Builder. Enlist it for the workaround, similar to SunCC in 692ed2a2b.

 - In `adv-simd.h`, `<pmmintrin.h>` is being #included under the `CRYPTOPP_SSE2_INTRIN_AVAILABLE` macro. This header, [which apparently provides SSE3 intrinsics](https://stackoverflow.com/a/11228864/1433768), is not shipped with C++Builder. (This section of code was recently downgraded from a SSSE3 to a SSE2 block in 09c8ae28, followed by moving away from `<immintrin.h>` in bc8da71a, followed by reintroducing the SSSE3 check in d1e646a5.) Split the SSE2 and SSSE3 cases such that `<pmmintrin.h>` is not #included for SSE2. This seems safe to do, because some `git grep` analysis shows that:
    - `adv-simd.h` is not #included by any other header, but only directly #included by some `.cpp` files.
    - Among those `.cpp` files, only `sm4-simd.cpp` has a `CRYPTOPP_SSE2_INTRIN_AVAILABLE` preprocessor block, and there it again includes the other two headers (`<emmintrin.h>` and `<xmmintrin.h>`).

NOTE: I was compiling via the IDE after [setting up a project file](https://github.com/tanzislam/cryptopals/wiki/Importing-into-Embarcadero-C%E2%94%BC%E2%94%BCBuilder-Starter-10.2#using-the-crypto-library). My compilation command was effectively:

```
bcc32c.exe -DCRYPTOPP_NO_CXX11 -DCRYPTOPP_DISABLE_SSSE3 -D__SSE2__ -D__SSE__ -D__MMX__
```
2018-08-04 22:54:36 -04:00
Jeffrey Walton
692ed2a2bb
Fix SunStudio compile on Solaris 2018-07-15 19:24:55 -04:00
Jeffrey Walton
4e3a1ea962
Add ARMv8.4 cpu feature detection support (GH #685) (#687)
This PR adds ARMv8.4 cpu feature detection support. Previously we only needed ARMv8.1 and things were much easier. For example, ARMv8.1 `__ARM_FEATURE_CRYPTO` meant PMULL, AES, SHA-1 and SHA-256 were available. ARMv8.4 `__ARM_FEATURE_CRYPTO` means PMULL, AES, SHA-1, SHA-256, SHA-512, SHA-3, SM3 and SM4 are  available. 

We still use the same pattern as before. We make something available based on compiler version and/or preprocessor macros. But this time around we had to tighten things up a bit to ensure ARMv8.4 did not cross-pollinate down into ARMv8.1.

ARMv8.4 is largely untested at the moment. There is no hardware in the field and CI lacks QEMU with the relevant patches/support. We will probably have to revisit some of this stuff in the future.

Since this update applies to ARM gadgets we took the time to expand Android and iOS testing on Travis. Travis now tests more platforms, and includes Autotools and CMake builds, too.
2018-07-15 08:35:14 -04:00
Jeffrey Walton
7a67e43b27
Fix Apple feature detection (GH #685) 2018-07-14 08:40:06 -04:00
Jeffrey Walton
d11a7b3436
Add ARMv8 CPU feature queries (GH #685)
CPU feature probes are still outstanding. They are going to be trickier because if CRYPTOPP_XXX_FEATURE_AVAILABLE
2018-07-14 08:20:16 -04:00
Jeffrey Walton
517d552a91
Add ARMv7 cpu detection 2018-07-08 02:49:21 -04:00
Jeffrey Walton
0ccdc197b7
Add AVX and AVX2 runtime feature detection (GH #671)
There are no corresponding defines in config.h at the moment. Programs will have to use the preprocessor macros __AVX__ and __AVX2__ to determine when they are available.
2018-06-18 18:33:17 -04:00
Ilja
8d81492f88 Remove extra ; from cpu.cpp (PR #614) 2018-03-31 13:10:11 -04:00
Jeffrey Walton
69915e1755
Remove double CRYPTOPP_SECTION_INIT for g_hasSSE2
Also change to a single declaration per line. The multiple declarations got to be messy
2018-03-27 23:19:26 -04:00
Jeffrey Walton
1c60f6480f
Fix Windows compile error using VS2008 2018-03-27 20:38:26 -04:00
Jeffrey Walton
af6b96c78b
Whitespace check-in 2018-03-22 00:20:45 -04:00
Jeffrey Walton
f589de0839
Rework Glibc sysconf code
It looks like the 0 return value for _SC_LEVEL1_DCACHE_LINESIZE is not a 1-off problem with PPC. It appears Glibc regularly returns 0 instead of failure. Also see https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/posix/sysconf.c.
We were OK before the change. The difference now is, we expect all Glibc queries to misbehave
2018-03-21 16:19:43 -04:00
Jeffrey Walton
ddf9e70234
Fix Power7 test using PPC_FEATURE_ARCH_2_06 2018-03-21 00:35:56 -04:00
Jeffrey Walton
04e361889e
Add CPU feature queries for AIX
Also see the discussion at https://github.com/noloader/POWER8-crypto
2018-03-20 23:52:10 -04:00