Jeffrey Walton
dd7598e638
Remove 64-bit AdvancedProcessBlocks (GH #945 )
2020-07-07 15:22:09 -04:00
Jeffrey Walton
84ab419029
Fix SIMON64 and SPECK64 self test failures (GH #945 )
2020-07-07 12:36:49 -04:00
Jeffrey Walton
e007e98501
Update comments
2020-04-11 08:36:02 -04:00
Jeffrey Walton
fa23a5ba16
Presplat SIMON and SPECK keys on Intel machines
2020-04-10 23:54:31 -04:00
Jeffrey Walton
b669775211
Add 32-bit Altivec implementation of Simon128
2020-04-08 10:09:04 -04:00
Jeffrey Walton
5017d9c91c
Report Altivec on PowerPC
2020-04-05 09:21:35 -04:00
Jeffrey Walton
b1da3dc823
Use Altivec for Simon64
2020-04-05 08:40:49 -04:00
Jeffrey Walton
c831d6ffee
Pre-splat SIMON and SPECK keys when appropriate for Altivec (PR #910 )
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SIMON and SPECK keys can be pre-splatted in the forward direction when Altivec instructions will be used. Pre-splatting does not work for the reverse transformation. It breaks modes like CBC, so the speed-up is only applied to the forward transformation.
2019-10-28 01:12:58 -04:00
Jeffrey Walton
6da6b7f5ac
Enable Power7 for Simon and Speck (PR #909 )
2019-10-27 14:02:41 -04:00
Jeffrey Walton
883dbce74a
Remove double semicolons after sed'ing defines
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Also see https://github.com/weidai11/cryptopp/issues/889
2019-10-03 20:44:33 -04:00
Jeffrey Walton
39418a8512
Use PowerPC unaligned loads and stores with Power8 (GH #825 , PR #826 )
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Use PowerPC unaligned loads and stores with Power8. Formerly we were using Power7 as the floor because the IBM POWER Architecture manuals said unaligned loads and stores were available. However, some compilers generate bad code for unaligned loads and stores using `-march=power7`, so bump to a known good.
2019-04-27 20:35:01 -04:00
Jeffrey Walton
0d44176fd1
Cleanup debug information from SIMON source files
2018-11-21 13:05:59 -05:00
Jeffrey Walton
7515b4d661
Fix SIMON64 and SPECK64 providers
2018-11-12 22:03:26 -05:00
Jeffrey Walton
9550ccc9a3
Port SIMON64 to Altivec
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SIMON64 runs about 4x faster than C++ for POWER4 and friends. If POWER7 is available it goes back to full speed due to efficient unaligned loads
2018-11-12 21:51:11 -05:00
Jeffrey Walton
c25a1e354d
Clear conversion wanrings under MSVC
2018-08-20 10:44:36 -04:00
Jeffrey Walton
b2c5616ede
Fix AlgorithmProvider for SIMON and SPECK on Solaris
2018-08-17 07:49:35 -04:00
Jeffrey Walton
6f1caab7c2
Move SIMON-64 and SPECK-64 to Power7 minimum
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SIMON-64 and SPECK-64 don't use 64-bit type so they can run on Power7. We may be able to drop to Power4, but we need to test the effects of Loads and Stores without vec_vxs_ld and vec_vsx_st
2018-08-14 23:31:40 -04:00
Jeffrey Walton
9b91b94b05
Add POWER8 SIMON-64 implementation
2018-08-14 07:14:39 -04:00
Jeffrey Walton
6c621f91ce
Add POWER8 SIMON-128 implementation
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Performance went from about 30 to 40 cpb to 5.5 to 9 cpb, depending on endian-ness
2018-08-12 09:21:09 -04:00
Jeffrey Walton
b74a6f4445
Add algorithm provider member function to Algorithm class
2018-07-06 09:23:37 -04:00
Jeffrey Walton
f5c86217c0
Use default alignment for GetBlock
2018-06-24 16:05:37 -04:00
Fabrice Fontaine
3c01bcc352
Allow user to set -DCRYPTOPP_ARM_NEON_AVAILABLE=0 ( #595 )
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Disable neon through -DCRYPTOPP_ARM_NEON_AVAILABLE=0,
replace "if defined(CRYPTOPP_ARM_NEON_AVAILABLE)" by
"if (CRYPTOPP_ARM_NEON_AVAILABLE)"
Signed-off-by: Fabrice Fontaine <fontaine.fabrice@gmail.com>
2018-03-05 18:49:10 -05:00
Jeffrey Walton
e416b243d3
Re-add Simon and Speck, enable SSE (GH #585 )
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This commit re-adds Simon and Speck. The commit includes C++, SSSE3 and SSE4. NEON, Aarch32 and Aarch64 are disabled at the moment.
2018-02-18 23:23:50 -05:00
Jeffrey Walton
15b14cc618
Remove Simon and Speck ciphers (GH #585 )
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We recently learned our Simon and Speck implementation was wrong. The removal will stop harm until we can loop back and fix the issue.
The issue is, the paper, the test vectors and the ref-impl do not align. Each produces slightly different result. We followed the test vectors but they turned out to be wrong for the ciphers.
We have one kernel test vector but we don't have a working implementation to observe it to fix our implementation. Ugh...
2018-02-14 04:06:16 -05:00
Jeffrey Walton
24883ca79f
Clear Coverity issue CID 186337
2017-12-27 00:43:00 -05:00
Jeffrey Walton
0aa2ebbbf3
Clear signed/unsigned warnings with GCC and -Wall -Wextra
2017-12-26 16:59:32 -05:00
Jeffrey Walton
7bc621da62
Enable NEON/ASIMD for Simon and Speck on Aarch32/Aarch64 (GH #545 )
2017-12-05 14:02:48 -05:00
Jeffrey Walton
4990ffe5b8
Add SIMON-64 NEON intrinsics
2017-12-05 08:53:57 -05:00
Jeffrey Walton
f0e49785f6
Fix incorrect SPECK-128 decrypt when blocks >= 6
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Add defines for CRYPTOPP_SPECK64_ADVANCED_PROCESS_BLOCKS and CRYPTOPP_SPECK128_ADVANCED_PROCESS_BLOCKS
2017-12-03 09:00:39 -05:00
Jeffrey Walton
081afde0fd
Add SIMON-64 SSE intrinsics
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Performance went from about 29 cpb (C++) to about 11.1 cpb (SSE)
2017-12-03 04:10:55 -05:00
Jeffrey Walton
61ec50dabe
Change Doxygen comment style from //! to ///
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Also see https://groups.google.com/forum/#!topic/cryptopp-users/A7-Xt5Knlzw
2017-11-29 10:54:33 -05:00
Jeffrey Walton
568e608ea6
Add NEON and ASIMD intrinsics for SPECK-128 (GH #539 )
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Performance increased by about 200% on a 980 MHz BananaPi dev-board. Throughput went from about 176.6 cpb to about 60.3 cpb.
2017-11-27 00:36:45 -05:00
Jeffrey Walton
a074722bfa
Switch to rotlConstant and rotrConstant
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This will help Clang and its need for a constexpr
2017-11-25 02:52:19 -05:00
Jeffrey Walton
900dc5d1a6
Rework UncheckedSetKey to rearrange words in ExpandKey (GH #539 )
2017-11-21 17:43:43 -05:00
Jeffrey Walton
79273a0f4d
Whitespace and spelling check-in
2017-11-21 05:54:15 -05:00
Jeffrey Walton
3970a066e3
Add SIMON-64 and SIMON-128 lightweight block ciphers (GH #539 )
2017-11-21 04:58:51 -05:00
