Jeffrey Walton
ed91b278bb
Run autoupdate and libtoolize if available
2018-07-27 16:51:32 -04:00
Jeffrey Walton
7afd05c336
Save/restore 64-bit registers for Padlock on x86_64
2018-07-27 11:21:54 -04:00
Jeffrey Walton
b74a6f4445
Add algorithm provider member function to Algorithm class
2018-07-06 09:23:37 -04:00
Jeffrey Walton
1df1d25428
Cleanup warnings under MSC
2018-01-21 16:25:49 -05:00
Jeffrey Walton
3c6eb74cd7
Clear Coverity issue CID 186341
2017-12-28 01:29:31 -05:00
Jeffrey Walton
952ec1c5c8
Update comments
2017-08-25 06:41:24 -04:00
Jeffrey Walton
e9a0553b5d
Fix typo
2017-08-24 20:24:32 -04:00
Jeffrey Walton
bac3c1cc40
Fix Asan 64-bit build
...
The Padlock SDK sample code leaves a lot to be desired. Regariding the 64-bit samples and instr_linux64.asm... it looks like the sample sill uses 32-bit constants, but most anything related to extended registers, like rdi, is commented out
2017-08-20 11:19:32 -04:00
Jeffrey Walton
40d0710d43
Fix compile under Clang
...
padlkrng.cpp:45:34: error: no matching function for call to 'STDMIN'
const size_t rem = STDMIN(ret, STDMIN(size, 16U));
^~~~~~
./misc.h:516:36: note: candidate template ignored: deduced conflicting types for parameter 'T' ('unsigned long' vs. 'unsigned int')
template <class T> inline const T& STDMIN(const T& a, const T& b)
^
1 error generated.
2017-08-20 07:09:10 -04:00
Jeffrey Walton
ce74eac58d
Updated documentation
2017-08-20 04:40:57 -04:00
Jeffrey Walton
8c47095a57
FIX GCC ASM template
...
is the constant 2. %2 is the second positional argument, which is the XSTORE divisor. We want the later.
2017-08-20 04:21:24 -04:00
Jeffrey Walton
61c8b74951
Add Divisor and MSR member variables
...
Guard ASM based on CRYPTOPP_X86_ASM_AVAILABLE
Increased depth of internal buffer
Update documentation for using the generator
Whitespace check-in
2017-08-20 04:09:19 -04:00
Jeffrey Walton
7fb5953055
Add VIA Padlock RNG
2017-08-19 15:41:45 -04:00
