Commit Graph

100 Commits

Author SHA1 Message Date
Jeffrey Walton
81da61fe7b
Breakout sha_block_data_order and sha_block_data_order_neon (GH #847) 2019-05-26 22:10:26 -04:00
Jeffrey Walton
fc10a7f1ea
Fix SHA512 on ARM benchmarks
This was a mistake when porting from Cryptogams to Crypto++. The macros VFP_ABI_PUSH and VFP_ABI_POP needed to be defined because they save and restore SIMD register state. They were originally missing during the port. The benchmarks would hang because the doubles we used for benchmarking were blown away in sha512_block_data_order_neon.
2019-05-25 06:23:19 -04:00
Jeffrey Walton
ea96b9d375
Use CRYPTOGAMS_armcap_P for ARM (GH #846)
Andy advised against removing the global caps variable. This commit reintroduces CRYPTOGAMS_armcap_P. However, due to the shared object symbol loading problem, we needed to use CRYPTOGAMS_armcap_P as a global, and not CRYPTOGAMS_armcap as a local. Using CRYPTOGAMS_armcap_P directly caused the symbol to be marked as R_ARM_ABS32 which avoids the problem with R_ARM_REL32.
2019-05-24 16:33:47 -04:00
Jeffrey Walton
2a09376211
Remove const_cast from CryptogamsArmCaps() 2019-05-23 03:17:17 -04:00
Jeffrey Walton
7eaa5837e0
Fix "unexpected reloc type 0x03" for ARM shared object (GH #846) 2019-05-22 19:00:08 -04:00
Jeffrey Walton
5fb03078eb
Use void return value for Cryptogams SHA functions 2019-05-21 02:38:30 -04:00
Jeffrey Walton
c0cff24953
Update comments 2019-05-20 17:11:59 -04:00
Jeffrey Walton
b1b6ea5b78
Fold declarations for CRYPTOGAMS_armcaps
Also declare storage for CRYPTOGAMS_armcaps. This moves the symbol from BSS to initialized data. The Cryptogams module declares the symbol as common, so they are weak and use our declaration.
2019-05-20 17:03:57 -04:00
Jeffrey Walton
e3788aacc5
Display C++ for SHA512_AlgorithmProvider on ARM 2019-05-19 18:17:46 -04:00
Jeffrey Walton
6528561cb3
Update comments 2019-05-19 18:10:09 -04:00
Jeffrey Walton
e19a6152b5
Return CRYPTOGAMS_armcaps in CryptogamsArmCaps 2019-05-19 16:51:40 -04:00
Jeffrey Walton
62d53e6c44
Disable Cryptogams ASM on static Transform function
This needs mmore testing.
2019-05-19 16:46:01 -04:00
Jeffrey Walton
d38e5a954d
Add ARM SHA512 asm implementation from Cryptogams (GH #841, PR #843)
Cryptogams is Andy Polyakov's project used to create high speed crypto algorithms and share them with other developers. Cryptogams  has a dual license. First is the OpenSSL license because Andy contributes to OpenSSL. Second is a BSD license for those who want a more permissive license.

Andy's implementation runs about 45% faster than C/C++ code. Testing on a 1.8 GHz Cortex-A17 shows Cryptograms at 45 cpb, and C++ at 79 cpb.

The integration instructions are documented at [Cryptogams SHA](https://wiki.openssl.org/index.php/Cryptogams_SHA) on the OpenSSL wiki.
2019-05-19 16:29:45 -04:00
Jeffrey Walton
4c9ca6b723
Add ARM SHA256 asm implementation from Cryptogams (GH #840, PR #840)
Cryptogams is Andy Polyakov's project used to create high speed crypto algorithms and share them with other developers. Cryptogams  has a dual license. First is the OpenSSL license because Andy contributes to OpenSSL. Second is a BSD license for those who want a more permissive license.

Andy's implementation runs about 45% faster than C/C++ code. Testing on a 1 GHz Cortex-A7 shows Cryptograms at 17 cpb, and C++ at 30 cpb.

The integration instructions are documented at [Cryptogams SHA](https://wiki.openssl.org/index.php/Cryptogams_SHA) on the OpenSSL wiki.
2019-05-19 06:59:12 -04:00
Jeffrey Walton
1a63112faf
Add ARM SHA1 asm implementation from Cryptogams (GH #837, PR #838)
Add ARM SHA1 asm implementation from Cryptogams.

Cryptogams is Andy Polyakov's project used to create high speed crypto algorithms and share them with other developers. Cryptogams  has a dual license. First is the OpenSSL license because Andy contributes to OpenSSL. Second is a BSD license for those who want a more permissive license.

Andy's implementation runs about 30% faster than C/C++ code. Testing on a 1 GHz Cortex-A7 shows Cryptograms at 16 cpb, and C++ at 23 cpb.

The integration instructions are documented at [Cryptogams SHA](https://wiki.openssl.org/index.php/Cryptogams_SHA) on the OpenSSL wiki.
2019-05-18 23:07:17 -04:00
Jeffrey Walton
be85db4de4
Restore unnamed namespace for SHA512_HashBlock_SSE2 (GH #684) 2018-12-28 18:05:06 -05:00
Jeffrey Walton
896225069d
Rename files with dashes to underscores (GH #736)
Also see https://groups.google.com/forum/#!topic/cryptopp-users/HBz-6gZZFOA on the mailing list
2018-11-10 08:00:14 -05:00
Jeffrey Walton
1ff6f39ec6
Add proper declaration for Kalyna tables; and split from definitions 2018-10-28 06:09:46 -04:00
Jeffrey Walton
1d0c6dd916
Cleanup SHA SIMD source file
Add proper declaration for SHA256_K and SHA512_K tables; and split from definitions
2018-10-28 04:45:26 -04:00
Jeffrey Walton
1acbedd4f8
Fix spelling and grammar 2018-10-13 22:15:41 -04:00
Jeffrey Walton
1bbbfb6b75
Fix partial specializations for FixedSizeAllocatorWithCleanup (PR #710)
Commit afbd3e60f6 effectively treated a symptom and not the underlying problem. The problem was linkers on 32-bit systems ignore CRYPTOPP_ALIGN_DAT(16) passed down by the compiler and align to 8-bytes or less. We have to use Wei's original code in some places. It is not a bad thing, but the bit fiddling is something we would like to contain a little more by depending more on language or platform features.

This commit keeps the original changes which improve partial specializations; but fixes 32-bit linker behavior by effectively reverting afbd3e60f6 and e054d36dc8. We also add more comments so the next person has understands why things are done they way they are.
2018-08-24 08:13:23 -04:00
Jeffrey Walton
afbd3e60f6
Fix alignment on Win32 and Solaris Sparc (PR #709)
These fixes were interesting in a morbid sort of way. I thought the FixedSizeAllocatorWithCleanup specializations faithfully reproduced semantics but I was wrong on Win32 and Sparc. Also see Commit e054d36dc8.

It seems there was another requirement or dependency that we missed, but it was not readily apparent. If I am parsing results correctly (which I may not be), it appears the bit twiddling using 8 byte alignment had more influence on alignment than I originally thought based on use of CRYPTOPP_BOOL_ALIGN16 and T_Align16. Or maybe the alignment attributes specified by CRYPTOPP_ALIGN_DATA are not being honored like they should for stack allocations.

This check-in avoids some uses of x86 movdqa (aligned) in favor of movdqu (unaligned). The uses were concentrated on memory operands which were 8-byte aligned instead of 16-byte aligned. It is not clear to me how the specializations lost 8-bytes of alignment. The check-in also enlists CRYPTOPP_ASSERT to tell us when there's a problem so we don't need to go hunting for bugs.
2018-08-23 14:42:29 -04:00
Jeffrey Walton
4282f94712
Disable X32 inline assembly (GH #686, PR #704)
Also use CRYPTOPP_DISABLE_XXX_ASM consistently. The pattern is needed for Clang which still can't compile Intel assembly language. Also see http://llvm.org/bugs/show_bug.cgi?id=24232.
2018-08-18 04:44:53 -04:00
Jeffrey Walton
522da15b13
Whitespace check-in 2018-08-17 23:44:01 -04:00
Jeffrey Walton
8019362bd6
Clear unused variable warnings under MSVC 2018-08-03 06:17:22 -04:00
Jeffrey Walton
4aafb0e6a3
Cleanup SHA512::Transform code
The extra code paths added at GH #689 were no longer needed after GH #691
2018-07-21 10:28:48 -04:00
Jeffrey Walton
365e65c2eb
Whitespace check-in 2018-07-20 13:38:55 -04:00
Jeffrey Walton
ca302c952e
Fix Solaris 11/Sparc crash in SHA-384 (GH #689, GH #403)
I believe Andrew Marlow first reported it. At the time we could not get our hands on hardware to fully test things. Instead we were using -xmemalign=4i option as a band-aide to avoid running afoul of the Sparc instruction that moves 64-bits of data in one shot.
2018-07-20 13:24:04 -04:00
Jeffrey Walton
f143534d99
Cleanup defines in sha.cpp
There's no need for extra guards with CRYPTOPP_DISABLE_SHA_ASM because relevant macros are undefined
2018-07-15 12:47:34 -04:00
Jeffrey Walton
31533db421
Disable X32 for SHA (GH #686)
Thanks to Peter Cordes for the feedback
2018-07-15 11:39:41 -04:00
Jeffrey Walton
4e3a1ea962
Add ARMv8.4 cpu feature detection support (GH #685) (#687)
This PR adds ARMv8.4 cpu feature detection support. Previously we only needed ARMv8.1 and things were much easier. For example, ARMv8.1 `__ARM_FEATURE_CRYPTO` meant PMULL, AES, SHA-1 and SHA-256 were available. ARMv8.4 `__ARM_FEATURE_CRYPTO` means PMULL, AES, SHA-1, SHA-256, SHA-512, SHA-3, SM3 and SM4 are  available. 

We still use the same pattern as before. We make something available based on compiler version and/or preprocessor macros. But this time around we had to tighten things up a bit to ensure ARMv8.4 did not cross-pollinate down into ARMv8.1.

ARMv8.4 is largely untested at the moment. There is no hardware in the field and CI lacks QEMU with the relevant patches/support. We will probably have to revisit some of this stuff in the future.

Since this update applies to ARM gadgets we took the time to expand Android and iOS testing on Travis. Travis now tests more platforms, and includes Autotools and CMake builds, too.
2018-07-15 08:35:14 -04:00
Jeffrey Walton
28e20d6e5f
Fix "Error: symbol SHA512_Round is already defined" (GH #684) 2018-07-13 17:05:14 -04:00
Jeffrey Walton
b74a6f4445
Add algorithm provider member function to Algorithm class 2018-07-06 09:23:37 -04:00
Jeffrey Walton
e18de4d5f9
Re-engage SSE2 ASM for SHA-256 (GH# 674)
I'm not usre where exactly the break occured, but it was probably due to the BASE+SIMD rewrite. Thanks to tesbayda for tracking it down.
2018-06-29 21:02:53 -04:00
Jeffrey Walton
c4e0942a68
Add CRYPTOPP_TABLE, remove CRYPTOPP_SECTION 2018-01-21 14:19:00 -05:00
Jeffrey Walton
a074722bfa
Switch to rotlConstant and rotrConstant
This will help Clang and its need for a constexpr
2017-11-25 02:52:19 -05:00
Jeffrey Walton
ced7cff64f
Add Power8 SHA256 and SHA512 support (GH #513) 2017-09-22 09:39:36 -04:00
Jeffrey Walton
3bd01f73ba
Add Power8 SHA256 and SHA512 support (GH #513) 2017-09-22 08:58:50 -04:00
Jeffrey Walton
5296e087ad
Fix func/subfunc parameter names (GH #502) 2017-09-16 00:19:14 -04:00
Jeffrey Walton
7bdb62b336
Fix bad SHA152 hash under IBM XL C/C++ compiler (GH #502) 2017-09-15 18:33:05 -04:00
Jeffrey Walton
d2ad6751d5
Clear uninitialized variable warnings under xlC 2017-09-01 20:37:23 -04:00
Wyatt O'Day
ffbedcefc5 Fix build on FreeBSD 10.3 x86 with clang++ 3.4.1. (#483)
* Fix build on FreeBSD 10.3 x86 with clang++ v. 3.4.1. The x64 build (also clang++ 3.4.1) doesn't require CRYPTOPP_DISABLE_SHA_ASM. It seems to be a bug specific to the x86 version of clang++.

* Based on suggestion from @noloader, don't split x86/x64 clang++ version detection. Just wait until clang++ is consistently working in both x86/x64.
2017-08-30 16:42:36 -04:00
Jeffrey Walton
7851a0d510 Remove BOOL macro value (GH #462)
Currently the CRYPTOPP_BOOL_XXX macros set the macro value to 0 or 1. If we remove setting the 0 value (the #else part of the expression), then the self tests speed up by about 0.3 seconds. I can't explain it, but I have observed it repeatedly.
This check-in prepares for the removal in Upstream master
2017-08-20 21:25:29 -04:00
Jeffrey Walton
e2c377effd Split source files to support Base Implementation + SIMD implementation (GH #461)
Split source files to support Base Implementation + SIMD implementation
2017-08-17 12:33:43 -04:00
Jeffrey Walton
2ee8e3b26d
Move free standing function into anonymous namespace
Update comments and use class constants when available
2017-08-14 00:08:55 -04:00
Jeffrey Walton
2aff92ddb6
Fix bad SHA::Transform calculation (Issue 455)
Reworked SHA class internals to align all the implementations. Formerly all hashes were software based, IterHashBase handled endian conversions, IterHashBase repeatedly called the single block SHA{N}::Transform. The rework added SHA{N}::HashMultipleBlocks, and the SHA classes attempt to always use it.

Now SHA{N}::Transform calls into SHA{N}_HashMultipleBlocks, which is a free standing function. An added wrinkle is hardware wants little endian data and software presents big endian data, so HashMultipleBlocks accepts a ByteOrder for the incoming data. Hardware based SHA{N}_HashMultipleBlocks can often perform the endian swap much easier by setting an EPI mask so it was profitable to defer to hardware when available.

The rework also removed the hacked-in pointers to implementations. The class now looks more like AES, GCM, etc.
2017-08-13 16:05:39 -04:00
Jeffrey Walton
20def29d33
Use MOVDQU for SSE2 in static transform (Issue 455)
Updated documentation
2017-08-05 00:24:02 -04:00
Jeffrey Walton
de1270656c
Avoid extra ByteReverse when using Intel SHA extensions
This gains about 0.6 cpb. SHA-1 is down to 1.7 to 1.9 cpb. SHA-256 is not affected
2017-05-26 01:51:44 -04:00
Jeffrey Walton
bd7aa155a6 Revert "Avoid extra ByteReverse"
This reverts commit 3b56ba118f. It broke Tiger and SEAL. Arg...
2017-05-25 06:46:40 -04:00
Jeffrey Walton
3b56ba118f
Avoid extra ByteReverse
This gains about 0.6 cpb. SHA-1 is down to 1.9 cpb. SHA-256 is not affected
2017-05-25 06:20:00 -04:00