mirror of
https://github.com/shadps4-emu/ext-cryptopp.git
synced 2024-11-23 18:09:48 +00:00
788cd1794d
This was a latent bug that just surfaced on a Sun Core2 workstation. RDSEED caused an illegal instruction exception on the Core2. It seems we managed to miss it because old processors had family and stepping values so low they never set CPUID.EBX.RDSEED[bit 18] = 1. Newer processors had the feature so CPUID.EBX.RDSEED[bit 18] = 1 was accurate.
739 lines
23 KiB
C++
739 lines
23 KiB
C++
// cpu.cpp - originally written and placed in the public domain by Wei Dai
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#include "pch.h"
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#include "config.h"
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#ifndef EXCEPTION_EXECUTE_HANDLER
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# define EXCEPTION_EXECUTE_HANDLER 1
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#endif
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#ifndef CRYPTOPP_IMPORTS
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#include "cpu.h"
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#include "misc.h"
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#include "stdcpp.h"
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#ifdef _AIX
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# include <sys/systemcfg.h>
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#endif
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#ifdef __linux__
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# include <unistd.h>
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#endif
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// Capability queries, requires Glibc 2.16, http://lwn.net/Articles/519085/
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// CRYPTOPP_GLIBC_VERSION not used because config.h is missing <feature.h>
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#if (((__GLIBC__ * 100) + __GLIBC_MINOR__) >= 216)
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# define CRYPTOPP_GETAUXV_AVAILABLE 1
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#endif
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#if CRYPTOPP_GETAUXV_AVAILABLE
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# include <sys/auxv.h>
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#else
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unsigned long int getauxval(unsigned long int) { return 0; }
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#endif
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#if defined(__APPLE__) && (defined(__aarch64__) || defined(__POWERPC__))
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# include <sys/utsname.h>
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#endif
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// The cpu-features header and source file are located in $ANDROID_NDK_ROOT/sources/android/cpufeatures
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// setenv-android.sh will copy the header and source file into PWD and the makefile will build it in place.
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#if defined(__ANDROID__)
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# include "cpu-features.h"
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#endif
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#ifdef CRYPTOPP_GNU_STYLE_INLINE_ASSEMBLY
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# include <signal.h>
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# include <setjmp.h>
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#endif
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NAMESPACE_BEGIN(CryptoPP)
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#ifndef CRYPTOPP_MS_STYLE_INLINE_ASSEMBLY
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extern "C" {
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typedef void (*SigHandler)(int);
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};
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extern "C"
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{
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static jmp_buf s_jmpNoCPUID;
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static void SigIllHandlerCPUID(int)
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{
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longjmp(s_jmpNoCPUID, 1);
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}
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}
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#endif // Not CRYPTOPP_MS_STYLE_INLINE_ASSEMBLY
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// *************************** IA-32 CPUs ***************************
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#if (CRYPTOPP_BOOL_X86 || CRYPTOPP_BOOL_X32 || CRYPTOPP_BOOL_X64)
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extern bool CPU_ProbeSSE2();
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#if _MSC_VER >= 1500
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inline bool CpuId(word32 func, word32 subfunc, word32 output[4])
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{
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__cpuidex((int *)output, func, subfunc);
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return true;
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}
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#elif _MSC_VER >= 1400 && CRYPTOPP_BOOL_X64
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inline bool CpuId(word32 func, word32 subfunc, word32 output[4])
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{
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if (subfunc != 0)
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return false;
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__cpuid((int *)output, func);
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return true;
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}
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#else
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// Borland/Embarcadero and Issue 498
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// cpu.cpp (131): E2211 Inline assembly not allowed in inline and template functions
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bool CpuId(word32 func, word32 subfunc, word32 output[4])
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{
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#if defined(CRYPTOPP_MS_STYLE_INLINE_ASSEMBLY) || defined(__BORLANDC__)
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__try
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{
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// Borland/Embarcadero and Issue 500
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// Local variables for cpuid output
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word32 a, b, c, d;
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__asm
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{
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mov eax, func
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mov ecx, subfunc
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cpuid
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mov [a], eax
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mov [b], ebx
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mov [c], ecx
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mov [d], edx
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}
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output[0] = a;
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output[1] = b;
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output[2] = c;
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output[3] = d;
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}
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// GetExceptionCode() == EXCEPTION_ILLEGAL_INSTRUCTION
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__except (EXCEPTION_EXECUTE_HANDLER)
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{
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return false;
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}
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// func = 0 returns the highest basic function understood in EAX. If the CPU does
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// not return non-0, then it is mostly useless. The code below converts basic
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// function value to a true/false return value.
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if(func == 0)
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return !!output[0];
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return true;
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#else
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// longjmp and clobber warnings. Volatile is required.
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// http://github.com/weidai11/cryptopp/issues/24 and http://stackoverflow.com/q/7721854
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volatile bool result = true;
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volatile SigHandler oldHandler = signal(SIGILL, SigIllHandlerCPUID);
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if (oldHandler == SIG_ERR)
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return false;
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# ifndef __MINGW32__
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volatile sigset_t oldMask;
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if (sigprocmask(0, NULLPTR, (sigset_t*)&oldMask))
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return false;
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# endif
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if (setjmp(s_jmpNoCPUID))
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result = false;
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else
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{
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asm volatile
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(
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// save ebx in case -fPIC is being used
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// TODO: this might need an early clobber on EDI.
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# if CRYPTOPP_BOOL_X32 || CRYPTOPP_BOOL_X64
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"pushq %%rbx; cpuid; mov %%ebx, %%edi; popq %%rbx"
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# else
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"push %%ebx; cpuid; mov %%ebx, %%edi; pop %%ebx"
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# endif
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: "=a" (output[0]), "=D" (output[1]), "=c" (output[2]), "=d" (output[3])
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: "a" (func), "c" (subfunc)
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: "cc"
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);
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}
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# ifndef __MINGW32__
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sigprocmask(SIG_SETMASK, (sigset_t*)&oldMask, NULLPTR);
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# endif
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signal(SIGILL, oldHandler);
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return result;
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#endif
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}
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#endif
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bool CRYPTOPP_SECTION_INIT g_x86DetectionDone = false;
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bool CRYPTOPP_SECTION_INIT CRYPTOPP_SECTION_INIT g_hasSSE2 = false, CRYPTOPP_SECTION_INIT g_hasSSSE3 = false;
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bool CRYPTOPP_SECTION_INIT g_hasSSE41 = false, CRYPTOPP_SECTION_INIT g_hasSSE42 = false;
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bool CRYPTOPP_SECTION_INIT g_hasAESNI = false, CRYPTOPP_SECTION_INIT g_hasCLMUL = false;
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bool CRYPTOPP_SECTION_INIT g_hasADX = false, CRYPTOPP_SECTION_INIT g_hasSHA = false;
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bool CRYPTOPP_SECTION_INIT g_hasRDRAND = false, CRYPTOPP_SECTION_INIT g_hasRDSEED = false, CRYPTOPP_SECTION_INIT g_isP4 = false;
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bool CRYPTOPP_SECTION_INIT g_hasPadlockRNG = false, CRYPTOPP_SECTION_INIT g_hasPadlockACE = false, CRYPTOPP_SECTION_INIT g_hasPadlockACE2 = false;
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bool CRYPTOPP_SECTION_INIT g_hasPadlockPHE = false, CRYPTOPP_SECTION_INIT g_hasPadlockPMM = false;
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word32 CRYPTOPP_SECTION_INIT g_cacheLineSize = CRYPTOPP_L1_CACHE_LINE_SIZE;
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static inline bool IsIntel(const word32 output[4])
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{
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// This is the "GenuineIntel" string
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return (output[1] /*EBX*/ == 0x756e6547) &&
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(output[2] /*ECX*/ == 0x6c65746e) &&
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(output[3] /*EDX*/ == 0x49656e69);
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}
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static inline bool IsAMD(const word32 output[4])
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{
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// This is the "AuthenticAMD" string. Some early K5's can return "AMDisbetter!"
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return (output[1] /*EBX*/ == 0x68747541) &&
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(output[2] /*ECX*/ == 0x444D4163) &&
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(output[3] /*EDX*/ == 0x69746E65);
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}
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static inline bool IsVIA(const word32 output[4])
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{
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// This is the "CentaurHauls" string. Some non-PadLock's can return "VIA VIA VIA "
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return (output[1] /*EBX*/ == 0x746e6543) &&
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(output[2] /*ECX*/ == 0x736c7561) &&
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(output[3] /*EDX*/ == 0x48727561);
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}
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void DetectX86Features()
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{
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// Coverity finding CID 171239...
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word32 cpuid0[4]={0}, cpuid1[4]={0}, cpuid2[4]={0};
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if (!CpuId(0, 0, cpuid0))
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return;
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if (!CpuId(1, 0, cpuid1))
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return;
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// cpuid1[2] & (1 << 27) is XSAVE/XRESTORE and signals OS support for SSE; use it to avoid probes.
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// See http://github.com/weidai11/cryptopp/issues/511 and http://stackoverflow.com/a/22521619/608639
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if ((cpuid1[3] & (1 << 26)) != 0)
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g_hasSSE2 = (cpuid1[2] & (1 << 27)) || CPU_ProbeSSE2();
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g_hasSSSE3 = g_hasSSE2 && (cpuid1[2] & (1<<9));
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g_hasSSE41 = g_hasSSE2 && (cpuid1[2] & (1<<19));
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g_hasSSE42 = g_hasSSE2 && (cpuid1[2] & (1<<20));
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g_hasAESNI = g_hasSSE2 && (cpuid1[2] & (1<<25));
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g_hasCLMUL = g_hasSSE2 && (cpuid1[2] & (1<<1));
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if (IsIntel(cpuid0))
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{
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CRYPTOPP_CONSTANT(RDRAND_FLAG = (1 << 30))
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CRYPTOPP_CONSTANT(RDSEED_FLAG = (1 << 18))
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CRYPTOPP_CONSTANT( ADX_FLAG = (1 << 19))
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CRYPTOPP_CONSTANT( SHA_FLAG = (1 << 29))
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g_isP4 = ((cpuid1[0] >> 8) & 0xf) == 0xf;
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g_cacheLineSize = 8 * GETBYTE(cpuid1[1], 1);
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g_hasRDRAND = !!(cpuid1[2] /*ECX*/ & RDRAND_FLAG);
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if (cpuid0[0] /*EAX*/ >= 7)
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{
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if (CpuId(7, 0, cpuid2))
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{
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g_hasRDSEED = !!(cpuid2[1] /*EBX*/ & RDSEED_FLAG);
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g_hasADX = !!(cpuid2[1] /*EBX*/ & ADX_FLAG);
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g_hasSHA = !!(cpuid2[1] /*EBX*/ & SHA_FLAG);
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}
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}
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}
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else if (IsAMD(cpuid0))
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{
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CRYPTOPP_CONSTANT(RDRAND_FLAG = (1 << 30))
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CRYPTOPP_CONSTANT(RDSEED_FLAG = (1 << 18))
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CRYPTOPP_CONSTANT( ADX_FLAG = (1 << 19))
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CRYPTOPP_CONSTANT( SHA_FLAG = (1 << 29))
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CpuId(0x80000005, 0, cpuid2);
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g_cacheLineSize = GETBYTE(cpuid2[2], 0);
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g_hasRDRAND = !!(cpuid1[2] /*ECX*/ & RDRAND_FLAG);
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if (cpuid0[0] /*EAX*/ >= 7)
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{
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if (CpuId(7, 0, cpuid2))
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{
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g_hasRDSEED = !!(cpuid2[1] /*EBX*/ & RDSEED_FLAG);
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g_hasADX = !!(cpuid2[1] /*EBX*/ & ADX_FLAG);
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g_hasSHA = !!(cpuid2[1] /*EBX*/ & SHA_FLAG);
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}
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}
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}
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else if (IsVIA(cpuid0))
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{
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CRYPTOPP_CONSTANT( RNG_FLAGS = (0x3 << 2))
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CRYPTOPP_CONSTANT( ACE_FLAGS = (0x3 << 6))
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CRYPTOPP_CONSTANT(ACE2_FLAGS = (0x3 << 8))
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CRYPTOPP_CONSTANT( PHE_FLAGS = (0x3 << 10))
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CRYPTOPP_CONSTANT( PMM_FLAGS = (0x3 << 12))
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CpuId(0xC0000000, 0, cpuid2);
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if (cpuid2[0] >= 0xC0000001)
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{
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// Extended features available
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CpuId(0xC0000001, 0, cpuid2);
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g_hasPadlockRNG = !!(cpuid2[3] /*EDX*/ & RNG_FLAGS);
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g_hasPadlockACE = !!(cpuid2[3] /*EDX*/ & ACE_FLAGS);
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g_hasPadlockACE2 = !!(cpuid2[3] /*EDX*/ & ACE2_FLAGS);
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g_hasPadlockPHE = !!(cpuid2[3] /*EDX*/ & PHE_FLAGS);
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g_hasPadlockPMM = !!(cpuid2[3] /*EDX*/ & PMM_FLAGS);
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}
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}
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if (!g_cacheLineSize)
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g_cacheLineSize = CRYPTOPP_L1_CACHE_LINE_SIZE;
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*const_cast<volatile bool*>(&g_x86DetectionDone) = true;
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}
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// *************************** ARM-32, Aarch32 and Aarch64 ***************************
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#elif (CRYPTOPP_BOOL_ARM32 || CRYPTOPP_BOOL_ARM64)
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bool CRYPTOPP_SECTION_INIT g_ArmDetectionDone = false;
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bool CRYPTOPP_SECTION_INIT g_hasNEON = false, CRYPTOPP_SECTION_INIT g_hasPMULL = false, CRYPTOPP_SECTION_INIT g_hasCRC32 = false;
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bool CRYPTOPP_SECTION_INIT g_hasAES = false, CRYPTOPP_SECTION_INIT g_hasSHA1 = false, CRYPTOPP_SECTION_INIT g_hasSHA2 = false;
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word32 CRYPTOPP_SECTION_INIT g_cacheLineSize = CRYPTOPP_L1_CACHE_LINE_SIZE;
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// ARM does not have an unprivliged equivalent to CPUID on IA-32. We have to jump through some
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// hoops to detect features on a wide array of platforms. Our strategy is two part. First,
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// attempt to *Query* the OS for a feature, like using getauxval on Linux. If that fails,
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// then *Probe* the cpu executing an instruction and an observe a SIGILL if unsupported.
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// The probes are in source files where compilation options like -march=armv8-a+crc make
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// intrinsics available. They are expensive when compared to a standard OS feature query.
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// Always perform the feature quesry first. For Linux see
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// http://sourceware.org/ml/libc-help/2017-08/msg00012.html
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// Avoid probes on Apple platforms because Apple's signal handling for SIGILLs appears broken.
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// We are trying to figure out a way to feature test without probes. Also see
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// http://stackoverflow.com/a/11197770/608639 and
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// http://gist.github.com/erkanyildiz/390a480f27e86f8cd6ba
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extern bool CPU_ProbeNEON();
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extern bool CPU_ProbeCRC32();
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extern bool CPU_ProbeAES();
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extern bool CPU_ProbeSHA1();
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extern bool CPU_ProbeSHA2();
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extern bool CPU_ProbePMULL();
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#ifndef HWCAP_ASIMD
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# define HWCAP_ASIMD (1 << 1)
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#endif
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#ifndef HWCAP_ARM_NEON
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# define HWCAP_ARM_NEON 4096
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#endif
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#ifndef HWCAP_CRC32
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# define HWCAP_CRC32 (1 << 7)
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#endif
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#ifndef HWCAP2_CRC32
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# define HWCAP2_CRC32 (1 << 4)
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#endif
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#ifndef HWCAP_PMULL
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# define HWCAP_PMULL (1 << 4)
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#endif
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#ifndef HWCAP2_PMULL
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# define HWCAP2_PMULL (1 << 1)
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#endif
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#ifndef HWCAP_AES
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# define HWCAP_AES (1 << 3)
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#endif
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#ifndef HWCAP2_AES
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# define HWCAP2_AES (1 << 0)
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#endif
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#ifndef HWCAP_SHA1
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# define HWCAP_SHA1 (1 << 5)
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#endif
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#ifndef HWCAP_SHA2
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# define HWCAP_SHA2 (1 << 6)
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#endif
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#ifndef HWCAP2_SHA1
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# define HWCAP2_SHA1 (1 << 2)
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#endif
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#ifndef HWCAP2_SHA2
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# define HWCAP2_SHA2 (1 << 3)
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#endif
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inline bool CPU_QueryNEON()
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{
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#if defined(__ANDROID__) && defined(__aarch64__)
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if ((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM64) &&
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(android_getCpuFeatures() & ANDROID_CPU_ARM64_FEATURE_ASIMD))
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return true;
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#elif defined(__ANDROID__) && defined(__arm__)
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if ((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM) &&
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(android_getCpuFeatures() & ANDROID_CPU_ARM_FEATURE_NEON))
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return true;
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#elif defined(__linux__) && defined(__aarch64__)
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if (getauxval(AT_HWCAP) & HWCAP_ASIMD)
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return true;
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#elif defined(__linux__) && defined(__aarch32__)
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if (getauxval(AT_HWCAP2) & HWCAP2_ASIMD)
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return true;
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#elif defined(__linux__) && defined(__arm__)
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if (getauxval(AT_HWCAP) & HWCAP_ARM_NEON)
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return true;
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#elif defined(__APPLE__) && defined(__aarch64__)
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// Core feature set for Aarch32 and Aarch64.
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return true;
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#endif
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return false;
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}
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inline bool CPU_QueryCRC32()
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{
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#if defined(__ANDROID__) && defined(__aarch64__)
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if ((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM64) &&
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(android_getCpuFeatures() & ANDROID_CPU_ARM64_FEATURE_CRC32))
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return true;
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#elif defined(__ANDROID__) && defined(__aarch32__)
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if ((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM) &&
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(android_getCpuFeatures() & ANDROID_CPU_ARM_FEATURE_CRC32))
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return true;
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#elif defined(__linux__) && defined(__aarch64__)
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if (getauxval(AT_HWCAP) & HWCAP_CRC32)
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return true;
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#elif defined(__linux__) && defined(__aarch32__)
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if (getauxval(AT_HWCAP2) & HWCAP2_CRC32)
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return true;
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#elif defined(__APPLE__) && defined(__aarch64__)
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// No compiler support. CRC intrinsics result in a failed compiled.
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return false;
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#endif
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return false;
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}
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inline bool CPU_QueryPMULL()
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{
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#if defined(__ANDROID__) && defined(__aarch64__)
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if ((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM64) &&
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(android_getCpuFeatures() & ANDROID_CPU_ARM64_FEATURE_PMULL))
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return true;
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#elif defined(__ANDROID__) && defined(__aarch32__)
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if ((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM) &&
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(android_getCpuFeatures() & ANDROID_CPU_ARM_FEATURE_PMULL))
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return true;
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#elif defined(__linux__) && defined(__aarch64__)
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if (getauxval(AT_HWCAP) & HWCAP_PMULL)
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return true;
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#elif defined(__linux__) && defined(__aarch32__)
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if (getauxval(AT_HWCAP2) & HWCAP2_PMULL)
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return true;
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#elif defined(__APPLE__) && defined(__aarch64__)
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// No compiler support. PMULL intrinsics result in a failed compiled.
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return false;
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#endif
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return false;
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}
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|
inline bool CPU_QueryAES()
|
|
{
|
|
#if defined(__ANDROID__) && defined(__aarch64__)
|
|
if ((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM64) &&
|
|
(android_getCpuFeatures() & ANDROID_CPU_ARM64_FEATURE_AES))
|
|
return true;
|
|
#elif defined(__ANDROID__) && defined(__aarch32__)
|
|
if ((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM) &&
|
|
(android_getCpuFeatures() & ANDROID_CPU_ARM_FEATURE_AES))
|
|
return true;
|
|
#elif defined(__linux__) && defined(__aarch64__)
|
|
if (getauxval(AT_HWCAP) & HWCAP_AES)
|
|
return true;
|
|
#elif defined(__linux__) && defined(__aarch32__)
|
|
if (getauxval(AT_HWCAP2) & HWCAP2_AES)
|
|
return true;
|
|
#elif defined(__APPLE__) && defined(__aarch64__)
|
|
// http://stackoverflow.com/questions/45637888/how-to-determine-armv8-features-at-runtime-on-ios
|
|
struct utsname systemInfo;
|
|
systemInfo.machine[0] = '\0';
|
|
uname(&systemInfo);
|
|
|
|
// The machine strings below are known ARM8 devices
|
|
std::string machine(systemInfo.machine);
|
|
if (machine.substr(0, 7) == "iPhone6" || machine.substr(0, 7) == "iPhone7" ||
|
|
machine.substr(0, 7) == "iPhone8" || machine.substr(0, 7) == "iPhone9" ||
|
|
machine.substr(0, 5) == "iPad4" || machine.substr(0, 5) == "iPad5" ||
|
|
machine.substr(0, 5) == "iPad6" || machine.substr(0, 5) == "iPad7")
|
|
{
|
|
return true;
|
|
}
|
|
#endif
|
|
return false;
|
|
}
|
|
|
|
inline bool CPU_QuerySHA1()
|
|
{
|
|
#if defined(__ANDROID__) && defined(__aarch64__)
|
|
if ((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM64) &&
|
|
(android_getCpuFeatures() & ANDROID_CPU_ARM64_FEATURE_SHA1))
|
|
return true;
|
|
#elif defined(__ANDROID__) && defined(__aarch32__)
|
|
if ((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM) &&
|
|
(android_getCpuFeatures() & ANDROID_CPU_ARM_FEATURE_SHA1))
|
|
return true;
|
|
#elif defined(__linux__) && defined(__aarch64__)
|
|
if (getauxval(AT_HWCAP) & HWCAP_SHA1)
|
|
return true;
|
|
#elif defined(__linux__) && defined(__aarch32__)
|
|
if (getauxval(AT_HWCAP2) & HWCAP2_SHA1)
|
|
return true;
|
|
#elif defined(__APPLE__) && defined(__aarch64__)
|
|
// http://stackoverflow.com/questions/45637888/how-to-determine-armv8-features-at-runtime-on-ios
|
|
struct utsname systemInfo;
|
|
systemInfo.machine[0] = '\0';
|
|
uname(&systemInfo);
|
|
|
|
// The machine strings below are known ARM8 devices
|
|
std::string machine(systemInfo.machine);
|
|
if (machine.substr(0, 7) == "iPhone6" || machine.substr(0, 7) == "iPhone7" ||
|
|
machine.substr(0, 7) == "iPhone8" || machine.substr(0, 7) == "iPhone9" ||
|
|
machine.substr(0, 5) == "iPad4" || machine.substr(0, 5) == "iPad5" ||
|
|
machine.substr(0, 5) == "iPad6" || machine.substr(0, 5) == "iPad7")
|
|
{
|
|
return true;
|
|
}
|
|
#endif
|
|
return false;
|
|
}
|
|
|
|
inline bool CPU_QuerySHA2()
|
|
{
|
|
#if defined(__ANDROID__) && defined(__aarch64__)
|
|
if ((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM64) &&
|
|
(android_getCpuFeatures() & ANDROID_CPU_ARM64_FEATURE_SHA2))
|
|
return true;
|
|
#elif defined(__ANDROID__) && defined(__aarch32__)
|
|
if ((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM) &&
|
|
(android_getCpuFeatures() & ANDROID_CPU_ARM_FEATURE_SHA2))
|
|
return true;
|
|
#elif defined(__linux__) && defined(__aarch64__)
|
|
if (getauxval(AT_HWCAP) & HWCAP_SHA2)
|
|
return true;
|
|
#elif defined(__linux__) && defined(__aarch32__)
|
|
if (getauxval(AT_HWCAP2) & HWCAP2_SHA2)
|
|
return true;
|
|
#elif defined(__APPLE__) && defined(__aarch64__)
|
|
// http://stackoverflow.com/questions/45637888/how-to-determine-armv8-features-at-runtime-on-ios
|
|
struct utsname systemInfo;
|
|
systemInfo.machine[0] = '\0';
|
|
uname(&systemInfo);
|
|
|
|
// The machine strings below are known ARM8 devices
|
|
std::string machine(systemInfo.machine);
|
|
if (machine.substr(0, 7) == "iPhone6" || machine.substr(0, 7) == "iPhone7" ||
|
|
machine.substr(0, 7) == "iPhone8" || machine.substr(0, 7) == "iPhone9" ||
|
|
machine.substr(0, 5) == "iPad4" || machine.substr(0, 5) == "iPad5" ||
|
|
machine.substr(0, 5) == "iPad6" || machine.substr(0, 5) == "iPad7")
|
|
{
|
|
return true;
|
|
}
|
|
#endif
|
|
return false;
|
|
}
|
|
|
|
void DetectArmFeatures()
|
|
{
|
|
// The CPU_ProbeXXX's return false for OSes which
|
|
// can't tolerate SIGILL-based probes
|
|
g_hasNEON = CPU_QueryNEON() || CPU_ProbeNEON();
|
|
g_hasCRC32 = CPU_QueryCRC32() || CPU_ProbeCRC32();
|
|
g_hasPMULL = CPU_QueryPMULL() || CPU_ProbePMULL();
|
|
g_hasAES = CPU_QueryAES() || CPU_ProbeAES();
|
|
g_hasSHA1 = CPU_QuerySHA1() || CPU_ProbeSHA1();
|
|
g_hasSHA2 = CPU_QuerySHA2() || CPU_ProbeSHA2();
|
|
|
|
#if defined(__linux__) && defined(_SC_LEVEL1_DCACHE_LINESIZE)
|
|
g_cacheLineSize = sysconf(_SC_LEVEL1_DCACHE_LINESIZE);
|
|
#endif
|
|
|
|
if (!g_cacheLineSize)
|
|
g_cacheLineSize = CRYPTOPP_L1_CACHE_LINE_SIZE;
|
|
|
|
*const_cast<volatile bool*>(&g_ArmDetectionDone) = true;
|
|
}
|
|
|
|
// *************************** PowerPC and PowerPC64 ***************************
|
|
|
|
#elif (CRYPTOPP_BOOL_PPC32 || CRYPTOPP_BOOL_PPC64)
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_PowerpcDetectionDone = false;
|
|
bool CRYPTOPP_SECTION_INIT g_hasAltivec = false, CRYPTOPP_SECTION_INIT g_hasPower7 = false, CRYPTOPP_SECTION_INIT g_hasPower8 = false;
|
|
bool CRYPTOPP_SECTION_INIT g_hasAES = false, CRYPTOPP_SECTION_INIT g_hasSHA256 = false, CRYPTOPP_SECTION_INIT g_hasSHA512 = false;
|
|
word32 CRYPTOPP_SECTION_INIT g_cacheLineSize = CRYPTOPP_L1_CACHE_LINE_SIZE;
|
|
|
|
extern bool CPU_ProbeAltivec();
|
|
extern bool CPU_ProbePower7();
|
|
extern bool CPU_ProbePower8();
|
|
extern bool CPU_ProbeAES();
|
|
extern bool CPU_ProbeSHA256();
|
|
extern bool CPU_ProbeSHA512();
|
|
|
|
#ifndef PPC_FEATURE_HAS_ALTIVEC
|
|
# define PPC_FEATURE_HAS_ALTIVEC 0x10000000
|
|
#endif
|
|
#ifndef PPC_FEATURE_ARCH_2_06
|
|
# define PPC_FEATURE_ARCH_2_06 0x00000100
|
|
#endif
|
|
#ifndef PPC_FEATURE2_ARCH_2_07
|
|
# define PPC_FEATURE2_ARCH_2_07 0x80000000
|
|
#endif
|
|
#ifndef PPC_FEATURE2_VEC_CRYPTO
|
|
# define PPC_FEATURE2_VEC_CRYPTO 0x02000000
|
|
#endif
|
|
|
|
inline bool CPU_QueryAltivec()
|
|
{
|
|
#if defined(__linux__)
|
|
if (getauxval(AT_HWCAP) & PPC_FEATURE_HAS_ALTIVEC)
|
|
return true;
|
|
#elif defined(__APPLE__) && defined(__POWERPC__)
|
|
// http://stackoverflow.com/questions/45637888/how-to-determine-armv8-features-at-runtime-on-ios
|
|
struct utsname systemInfo;
|
|
systemInfo.machine[0] = '\0';
|
|
uname(&systemInfo);
|
|
|
|
// The machine strings below are known PPC machines
|
|
std::string machine(systemInfo.machine);
|
|
if (machine.substr(0, 15) == "Power Macintosh")
|
|
{
|
|
return true;
|
|
}
|
|
#endif
|
|
return false;
|
|
}
|
|
|
|
inline bool CPU_QueryPower7()
|
|
{
|
|
// Power7 and ISA 2.06
|
|
#if defined(__linux__)
|
|
if (getauxval(AT_HWCAP2) & PPC_FEATURE_ARCH_2_06)
|
|
return true;
|
|
#endif
|
|
return false;
|
|
}
|
|
|
|
inline bool CPU_QueryPower8()
|
|
{
|
|
// Power8 and ISA 2.07 provide in-core crypto.
|
|
#if defined(__linux__)
|
|
if (getauxval(AT_HWCAP2) & PPC_FEATURE2_ARCH_2_07)
|
|
return true;
|
|
#endif
|
|
return false;
|
|
}
|
|
|
|
inline bool CPU_QueryAES()
|
|
{
|
|
// Power8 and ISA 2.07 provide in-core crypto. Glibc
|
|
// 2.24 or higher is required for PPC_FEATURE2_VEC_CRYPTO.
|
|
#if defined(__linux__)
|
|
if (getauxval(AT_HWCAP2) & PPC_FEATURE2_VEC_CRYPTO)
|
|
return true;
|
|
//if (getauxval(AT_HWCAP2) & PPC_FEATURE2_ARCH_2_07)
|
|
// return true;
|
|
#endif
|
|
return false;
|
|
}
|
|
|
|
inline bool CPU_QuerySHA256()
|
|
{
|
|
// Power8 and ISA 2.07 provide in-core crypto. Glibc
|
|
// 2.24 or higher is required for PPC_FEATURE2_VEC_CRYPTO.
|
|
#if defined(__linux__)
|
|
if (getauxval(AT_HWCAP2) & PPC_FEATURE2_VEC_CRYPTO)
|
|
return true;
|
|
//if (getauxval(AT_HWCAP2) & PPC_FEATURE2_ARCH_2_07)
|
|
// return true;
|
|
#endif
|
|
return false;
|
|
}
|
|
inline bool CPU_QuerySHA512()
|
|
{
|
|
// Power8 and ISA 2.07 provide in-core crypto. Glibc
|
|
// 2.24 or higher is required for PPC_FEATURE2_VEC_CRYPTO.
|
|
#if defined(__linux__)
|
|
if (getauxval(AT_HWCAP2) & PPC_FEATURE2_VEC_CRYPTO)
|
|
return true;
|
|
//if (getauxval(AT_HWCAP2) & PPC_FEATURE2_ARCH_2_07)
|
|
// return true;
|
|
#endif
|
|
return false;
|
|
}
|
|
|
|
void DetectPowerpcFeatures()
|
|
{
|
|
// The CPU_ProbeXXX's return false for OSes which
|
|
// can't tolerate SIGILL-based probes, like Apple
|
|
g_hasAltivec = CPU_QueryAltivec() || CPU_ProbeAltivec();
|
|
g_hasPower7 = CPU_QueryPower7() || CPU_ProbePower7();
|
|
g_hasPower8 = CPU_QueryPower8() || CPU_ProbePower8();
|
|
//g_hasPMULL = CPU_QueryPMULL() || CPU_ProbePMULL();
|
|
g_hasAES = CPU_QueryAES() || CPU_ProbeAES();
|
|
g_hasSHA256 = CPU_QuerySHA256() || CPU_ProbeSHA256();
|
|
g_hasSHA512 = CPU_QuerySHA512() || CPU_ProbeSHA512();
|
|
|
|
#if defined(_AIX)
|
|
// /usr/include/sys/systemcfg.h
|
|
g_cacheLineSize = getsystemcfg(SC_L1C_DLS);
|
|
#elif defined(__linux__) && defined(_SC_LEVEL1_DCACHE_LINESIZE)
|
|
// GCC112 CentOS 7 returns 0?
|
|
g_cacheLineSize = sysconf(_SC_LEVEL1_DCACHE_LINESIZE);
|
|
#endif
|
|
|
|
if (g_cacheLineSize <= 0)
|
|
g_cacheLineSize = CRYPTOPP_L1_CACHE_LINE_SIZE;
|
|
|
|
*const_cast<volatile bool*>(&g_PowerpcDetectionDone) = true;
|
|
}
|
|
|
|
#endif
|
|
NAMESPACE_END
|
|
|
|
// *************************** C++ Static Initialization ***************************
|
|
|
|
ANONYMOUS_NAMESPACE_BEGIN
|
|
|
|
class InitCpu
|
|
{
|
|
public:
|
|
InitCpu()
|
|
{
|
|
#if CRYPTOPP_BOOL_X86 || CRYPTOPP_BOOL_X32 || CRYPTOPP_BOOL_X64
|
|
CryptoPP::DetectX86Features();
|
|
#elif CRYPTOPP_BOOL_ARM32 || CRYPTOPP_BOOL_ARM64
|
|
CryptoPP::DetectArmFeatures();
|
|
#elif CRYPTOPP_BOOL_PPC32 || CRYPTOPP_BOOL_PPC64
|
|
CryptoPP::DetectPowerpcFeatures();
|
|
#endif
|
|
}
|
|
};
|
|
|
|
// This is not really needed because HasSSE() and friends can dynamically initialize.
|
|
// Everything depends on CPU features so we initialize it once at load time.
|
|
// Dynamic initialization will be used if init priorities are not available.
|
|
|
|
#if HAVE_GCC_INIT_PRIORITY
|
|
const InitCpu s_init __attribute__ ((init_priority (CRYPTOPP_INIT_PRIORITY + 10))) = InitCpu();
|
|
#elif HAVE_MSC_INIT_PRIORITY
|
|
#pragma warning(disable: 4075)
|
|
#pragma init_seg(".CRT$XCU")
|
|
const InitCpu s_init;
|
|
#pragma warning(default: 4075)
|
|
#else
|
|
const InitCpu s_init;
|
|
#endif
|
|
|
|
ANONYMOUS_NAMESPACE_END
|
|
|
|
#endif // CRYPTOPP_IMPORTS
|