mirror of
https://github.com/shadps4-emu/ext-cryptopp.git
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602 lines
18 KiB
C
602 lines
18 KiB
C
// cpu.h - written and placed in the public domain by Wei Dai
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//! \file cpu.h
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//! \brief Functions for CPU features and intrinsics
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//! \details At the moment, the functions are used heavily in X86/X32/X64 code paths
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// for SSE, SSE2 and SSE4. The funtions are also used on occassion for AArch32
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//! and AArch64 code paths for NEON.
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#ifndef CRYPTOPP_CPU_H
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#define CRYPTOPP_CPU_H
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#include "config.h"
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#if (CRYPTOPP_BOOL_ARM32 || CRYPTOPP_BOOL_ARM64)
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# if defined(_MSC_VER) || defined(__BORLANDC__)
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# define CRYPTOPP_MS_STYLE_INLINE_ASSEMBLY
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# else
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# define CRYPTOPP_GNU_STYLE_INLINE_ASSEMBLY
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# endif
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# if CRYPTOPP_BOOL_NEON_INTRINSICS_AVAILABLE
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# include <arm_neon.h>
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# endif
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# if (CRYPTOPP_BOOL_ARM_CRYPTO_INTRINSICS_AVAILABLE || CRYPTOPP_BOOL_ARM_CRC32_INTRINSICS_AVAILABLE)
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# include <stdint.h>
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# if (defined(__ARM_ACLE) || defined(__GNUC__)) && !defined(__APPLE__)
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# include <arm_acle.h>
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# endif
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# endif
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#endif // ARM-32 or ARM-64
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#ifdef CRYPTOPP_GENERATE_X64_MASM
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#define CRYPTOPP_X86_ASM_AVAILABLE
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#define CRYPTOPP_BOOL_X64 1
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#define CRYPTOPP_BOOL_SSE2_ASM_AVAILABLE 1
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#define NAMESPACE_END
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#else
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# if CRYPTOPP_BOOL_SSE2_INTRINSICS_AVAILABLE
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# include <emmintrin.h>
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# endif
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#if CRYPTOPP_BOOL_AESNI_INTRINSICS_AVAILABLE
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// GCC 5.3/i686 fails to declare __m128 in the headers we use when compiling with -std=c++11 or -std=c++14.
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// Consequently, our _mm_shuffle_epi8, _mm_extract_epi32, etc fails to compile.
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#if defined(__has_include)
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# if __has_include(<xmmintrin.h>)
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# include <xmmintrin.h>
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# endif
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#endif
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// PUSHFB needs Clang 3.3 and Apple Clang 5.0.
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#if !defined(__GNUC__) || defined(__SSSE3__)|| defined(__INTEL_COMPILER) || (CRYPTOPP_CLANG_VERSION >= 30300) || (CRYPTOPP_APPLE_CLANG_VERSION >= 50000)
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#include <tmmintrin.h>
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#else
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NAMESPACE_BEGIN(CryptoPP)
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__inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_shuffle_epi8 (__m128i a, __m128i b)
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{
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asm ("pshufb %1, %0" : "+x"(a) : "xm"(b));
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return a;
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}
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NAMESPACE_END
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#endif // tmmintrin.h
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// PEXTRD needs Clang 3.3 and Apple Clang 5.0.
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#if !defined(__GNUC__) || defined(__SSE4_1__)|| defined(__INTEL_COMPILER) || (CRYPTOPP_CLANG_VERSION >= 30300) || (CRYPTOPP_APPLE_CLANG_VERSION >= 50000)
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#include <smmintrin.h>
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#else
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NAMESPACE_BEGIN(CryptoPP)
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__inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_extract_epi32 (__m128i a, const int i)
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{
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int r;
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asm ("pextrd %2, %1, %0" : "=rm"(r) : "x"(a), "i"(i));
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return r;
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}
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__inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_insert_epi32 (__m128i a, int b, const int i)
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{
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asm ("pinsrd %2, %1, %0" : "+x"(a) : "rm"(b), "i"(i));
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return a;
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}
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NAMESPACE_END
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#endif // smmintrin.h
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// AES needs Clang 2.8 and Apple Clang 4.6. PCLMUL needs Clang 3.4 and Apple Clang 6.0
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#if !defined(__GNUC__) || (defined(__AES__) && defined(__PCLMUL__)) || defined(__INTEL_COMPILER) || (CRYPTOPP_CLANG_VERSION >= 30400) || (CRYPTOPP_APPLE_CLANG_VERSION >= 60000)
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#include <wmmintrin.h>
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#else
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NAMESPACE_BEGIN(CryptoPP)
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__inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_clmulepi64_si128 (__m128i a, __m128i b, const int i)
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{
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asm ("pclmulqdq %2, %1, %0" : "+x"(a) : "xm"(b), "i"(i));
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return a;
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}
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__inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_aeskeygenassist_si128 (__m128i a, const int i)
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{
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__m128i r;
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asm ("aeskeygenassist %2, %1, %0" : "=x"(r) : "xm"(a), "i"(i));
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return r;
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}
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__inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_aesimc_si128 (__m128i a)
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{
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__m128i r;
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asm ("aesimc %1, %0" : "=x"(r) : "xm"(a));
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return r;
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}
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__inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_aesenc_si128 (__m128i a, __m128i b)
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{
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asm ("aesenc %1, %0" : "+x"(a) : "xm"(b));
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return a;
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}
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__inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_aesenclast_si128 (__m128i a, __m128i b)
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{
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asm ("aesenclast %1, %0" : "+x"(a) : "xm"(b));
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return a;
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}
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__inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_aesdec_si128 (__m128i a, __m128i b)
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{
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asm ("aesdec %1, %0" : "+x"(a) : "xm"(b));
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return a;
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}
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__inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_aesdeclast_si128 (__m128i a, __m128i b)
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{
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asm ("aesdeclast %1, %0" : "+x"(a) : "xm"(b));
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return a;
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}
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NAMESPACE_END
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#endif // wmmintrin.h
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#endif // CRYPTOPP_BOOL_AESNI_INTRINSICS_AVAILABLE
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NAMESPACE_BEGIN(CryptoPP)
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#if CRYPTOPP_BOOL_X86 || CRYPTOPP_BOOL_X32 || CRYPTOPP_BOOL_X64
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#define CRYPTOPP_CPUID_AVAILABLE
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// these should not be used directly
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extern CRYPTOPP_DLL bool g_x86DetectionDone;
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extern CRYPTOPP_DLL bool g_hasMMX;
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extern CRYPTOPP_DLL bool g_hasISSE;
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extern CRYPTOPP_DLL bool g_hasSSE2;
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extern CRYPTOPP_DLL bool g_hasSSSE3;
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extern CRYPTOPP_DLL bool g_hasSSE4;
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extern CRYPTOPP_DLL bool g_hasAESNI;
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extern CRYPTOPP_DLL bool g_hasCLMUL;
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extern CRYPTOPP_DLL bool g_isP4;
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extern CRYPTOPP_DLL bool g_hasRDRAND;
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extern CRYPTOPP_DLL bool g_hasRDSEED;
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extern CRYPTOPP_DLL bool g_hasPadlockRNG;
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extern CRYPTOPP_DLL bool g_hasPadlockACE;
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extern CRYPTOPP_DLL bool g_hasPadlockACE2;
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extern CRYPTOPP_DLL bool g_hasPadlockPHE;
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extern CRYPTOPP_DLL bool g_hasPadlockPMM;
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extern CRYPTOPP_DLL word32 g_cacheLineSize;
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CRYPTOPP_DLL void CRYPTOPP_API DetectX86Features();
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CRYPTOPP_DLL bool CRYPTOPP_API CpuId(word32 input, word32 output[4]);
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inline bool HasMMX()
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{
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#if CRYPTOPP_BOOL_X64
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return true;
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#else
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if (!g_x86DetectionDone)
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DetectX86Features();
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return g_hasMMX;
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#endif
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}
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inline bool HasISSE()
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{
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#if CRYPTOPP_BOOL_X64
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return true;
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#else
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if (!g_x86DetectionDone)
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DetectX86Features();
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return g_hasISSE;
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#endif
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}
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inline bool HasSSE2()
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{
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#if CRYPTOPP_BOOL_X64
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return true;
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#else
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if (!g_x86DetectionDone)
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DetectX86Features();
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return g_hasSSE2;
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#endif
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}
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inline bool HasSSSE3()
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{
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if (!g_x86DetectionDone)
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DetectX86Features();
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return g_hasSSSE3;
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}
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inline bool HasSSE4()
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{
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if (!g_x86DetectionDone)
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DetectX86Features();
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return g_hasSSE4;
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}
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inline bool HasAESNI()
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{
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if (!g_x86DetectionDone)
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DetectX86Features();
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return g_hasAESNI;
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}
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inline bool HasCLMUL()
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{
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if (!g_x86DetectionDone)
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DetectX86Features();
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return g_hasCLMUL;
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}
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inline bool IsP4()
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{
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if (!g_x86DetectionDone)
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DetectX86Features();
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return g_isP4;
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}
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inline bool HasRDRAND()
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{
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if (!g_x86DetectionDone)
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DetectX86Features();
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return g_hasRDRAND;
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}
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inline bool HasRDSEED()
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{
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if (!g_x86DetectionDone)
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DetectX86Features();
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return g_hasRDSEED;
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}
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inline bool HasPadlockRNG()
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{
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if (!g_x86DetectionDone)
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DetectX86Features();
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return g_hasPadlockRNG;
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}
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inline bool HasPadlockACE()
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{
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if (!g_x86DetectionDone)
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DetectX86Features();
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return g_hasPadlockACE;
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}
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inline bool HasPadlockACE2()
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{
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if (!g_x86DetectionDone)
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DetectX86Features();
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return g_hasPadlockACE2;
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}
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inline bool HasPadlockPHE()
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{
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if (!g_x86DetectionDone)
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DetectX86Features();
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return g_hasPadlockPHE;
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}
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inline bool HasPadlockPMM()
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{
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if (!g_x86DetectionDone)
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DetectX86Features();
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return g_hasPadlockPMM;
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}
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inline int GetCacheLineSize()
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{
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if (!g_x86DetectionDone)
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DetectX86Features();
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return g_cacheLineSize;
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}
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#elif (CRYPTOPP_BOOL_ARM32 || CRYPTOPP_BOOL_ARM64)
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extern bool g_ArmDetectionDone;
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extern bool g_hasNEON, g_hasCRC32, g_hasAES, g_hasSHA1, g_hasSHA2;
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void CRYPTOPP_API DetectArmFeatures();
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//! \brief Determine if an ARM processor has Advanced SIMD available
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//! \returns true if the hardware is capable of Advanced SIMD at runtime, false otherwise.
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//! \details Advanced SIMD instructions are available under Aarch64 (ARM-64) and Aarch32 (ARM-32).
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//! \details Runtime support requires compile time support. When compiling with GCC, you may
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//! need to compile with <tt>-mfpu=neon</tt> (32-bit) or <tt>-march=armv8-a</tt>
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//! (64-bit). Also see ARM's <tt>__ARM_NEON</tt> preprocessor macro.
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inline bool HasNEON()
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{
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if (!g_ArmDetectionDone)
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DetectArmFeatures();
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return g_hasNEON;
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}
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//! \brief Determine if an ARM processor has CRC32 available
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//! \returns true if the hardware is capable of CRC32 at runtime, false otherwise.
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//! \details CRC32 instructions provide access to the processor's CRC32 and CRC32-C intructions.
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//! They are provided by ARM C Language Extensions 2.0 (ACLE 2.0) and available under Aarch64
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//! (ARM-64) and Aarch32 (ARM-32) running on Aarch64 (i.e., an AArch32 execution environment).
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//! \details Runtime support requires compile time support. When compiling with GCC, you may
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//! need to compile with <tt>-march=armv8-a+crc</tt>; while Apple requires
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//! <tt>-arch arm64</tt>. Also see ARM's <tt>__ARM_FEATURE_CRC32</tt> preprocessor macro.
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inline bool HasCRC32()
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{
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if (!g_ArmDetectionDone)
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DetectArmFeatures();
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return g_hasCRC32;
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}
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//! \brief Determine if an ARM processor has AES available
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//! \returns true if the hardware is capable of AES at runtime, false otherwise.
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//! \details AES is part of the Crypto extensions from ARM C Language Extensions 2.0 (ACLE 2.0)
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//! and available under Aarch64 (ARM-64) and Aarch32 (ARM-32) running on Aarch64 (i.e., an
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//! AArch32 execution environment).
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//! \details Runtime support requires compile time support. When compiling with GCC, you may
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//! need to compile with <tt>-march=armv8-a+crypto</tt>; while Apple requires
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//! <tt>-arch arm64</tt>. Also see ARM's <tt>__ARM_FEATURE_CRYPTO</tt> preprocessor macro.
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inline bool HasAES()
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{
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if (!g_ArmDetectionDone)
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DetectArmFeatures();
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return g_hasAES;
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}
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//! \brief Determine if an ARM processor has SHA1 available
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//! \returns true if the hardware is capable of SHA1 at runtime, false otherwise.
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//! \details SHA1 is part of the Crypto extensions from ARM C Language Extensions 2.0 (ACLE 2.0)
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//! and available under Aarch64 (ARM-64) and Aarch32 (ARM-32) running on Aarch64 (i.e., an
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//! AArch32 execution environment).
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//! \details Runtime support requires compile time support. When compiling with GCC, you may
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//! need to compile with <tt>-march=armv8-a+crypto</tt>; while Apple requires
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//! <tt>-arch arm64</tt>. Also see ARM's <tt>__ARM_FEATURE_CRYPTO</tt> preprocessor macro.
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inline bool HasSHA1()
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{
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if (!g_ArmDetectionDone)
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DetectArmFeatures();
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return g_hasSHA1;
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}
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//! \brief Determine if an ARM processor has SHA2 available
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//! \returns true if the hardware is capable of SHA2 at runtime, false otherwise.
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//! \details SHA2 is part of the Crypto extensions from ARM C Language Extensions 2.0 (ACLE 2.0)
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//! and available under Aarch64 (ARM-64) and Aarch32 (ARM-32) running on Aarch64 (i.e., an
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//! AArch32 execution environment).
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//! \details Runtime support requires compile time support. When compiling with GCC, you may
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//! need to compile with <tt>-march=armv8-a+crypto</tt>; while Apple requires
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//! <tt>-arch arm64</tt>. Also see ARM's <tt>__ARM_FEATURE_CRYPTO</tt> preprocessor macro.
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inline bool HasSHA2()
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{
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if (!g_ArmDetectionDone)
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DetectArmFeatures();
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return g_hasSHA2;
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}
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//! \brief Provides the cache line size at runtime
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//! \returns true if the hardware is capable of CRC32 at runtime, false otherwise.
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//! \details GetCacheLineSize() provides is an estimate using CRYPTOPP_L1_CACHE_LINE_SIZE.
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//! The runtime instructions to query the processor are privileged.
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inline int GetCacheLineSize()
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{
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return CRYPTOPP_L1_CACHE_LINE_SIZE;
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}
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#else
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inline int GetCacheLineSize()
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{
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return CRYPTOPP_L1_CACHE_LINE_SIZE;
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}
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#endif // X86/X32/X64 and ARM
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#endif
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#if CRYPTOPP_BOOL_X86 || CRYPTOPP_BOOL_X32 || CRYPTOPP_BOOL_X64
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#ifdef CRYPTOPP_GENERATE_X64_MASM
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#define AS1(x) x*newline*
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#define AS2(x, y) x, y*newline*
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#define AS3(x, y, z) x, y, z*newline*
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#define ASS(x, y, a, b, c, d) x, y, a*64+b*16+c*4+d*newline*
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#define ASL(x) label##x:*newline*
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#define ASJ(x, y, z) x label##y*newline*
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#define ASC(x, y) x label##y*newline*
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#define AS_HEX(y) 0##y##h
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#elif defined(_MSC_VER) || defined(__BORLANDC__)
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#define CRYPTOPP_MS_STYLE_INLINE_ASSEMBLY
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#define AS1(x) __asm {x}
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#define AS2(x, y) __asm {x, y}
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#define AS3(x, y, z) __asm {x, y, z}
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#define ASS(x, y, a, b, c, d) __asm {x, y, (a)*64+(b)*16+(c)*4+(d)}
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#define ASL(x) __asm {label##x:}
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#define ASJ(x, y, z) __asm {x label##y}
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#define ASC(x, y) __asm {x label##y}
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#define CRYPTOPP_NAKED __declspec(naked)
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#define AS_HEX(y) 0x##y
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#else
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#define CRYPTOPP_GNU_STYLE_INLINE_ASSEMBLY
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#if defined(CRYPTOPP_CLANG_VERSION) || defined(CRYPTOPP_APPLE_CLANG_VERSION)
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#define NEW_LINE "\n"
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#define INTEL_PREFIX ".intel_syntax;"
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#define INTEL_NOPREFIX ".intel_syntax;"
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#define ATT_PREFIX ".att_syntax;"
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#define ATT_NOPREFIX ".att_syntax;"
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#else
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#define NEW_LINE
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#define INTEL_PREFIX ".intel_syntax prefix;"
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#define INTEL_NOPREFIX ".intel_syntax noprefix;"
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#define ATT_PREFIX ".att_syntax prefix;"
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#define ATT_NOPREFIX ".att_syntax noprefix;"
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#endif
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// define these in two steps to allow arguments to be expanded
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#define GNU_AS1(x) #x ";" NEW_LINE
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#define GNU_AS2(x, y) #x ", " #y ";" NEW_LINE
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#define GNU_AS3(x, y, z) #x ", " #y ", " #z ";" NEW_LINE
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#define GNU_ASL(x) "\n" #x ":" NEW_LINE
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#define GNU_ASJ(x, y, z) #x " " #y #z ";" NEW_LINE
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#define AS1(x) GNU_AS1(x)
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#define AS2(x, y) GNU_AS2(x, y)
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#define AS3(x, y, z) GNU_AS3(x, y, z)
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#define ASS(x, y, a, b, c, d) #x ", " #y ", " #a "*64+" #b "*16+" #c "*4+" #d ";"
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#define ASL(x) GNU_ASL(x)
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#define ASJ(x, y, z) GNU_ASJ(x, y, z)
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#define ASC(x, y) #x " " #y ";"
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#define CRYPTOPP_NAKED
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#define AS_HEX(y) 0x##y
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#endif
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#define IF0(y)
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#define IF1(y) y
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// Should be confined to GCC, but its used to help manage Clang 3.4 compiler error.
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// Also see LLVM Bug 24232, http://llvm.org/bugs/show_bug.cgi?id=24232 .
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#ifndef INTEL_PREFIX
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#define INTEL_PREFIX
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#endif
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#ifndef INTEL_NOPREFIX
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#define INTEL_NOPREFIX
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#endif
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#ifndef ATT_PREFIX
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#define ATT_PREFIX
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#endif
|
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#ifndef ATT_NOPREFIX
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#define ATT_NOPREFIX
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#endif
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|
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#ifdef CRYPTOPP_GENERATE_X64_MASM
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#define ASM_MOD(x, y) ((x) MOD (y))
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#define XMMWORD_PTR XMMWORD PTR
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#else
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// GNU assembler doesn't seem to have mod operator
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#define ASM_MOD(x, y) ((x)-((x)/(y))*(y))
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// GAS 2.15 doesn't support XMMWORD PTR. it seems necessary only for MASM
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|
#define XMMWORD_PTR
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|
#endif
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|
|
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#if CRYPTOPP_BOOL_X86
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|
#define AS_REG_1 ecx
|
|
#define AS_REG_2 edx
|
|
#define AS_REG_3 esi
|
|
#define AS_REG_4 edi
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|
#define AS_REG_5 eax
|
|
#define AS_REG_6 ebx
|
|
#define AS_REG_7 ebp
|
|
#define AS_REG_1d ecx
|
|
#define AS_REG_2d edx
|
|
#define AS_REG_3d esi
|
|
#define AS_REG_4d edi
|
|
#define AS_REG_5d eax
|
|
#define AS_REG_6d ebx
|
|
#define AS_REG_7d ebp
|
|
#define WORD_SZ 4
|
|
#define WORD_REG(x) e##x
|
|
#define WORD_PTR DWORD PTR
|
|
#define AS_PUSH_IF86(x) AS1(push e##x)
|
|
#define AS_POP_IF86(x) AS1(pop e##x)
|
|
#define AS_JCXZ jecxz
|
|
#elif CRYPTOPP_BOOL_X32
|
|
#define AS_REG_1 ecx
|
|
#define AS_REG_2 edx
|
|
#define AS_REG_3 r8d
|
|
#define AS_REG_4 r9d
|
|
#define AS_REG_5 eax
|
|
#define AS_REG_6 r10d
|
|
#define AS_REG_7 r11d
|
|
#define AS_REG_1d ecx
|
|
#define AS_REG_2d edx
|
|
#define AS_REG_3d r8d
|
|
#define AS_REG_4d r9d
|
|
#define AS_REG_5d eax
|
|
#define AS_REG_6d r10d
|
|
#define AS_REG_7d r11d
|
|
#define WORD_SZ 4
|
|
#define WORD_REG(x) e##x
|
|
#define WORD_PTR DWORD PTR
|
|
#define AS_PUSH_IF86(x) AS1(push r##x)
|
|
#define AS_POP_IF86(x) AS1(pop r##x)
|
|
#define AS_JCXZ jecxz
|
|
#elif CRYPTOPP_BOOL_X64
|
|
#ifdef CRYPTOPP_GENERATE_X64_MASM
|
|
#define AS_REG_1 rcx
|
|
#define AS_REG_2 rdx
|
|
#define AS_REG_3 r8
|
|
#define AS_REG_4 r9
|
|
#define AS_REG_5 rax
|
|
#define AS_REG_6 r10
|
|
#define AS_REG_7 r11
|
|
#define AS_REG_1d ecx
|
|
#define AS_REG_2d edx
|
|
#define AS_REG_3d r8d
|
|
#define AS_REG_4d r9d
|
|
#define AS_REG_5d eax
|
|
#define AS_REG_6d r10d
|
|
#define AS_REG_7d r11d
|
|
#else
|
|
#define AS_REG_1 rdi
|
|
#define AS_REG_2 rsi
|
|
#define AS_REG_3 rdx
|
|
#define AS_REG_4 rcx
|
|
#define AS_REG_5 r8
|
|
#define AS_REG_6 r9
|
|
#define AS_REG_7 r10
|
|
#define AS_REG_1d edi
|
|
#define AS_REG_2d esi
|
|
#define AS_REG_3d edx
|
|
#define AS_REG_4d ecx
|
|
#define AS_REG_5d r8d
|
|
#define AS_REG_6d r9d
|
|
#define AS_REG_7d r10d
|
|
#endif
|
|
#define WORD_SZ 8
|
|
#define WORD_REG(x) r##x
|
|
#define WORD_PTR QWORD PTR
|
|
#define AS_PUSH_IF86(x)
|
|
#define AS_POP_IF86(x)
|
|
#define AS_JCXZ jrcxz
|
|
#endif
|
|
|
|
// helper macro for stream cipher output
|
|
#define AS_XMM_OUTPUT4(labelPrefix, inputPtr, outputPtr, x0, x1, x2, x3, t, p0, p1, p2, p3, increment)\
|
|
AS2( test inputPtr, inputPtr)\
|
|
ASC( jz, labelPrefix##3)\
|
|
AS2( test inputPtr, 15)\
|
|
ASC( jnz, labelPrefix##7)\
|
|
AS2( pxor xmm##x0, [inputPtr+p0*16])\
|
|
AS2( pxor xmm##x1, [inputPtr+p1*16])\
|
|
AS2( pxor xmm##x2, [inputPtr+p2*16])\
|
|
AS2( pxor xmm##x3, [inputPtr+p3*16])\
|
|
AS2( add inputPtr, increment*16)\
|
|
ASC( jmp, labelPrefix##3)\
|
|
ASL(labelPrefix##7)\
|
|
AS2( movdqu xmm##t, [inputPtr+p0*16])\
|
|
AS2( pxor xmm##x0, xmm##t)\
|
|
AS2( movdqu xmm##t, [inputPtr+p1*16])\
|
|
AS2( pxor xmm##x1, xmm##t)\
|
|
AS2( movdqu xmm##t, [inputPtr+p2*16])\
|
|
AS2( pxor xmm##x2, xmm##t)\
|
|
AS2( movdqu xmm##t, [inputPtr+p3*16])\
|
|
AS2( pxor xmm##x3, xmm##t)\
|
|
AS2( add inputPtr, increment*16)\
|
|
ASL(labelPrefix##3)\
|
|
AS2( test outputPtr, 15)\
|
|
ASC( jnz, labelPrefix##8)\
|
|
AS2( movdqa [outputPtr+p0*16], xmm##x0)\
|
|
AS2( movdqa [outputPtr+p1*16], xmm##x1)\
|
|
AS2( movdqa [outputPtr+p2*16], xmm##x2)\
|
|
AS2( movdqa [outputPtr+p3*16], xmm##x3)\
|
|
ASC( jmp, labelPrefix##9)\
|
|
ASL(labelPrefix##8)\
|
|
AS2( movdqu [outputPtr+p0*16], xmm##x0)\
|
|
AS2( movdqu [outputPtr+p1*16], xmm##x1)\
|
|
AS2( movdqu [outputPtr+p2*16], xmm##x2)\
|
|
AS2( movdqu [outputPtr+p3*16], xmm##x3)\
|
|
ASL(labelPrefix##9)\
|
|
AS2( add outputPtr, increment*16)
|
|
|
|
#endif // X86/X32/X64
|
|
|
|
NAMESPACE_END
|
|
|
|
#endif // CRYPTOPP_CPU_H
|