mirror of
https://github.com/shadps4-emu/ext-cryptopp.git
synced 2024-11-23 09:59:42 +00:00
5be05bce07
This should not be needed, but it does not hurt. According to Ian Lance Taylor (http://gcc.gnu.org/ml/gcc-help/2014-02/msg00023.html), the CC clobber causes GCC to forget its internal representation of flag state. It should not be needed for cpuid. However, Clang has some odd behave in a couple of versions of its compiler when using cpuid. Both JW and UB experienced it on separate occassions.
760 lines
21 KiB
C++
760 lines
21 KiB
C++
// cpu.cpp - written and placed in the public domain by Wei Dai
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#include "pch.h"
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#include "config.h"
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#ifndef EXCEPTION_EXECUTE_HANDLER
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# define EXCEPTION_EXECUTE_HANDLER 1
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#endif
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#ifndef CRYPTOPP_IMPORTS
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#include "cpu.h"
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#include "misc.h"
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#include <algorithm>
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#ifndef CRYPTOPP_MS_STYLE_INLINE_ASSEMBLY
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#include <signal.h>
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#include <setjmp.h>
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#endif
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NAMESPACE_BEGIN(CryptoPP)
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#ifndef CRYPTOPP_MS_STYLE_INLINE_ASSEMBLY
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extern "C" {
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typedef void (*SigHandler)(int);
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};
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#endif // Not CRYPTOPP_MS_STYLE_INLINE_ASSEMBLY
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#ifdef CRYPTOPP_CPUID_AVAILABLE
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#if _MSC_VER >= 1400 && CRYPTOPP_BOOL_X64
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bool CpuId(word32 input, word32 output[4])
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{
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__cpuid((int *)output, input);
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return true;
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}
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#else
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#ifndef CRYPTOPP_MS_STYLE_INLINE_ASSEMBLY
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extern "C"
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{
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static jmp_buf s_jmpNoCPUID;
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static void SigIllHandlerCPUID(int)
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{
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longjmp(s_jmpNoCPUID, 1);
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}
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static jmp_buf s_jmpNoSSE2;
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static void SigIllHandlerSSE2(int)
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{
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longjmp(s_jmpNoSSE2, 1);
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}
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}
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#endif
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bool CpuId(word32 input, word32 output[4])
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{
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#if defined(CRYPTOPP_MS_STYLE_INLINE_ASSEMBLY)
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__try
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{
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__asm
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{
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mov eax, input
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mov ecx, 0
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cpuid
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mov edi, output
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mov [edi], eax
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mov [edi+4], ebx
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mov [edi+8], ecx
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mov [edi+12], edx
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}
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}
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// GetExceptionCode() == EXCEPTION_ILLEGAL_INSTRUCTION
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__except (EXCEPTION_EXECUTE_HANDLER)
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{
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return false;
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}
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// function 0 returns the highest basic function understood in EAX
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if(input == 0)
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return !!output[0];
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return true;
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#else
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// longjmp and clobber warnings. Volatile is required.
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// http://github.com/weidai11/cryptopp/issues/24 and http://stackoverflow.com/q/7721854
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volatile bool result = true;
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volatile SigHandler oldHandler = signal(SIGILL, SigIllHandlerCPUID);
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if (oldHandler == SIG_ERR)
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return false;
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# ifndef __MINGW32__
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volatile sigset_t oldMask;
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if (sigprocmask(0, NULL, (sigset_t*)&oldMask))
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return false;
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# endif
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if (setjmp(s_jmpNoCPUID))
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result = false;
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else
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{
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asm volatile
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(
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// save ebx in case -fPIC is being used
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// TODO: this might need an early clobber on EDI.
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# if CRYPTOPP_BOOL_X32 || CRYPTOPP_BOOL_X64
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"pushq %%rbx; cpuid; mov %%ebx, %%edi; popq %%rbx"
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# else
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"push %%ebx; cpuid; mov %%ebx, %%edi; pop %%ebx"
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# endif
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: "=a" (output[0]), "=D" (output[1]), "=c" (output[2]), "=d" (output[3])
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: "a" (input), "c" (0)
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: "cc"
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);
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}
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# ifndef __MINGW32__
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sigprocmask(SIG_SETMASK, (sigset_t*)&oldMask, NULL);
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# endif
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signal(SIGILL, oldHandler);
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return result;
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#endif
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}
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#endif
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static bool TrySSE2()
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{
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#if CRYPTOPP_BOOL_X64
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return true;
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#elif defined(CRYPTOPP_MS_STYLE_INLINE_ASSEMBLY)
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__try
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{
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#if CRYPTOPP_BOOL_SSE2_ASM_AVAILABLE
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AS2(por xmm0, xmm0) // executing SSE2 instruction
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#elif CRYPTOPP_BOOL_SSE2_INTRINSICS_AVAILABLE
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__m128i x = _mm_setzero_si128();
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return _mm_cvtsi128_si32(x) == 0;
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#endif
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}
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// GetExceptionCode() == EXCEPTION_ILLEGAL_INSTRUCTION
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__except (EXCEPTION_EXECUTE_HANDLER)
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{
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return false;
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}
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return true;
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#else
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// longjmp and clobber warnings. Volatile is required.
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// http://github.com/weidai11/cryptopp/issues/24 and http://stackoverflow.com/q/7721854
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volatile bool result = true;
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volatile SigHandler oldHandler = signal(SIGILL, SigIllHandlerSSE2);
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if (oldHandler == SIG_ERR)
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return false;
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# ifndef __MINGW32__
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volatile sigset_t oldMask;
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if (sigprocmask(0, NULL, (sigset_t*)&oldMask))
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return false;
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# endif
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if (setjmp(s_jmpNoSSE2))
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result = false;
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else
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{
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#if CRYPTOPP_BOOL_SSE2_ASM_AVAILABLE
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__asm __volatile ("por %xmm0, %xmm0");
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#elif CRYPTOPP_BOOL_SSE2_INTRINSICS_AVAILABLE
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__m128i x = _mm_setzero_si128();
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result = _mm_cvtsi128_si32(x) == 0;
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#endif
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}
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# ifndef __MINGW32__
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sigprocmask(SIG_SETMASK, (sigset_t*)&oldMask, NULL);
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# endif
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signal(SIGILL, oldHandler);
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return result;
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#endif
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}
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bool CRYPTOPP_SECTION_INIT g_x86DetectionDone = false;
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bool CRYPTOPP_SECTION_INIT g_hasMMX = false, CRYPTOPP_SECTION_INIT g_hasISSE = false, CRYPTOPP_SECTION_INIT g_hasSSE2 = false, CRYPTOPP_SECTION_INIT g_hasSSSE3 = false;
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bool CRYPTOPP_SECTION_INIT g_hasSSE4 = false, CRYPTOPP_SECTION_INIT g_hasAESNI = false, CRYPTOPP_SECTION_INIT g_hasCLMUL = false, CRYPTOPP_SECTION_INIT g_hasSHA = false;
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bool CRYPTOPP_SECTION_INIT g_hasRDRAND = false, CRYPTOPP_SECTION_INIT g_hasRDSEED = false, CRYPTOPP_SECTION_INIT g_isP4 = false;
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bool CRYPTOPP_SECTION_INIT g_hasPadlockRNG = false, CRYPTOPP_SECTION_INIT g_hasPadlockACE = false, CRYPTOPP_SECTION_INIT g_hasPadlockACE2 = false;
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bool CRYPTOPP_SECTION_INIT g_hasPadlockPHE = false, CRYPTOPP_SECTION_INIT g_hasPadlockPMM = false;
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word32 CRYPTOPP_SECTION_INIT g_cacheLineSize = CRYPTOPP_L1_CACHE_LINE_SIZE;
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static inline bool IsIntel(const word32 output[4])
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{
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// This is the "GenuineIntel" string
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return (output[1] /*EBX*/ == 0x756e6547) &&
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(output[2] /*ECX*/ == 0x6c65746e) &&
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(output[3] /*EDX*/ == 0x49656e69);
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}
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static inline bool IsAMD(const word32 output[4])
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{
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// This is the "AuthenticAMD" string. Some early K5's can return "AMDisbetter!"
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return (output[1] /*EBX*/ == 0x68747541) &&
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(output[2] /*ECX*/ == 0x444D4163) &&
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(output[3] /*EDX*/ == 0x69746E65);
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}
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static inline bool IsVIA(const word32 output[4])
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{
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// This is the "CentaurHauls" string. Some non-PadLock's can return "VIA VIA VIA "
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return (output[1] /*EBX*/ == 0x746e6543) &&
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(output[2] /*ECX*/ == 0x736c7561) &&
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(output[3] /*EDX*/ == 0x48727561);
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}
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#if HAVE_GCC_CONSTRUCTOR1
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void __attribute__ ((constructor (CRYPTOPP_INIT_PRIORITY + 50))) DetectX86Features()
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#elif HAVE_GCC_CONSTRUCTOR0
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void __attribute__ ((constructor)) DetectX86Features()
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#else
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void DetectX86Features()
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#endif
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{
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word32 cpuid[4], cpuid1[4];
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if (!CpuId(0, cpuid))
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return;
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if (!CpuId(1, cpuid1))
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return;
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g_hasMMX = (cpuid1[3] & (1 << 23)) != 0;
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if ((cpuid1[3] & (1 << 26)) != 0)
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g_hasSSE2 = TrySSE2();
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g_hasSSSE3 = g_hasSSE2 && (cpuid1[2] & (1<<9));
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g_hasSSE4 = g_hasSSE2 && ((cpuid1[2] & (1<<19)) && (cpuid1[2] & (1<<20)));
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g_hasAESNI = g_hasSSE2 && (cpuid1[2] & (1<<25));
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g_hasCLMUL = g_hasSSE2 && (cpuid1[2] & (1<<1));
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if ((cpuid1[3] & (1 << 25)) != 0)
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g_hasISSE = true;
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else
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{
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word32 cpuid2[4];
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CpuId(0x080000000, cpuid2);
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if (cpuid2[0] >= 0x080000001)
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{
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CpuId(0x080000001, cpuid2);
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g_hasISSE = (cpuid2[3] & (1 << 22)) != 0;
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}
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}
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if (IsIntel(cpuid))
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{
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static const unsigned int RDRAND_FLAG = (1 << 30);
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static const unsigned int RDSEED_FLAG = (1 << 18);
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static const unsigned int SHA_FLAG = (1 << 29);
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g_isP4 = ((cpuid1[0] >> 8) & 0xf) == 0xf;
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g_cacheLineSize = 8 * GETBYTE(cpuid1[1], 1);
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g_hasRDRAND = !!(cpuid1[2] /*ECX*/ & RDRAND_FLAG);
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if (cpuid[0] /*EAX*/ >= 7)
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{
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word32 cpuid3[4];
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if (CpuId(7, cpuid3))
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{
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g_hasRDSEED = !!(cpuid3[1] /*EBX*/ & RDSEED_FLAG);
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g_hasSHA = !!(cpuid3[1] /*EBX*/ & SHA_FLAG);
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}
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}
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}
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else if (IsAMD(cpuid))
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{
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static const unsigned int RDRAND_FLAG = (1 << 30);
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CpuId(0x01, cpuid);
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g_hasRDRAND = !!(cpuid[2] /*ECX*/ & RDRAND_FLAG);
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CpuId(0x80000005, cpuid);
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g_cacheLineSize = GETBYTE(cpuid[2], 0);
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}
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else if (IsVIA(cpuid))
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{
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static const unsigned int RNG_FLAGS = (0x3 << 2);
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static const unsigned int ACE_FLAGS = (0x3 << 6);
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static const unsigned int ACE2_FLAGS = (0x3 << 8);
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static const unsigned int PHE_FLAGS = (0x3 << 10);
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static const unsigned int PMM_FLAGS = (0x3 << 12);
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CpuId(0xC0000000, cpuid);
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if (cpuid[0] >= 0xC0000001)
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{
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// Extended features available
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CpuId(0xC0000001, cpuid);
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g_hasPadlockRNG = !!(cpuid[3] /*EDX*/ & RNG_FLAGS);
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g_hasPadlockACE = !!(cpuid[3] /*EDX*/ & ACE_FLAGS);
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g_hasPadlockACE2 = !!(cpuid[3] /*EDX*/ & ACE2_FLAGS);
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g_hasPadlockPHE = !!(cpuid[3] /*EDX*/ & PHE_FLAGS);
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g_hasPadlockPMM = !!(cpuid[3] /*EDX*/ & PMM_FLAGS);
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}
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}
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if (!g_cacheLineSize)
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g_cacheLineSize = CRYPTOPP_L1_CACHE_LINE_SIZE;
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*((volatile bool*)&g_x86DetectionDone) = true;
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}
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#elif (CRYPTOPP_BOOL_ARM32 || CRYPTOPP_BOOL_ARM64)
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// The ARM equivalent of CPUID probing is reading a MSR. The code requires Exception Level 1 (EL1) and above, but user space runs at EL0.
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// Attempting to run the code results in a SIGILL and termination.
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//
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// #if defined(__arm64__) || defined(__aarch64__)
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// word64 caps = 0; // Read ID_AA64ISAR0_EL1
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// __asm __volatile("mrs %0, " "id_aa64isar0_el1" : "=r" (caps));
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// #elif defined(__arm__) || defined(__aarch32__)
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// word32 caps = 0; // Read ID_ISAR5_EL1
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// __asm __volatile("mrs %0, " "id_isar5_el1" : "=r" (caps));
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// #endif
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//
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// The following does not work well either. Its appears to be missing constants, and it does not detect Aarch32 execution environments on Aarch64
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// http://community.arm.com/groups/android-community/blog/2014/10/10/runtime-detection-of-cpu-features-on-an-armv8-a-cpu
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//
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bool CRYPTOPP_SECTION_INIT g_ArmDetectionDone = false;
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bool CRYPTOPP_SECTION_INIT g_hasNEON = false, CRYPTOPP_SECTION_INIT g_hasPMULL = false, CRYPTOPP_SECTION_INIT g_hasCRC32 = false;
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bool CRYPTOPP_SECTION_INIT g_hasAES = false, CRYPTOPP_SECTION_INIT g_hasSHA1 = false, CRYPTOPP_SECTION_INIT g_hasSHA2 = false;
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word32 CRYPTOPP_SECTION_INIT g_cacheLineSize = CRYPTOPP_L1_CACHE_LINE_SIZE;
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#ifndef CRYPTOPP_MS_STYLE_INLINE_ASSEMBLY
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extern "C"
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{
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static jmp_buf s_jmpNoNEON;
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static void SigIllHandlerNEON(int)
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{
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longjmp(s_jmpNoNEON, 1);
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}
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static jmp_buf s_jmpNoPMULL;
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static void SigIllHandlerPMULL(int)
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{
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longjmp(s_jmpNoPMULL, 1);
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}
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static jmp_buf s_jmpNoCRC32;
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static void SigIllHandlerCRC32(int)
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{
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longjmp(s_jmpNoCRC32, 1);
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}
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static jmp_buf s_jmpNoAES;
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static void SigIllHandlerAES(int)
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{
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longjmp(s_jmpNoAES, 1);
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}
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static jmp_buf s_jmpNoSHA1;
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static void SigIllHandlerSHA1(int)
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{
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longjmp(s_jmpNoSHA1, 1);
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}
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static jmp_buf s_jmpNoSHA2;
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static void SigIllHandlerSHA2(int)
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{
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longjmp(s_jmpNoSHA2, 1);
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}
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};
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#endif // Not CRYPTOPP_MS_STYLE_INLINE_ASSEMBLY
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static bool TryNEON()
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{
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#if (CRYPTOPP_BOOL_NEON_INTRINSICS_AVAILABLE)
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# if defined(CRYPTOPP_MS_STYLE_INLINE_ASSEMBLY)
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volatile bool result = true;
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__try
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{
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uint32_t v1[4] = {1,1,1,1};
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uint32x4_t x1 = vld1q_u32(v1);
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uint64_t v2[2] = {1,1};
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uint64x2_t x2 = vld1q_u64(v2);
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uint32x4_t x3 = vdupq_n_u32(2);
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x3 = vsetq_lane_u32(vgetq_lane_u32(x1,0),x3,0);
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x3 = vsetq_lane_u32(vgetq_lane_u32(x1,3),x3,3);
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uint64x2_t x4 = vdupq_n_u64(2);
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x4 = vsetq_lane_u64(vgetq_lane_u64(x2,0),x4,0);
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x4 = vsetq_lane_u64(vgetq_lane_u64(x2,1),x4,1);
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result = !!(vgetq_lane_u32(x3,0) | vgetq_lane_u64(x4,1));
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}
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__except (EXCEPTION_EXECUTE_HANDLER)
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{
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return false;
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}
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return result;
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# else
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// longjmp and clobber warnings. Volatile is required.
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// http://github.com/weidai11/cryptopp/issues/24 and http://stackoverflow.com/q/7721854
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volatile bool result = true;
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volatile SigHandler oldHandler = signal(SIGILL, SigIllHandlerNEON);
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if (oldHandler == SIG_ERR)
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return false;
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volatile sigset_t oldMask;
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if (sigprocmask(0, NULL, (sigset_t*)&oldMask))
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return false;
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if (setjmp(s_jmpNoNEON))
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result = false;
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else
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{
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uint32_t v1[4] = {1,1,1,1};
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uint32x4_t x1 = vld1q_u32(v1);
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uint64_t v2[2] = {1,1};
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uint64x2_t x2 = vld1q_u64(v2);
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uint32x4_t x3 = {0,0,0,0};
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x3 = vsetq_lane_u32(vgetq_lane_u32(x1,0),x3,0);
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x3 = vsetq_lane_u32(vgetq_lane_u32(x1,3),x3,3);
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uint64x2_t x4 = {0,0};
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x4 = vsetq_lane_u64(vgetq_lane_u64(x2,0),x4,0);
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x4 = vsetq_lane_u64(vgetq_lane_u64(x2,1),x4,1);
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// Hack... GCC optimizes away the code and returns true
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result = !!(vgetq_lane_u32(x3,0) | vgetq_lane_u64(x4,1));
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}
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sigprocmask(SIG_SETMASK, (sigset_t*)&oldMask, NULL);
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signal(SIGILL, oldHandler);
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return result;
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# endif
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#else
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return false;
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#endif // CRYPTOPP_BOOL_NEON_INTRINSICS_AVAILABLE
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}
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static bool TryPMULL()
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{
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#if (CRYPTOPP_BOOL_ARM_CRYPTO_INTRINSICS_AVAILABLE)
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# if defined(CRYPTOPP_MS_STYLE_INLINE_ASSEMBLY)
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volatile bool result = true;
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__try
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{
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const poly64_t a1={2}, b1={3};
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const poly64x2_t a2={4,5}, b2={6,7};
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|
const poly64x2_t a3={0x8080808080808080,0xa0a0a0a0a0a0a0a0}, b3={0xc0c0c0c0c0c0c0c0, 0xe0e0e0e0e0e0e0e0};
|
|
|
|
const poly128_t r1 = vmull_p64(a1, b1);
|
|
const poly128_t r2 = vmull_high_p64(a2, b2);
|
|
const poly128_t r3 = vmull_high_p64(a3, b3);
|
|
|
|
// Also see https://github.com/weidai11/cryptopp/issues/233.
|
|
const uint64x2_t& t1 = vreinterpretq_u64_p128(r1); // {6,0}
|
|
const uint64x2_t& t2 = vreinterpretq_u64_p128(r2); // {24,0}
|
|
const uint64x2_t& t3 = vreinterpretq_u64_p128(r3); // {bignum,bignum}
|
|
|
|
result = !!(vgetq_lane_u64(t1,0) == 0x06 && vgetq_lane_u64(t1,1) == 0x00 && vgetq_lane_u64(t2,0) == 0x1b &&
|
|
vgetq_lane_u64(t2,1) == 0x00 && vgetq_lane_u64(t3,0) == 0x6c006c006c006c00 && vgetq_lane_u64(t3,1) == 0x6c006c006c006c00);
|
|
}
|
|
__except (EXCEPTION_EXECUTE_HANDLER)
|
|
{
|
|
return false;
|
|
}
|
|
return result;
|
|
# else
|
|
// longjmp and clobber warnings. Volatile is required.
|
|
// http://github.com/weidai11/cryptopp/issues/24 and http://stackoverflow.com/q/7721854
|
|
volatile bool result = true;
|
|
|
|
volatile SigHandler oldHandler = signal(SIGILL, SigIllHandlerPMULL);
|
|
if (oldHandler == SIG_ERR)
|
|
return false;
|
|
|
|
volatile sigset_t oldMask;
|
|
if (sigprocmask(0, NULL, (sigset_t*)&oldMask))
|
|
return false;
|
|
|
|
if (setjmp(s_jmpNoPMULL))
|
|
result = false;
|
|
else
|
|
{
|
|
const poly64_t a1={2}, b1={3};
|
|
const poly64x2_t a2={4,5}, b2={6,7};
|
|
const poly64x2_t a3={0x8080808080808080,0xa0a0a0a0a0a0a0a0}, b3={0xc0c0c0c0c0c0c0c0, 0xe0e0e0e0e0e0e0e0};
|
|
|
|
const poly128_t r1 = vmull_p64(a1, b1);
|
|
const poly128_t r2 = vmull_high_p64(a2, b2);
|
|
const poly128_t r3 = vmull_high_p64(a3, b3);
|
|
|
|
// Linaro is missing vreinterpretq_u64_p128. Also see https://github.com/weidai11/cryptopp/issues/233.
|
|
const uint64x2_t& t1 = (uint64x2_t)(r1); // {6,0}
|
|
const uint64x2_t& t2 = (uint64x2_t)(r2); // {24,0}
|
|
const uint64x2_t& t3 = (uint64x2_t)(r3); // {bignum,bignum}
|
|
|
|
result = !!(vgetq_lane_u64(t1,0) == 0x06 && vgetq_lane_u64(t1,1) == 0x00 && vgetq_lane_u64(t2,0) == 0x1b &&
|
|
vgetq_lane_u64(t2,1) == 0x00 && vgetq_lane_u64(t3,0) == 0x6c006c006c006c00 && vgetq_lane_u64(t3,1) == 0x6c006c006c006c00);
|
|
}
|
|
|
|
sigprocmask(SIG_SETMASK, (sigset_t*)&oldMask, NULL);
|
|
signal(SIGILL, oldHandler);
|
|
return result;
|
|
# endif
|
|
#else
|
|
return false;
|
|
#endif // CRYPTOPP_BOOL_ARM_CRYPTO_INTRINSICS_AVAILABLE
|
|
}
|
|
|
|
static bool TryCRC32()
|
|
{
|
|
#if (CRYPTOPP_BOOL_ARM_CRC32_INTRINSICS_AVAILABLE)
|
|
# if defined(CRYPTOPP_MS_STYLE_INLINE_ASSEMBLY)
|
|
volatile bool result = true;
|
|
__try
|
|
{
|
|
word32 w=0, x=1; word16 y=2; byte z=3;
|
|
w = __crc32cw(w,x);
|
|
w = __crc32ch(w,y);
|
|
w = __crc32cb(w,z);
|
|
|
|
result = !!w;
|
|
}
|
|
__except (EXCEPTION_EXECUTE_HANDLER)
|
|
{
|
|
return false;
|
|
}
|
|
return result;
|
|
# else
|
|
// longjmp and clobber warnings. Volatile is required.
|
|
// http://github.com/weidai11/cryptopp/issues/24 and http://stackoverflow.com/q/7721854
|
|
volatile bool result = true;
|
|
|
|
volatile SigHandler oldHandler = signal(SIGILL, SigIllHandlerCRC32);
|
|
if (oldHandler == SIG_ERR)
|
|
return false;
|
|
|
|
volatile sigset_t oldMask;
|
|
if (sigprocmask(0, NULL, (sigset_t*)&oldMask))
|
|
return false;
|
|
|
|
if (setjmp(s_jmpNoCRC32))
|
|
result = false;
|
|
else
|
|
{
|
|
word32 w=0, x=1; word16 y=2; byte z=3;
|
|
w = __crc32cw(w,x);
|
|
w = __crc32ch(w,y);
|
|
w = __crc32cb(w,z);
|
|
|
|
// Hack... GCC optimizes away the code and returns true
|
|
result = !!w;
|
|
}
|
|
|
|
sigprocmask(SIG_SETMASK, (sigset_t*)&oldMask, NULL);
|
|
signal(SIGILL, oldHandler);
|
|
return result;
|
|
# endif
|
|
#else
|
|
return false;
|
|
#endif // CRYPTOPP_BOOL_ARM_CRC32_INTRINSICS_AVAILABLE
|
|
}
|
|
|
|
static bool TryAES()
|
|
{
|
|
#if (CRYPTOPP_BOOL_ARM_CRYPTO_INTRINSICS_AVAILABLE)
|
|
# if defined(CRYPTOPP_MS_STYLE_INLINE_ASSEMBLY)
|
|
volatile bool result = true;
|
|
__try
|
|
{
|
|
// AES encrypt and decrypt
|
|
uint8x16_t data = vdupq_n_u8(0), key = vdupq_n_u8(0);
|
|
uint8x16_t r1 = vaeseq_u8(data, key);
|
|
uint8x16_t r2 = vaesdq_u8(data, key);
|
|
|
|
result = !!(vgetq_lane_u8(r1,0) | vgetq_lane_u8(r2,7));
|
|
}
|
|
__except (EXCEPTION_EXECUTE_HANDLER)
|
|
{
|
|
return false;
|
|
}
|
|
return result;
|
|
# else
|
|
// longjmp and clobber warnings. Volatile is required.
|
|
// http://github.com/weidai11/cryptopp/issues/24 and http://stackoverflow.com/q/7721854
|
|
volatile bool result = true;
|
|
|
|
volatile SigHandler oldHandler = signal(SIGILL, SigIllHandlerAES);
|
|
if (oldHandler == SIG_ERR)
|
|
return false;
|
|
|
|
volatile sigset_t oldMask;
|
|
if (sigprocmask(0, NULL, (sigset_t*)&oldMask))
|
|
return false;
|
|
|
|
if (setjmp(s_jmpNoAES))
|
|
result = false;
|
|
else
|
|
{
|
|
uint8x16_t data = vdupq_n_u8(0), key = vdupq_n_u8(0);
|
|
uint8x16_t r1 = vaeseq_u8(data, key);
|
|
uint8x16_t r2 = vaesdq_u8(data, key);
|
|
|
|
// Hack... GCC optimizes away the code and returns true
|
|
result = !!(vgetq_lane_u8(r1,0) | vgetq_lane_u8(r2,7));
|
|
}
|
|
|
|
sigprocmask(SIG_SETMASK, (sigset_t*)&oldMask, NULL);
|
|
signal(SIGILL, oldHandler);
|
|
return result;
|
|
# endif
|
|
#else
|
|
return false;
|
|
#endif // CRYPTOPP_BOOL_ARM_CRYPTO_INTRINSICS_AVAILABLE
|
|
}
|
|
|
|
static bool TrySHA1()
|
|
{
|
|
#if (CRYPTOPP_BOOL_ARM_CRYPTO_INTRINSICS_AVAILABLE)
|
|
# if defined(CRYPTOPP_MS_STYLE_INLINE_ASSEMBLY)
|
|
volatile bool result = true;
|
|
__try
|
|
{
|
|
uint32x4_t data1 = {1,2,3,4}, data2 = {5,6,7,8}, data3 = {9,10,11,12};
|
|
|
|
uint32x4_t r1 = vsha1cq_u32 (data1, 0, data2);
|
|
uint32x4_t r2 = vsha1mq_u32 (data1, 0, data2);
|
|
uint32x4_t r3 = vsha1pq_u32 (data1, 0, data2);
|
|
uint32x4_t r4 = vsha1su0q_u32 (data1, data2, data3);
|
|
uint32x4_t r5 = vsha1su1q_u32 (data1, data2);
|
|
|
|
result = !!(vgetq_lane_u32(r1,0) | vgetq_lane_u32(r2,1) | vgetq_lane_u32(r3,2) | vgetq_lane_u32(r4,3) | vgetq_lane_u32(r5,0));
|
|
}
|
|
__except (EXCEPTION_EXECUTE_HANDLER)
|
|
{
|
|
return false;
|
|
}
|
|
return result;
|
|
# else
|
|
// longjmp and clobber warnings. Volatile is required.
|
|
// http://github.com/weidai11/cryptopp/issues/24 and http://stackoverflow.com/q/7721854
|
|
volatile bool result = true;
|
|
|
|
volatile SigHandler oldHandler = signal(SIGILL, SigIllHandlerSHA1);
|
|
if (oldHandler == SIG_ERR)
|
|
return false;
|
|
|
|
volatile sigset_t oldMask;
|
|
if (sigprocmask(0, NULL, (sigset_t*)&oldMask))
|
|
return false;
|
|
|
|
if (setjmp(s_jmpNoSHA1))
|
|
result = false;
|
|
else
|
|
{
|
|
uint32x4_t data1 = {1,2,3,4}, data2 = {5,6,7,8}, data3 = {9,10,11,12};
|
|
|
|
uint32x4_t r1 = vsha1cq_u32 (data1, 0, data2);
|
|
uint32x4_t r2 = vsha1mq_u32 (data1, 0, data2);
|
|
uint32x4_t r3 = vsha1pq_u32 (data1, 0, data2);
|
|
uint32x4_t r4 = vsha1su0q_u32 (data1, data2, data3);
|
|
uint32x4_t r5 = vsha1su1q_u32 (data1, data2);
|
|
|
|
// Hack... GCC optimizes away the code and returns true
|
|
result = !!(vgetq_lane_u32(r1,0) | vgetq_lane_u32(r2,1) | vgetq_lane_u32(r3,2) | vgetq_lane_u32(r4,3) | vgetq_lane_u32(r5,0));
|
|
}
|
|
|
|
sigprocmask(SIG_SETMASK, (sigset_t*)&oldMask, NULL);
|
|
signal(SIGILL, oldHandler);
|
|
return result;
|
|
# endif
|
|
#else
|
|
return false;
|
|
#endif // CRYPTOPP_BOOL_ARM_CRYPTO_INTRINSICS_AVAILABLE
|
|
}
|
|
|
|
static bool TrySHA2()
|
|
{
|
|
#if (CRYPTOPP_BOOL_ARM_CRYPTO_INTRINSICS_AVAILABLE)
|
|
# if defined(CRYPTOPP_MS_STYLE_INLINE_ASSEMBLY)
|
|
volatile bool result = true;
|
|
__try
|
|
{
|
|
uint32x4_t data1 = {1,2,3,4}, data2 = {5,6,7,8}, data3 = {9,10,11,12};
|
|
|
|
uint32x4_t r1 = vsha256hq_u32 (data1, data2, data3);
|
|
uint32x4_t r2 = vsha256h2q_u32 (data1, data2, data3);
|
|
uint32x4_t r3 = vsha256su0q_u32 (data1, data2);
|
|
uint32x4_t r4 = vsha256su1q_u32 (data1, data2, data3);
|
|
|
|
result = !!(vgetq_lane_u32(r1,0) | vgetq_lane_u32(r2,1) | vgetq_lane_u32(r3,2) | vgetq_lane_u32(r4,3));
|
|
}
|
|
__except (EXCEPTION_EXECUTE_HANDLER)
|
|
{
|
|
return false;
|
|
}
|
|
return result;
|
|
# else
|
|
// longjmp and clobber warnings. Volatile is required.
|
|
// http://github.com/weidai11/cryptopp/issues/24 and http://stackoverflow.com/q/7721854
|
|
volatile bool result = true;
|
|
|
|
volatile SigHandler oldHandler = signal(SIGILL, SigIllHandlerSHA2);
|
|
if (oldHandler == SIG_ERR)
|
|
return false;
|
|
|
|
volatile sigset_t oldMask;
|
|
if (sigprocmask(0, NULL, (sigset_t*)&oldMask))
|
|
return false;
|
|
|
|
if (setjmp(s_jmpNoSHA2))
|
|
result = false;
|
|
else
|
|
{
|
|
uint32x4_t data1 = {1,2,3,4}, data2 = {5,6,7,8}, data3 = {9,10,11,12};
|
|
|
|
uint32x4_t r1 = vsha256hq_u32 (data1, data2, data3);
|
|
uint32x4_t r2 = vsha256h2q_u32 (data1, data2, data3);
|
|
uint32x4_t r3 = vsha256su0q_u32 (data1, data2);
|
|
uint32x4_t r4 = vsha256su1q_u32 (data1, data2, data3);
|
|
|
|
// Hack... GCC optimizes away the code and returns true
|
|
result = !!(vgetq_lane_u32(r1,0) | vgetq_lane_u32(r2,1) | vgetq_lane_u32(r3,2) | vgetq_lane_u32(r4,3));
|
|
}
|
|
|
|
sigprocmask(SIG_SETMASK, (sigset_t*)&oldMask, NULL);
|
|
signal(SIGILL, oldHandler);
|
|
return result;
|
|
# endif
|
|
#else
|
|
return false;
|
|
#endif // CRYPTOPP_BOOL_ARM_CRYPTO_INTRINSICS_AVAILABLE
|
|
}
|
|
|
|
#if HAVE_GCC_CONSTRUCTOR1
|
|
void __attribute__ ((constructor (CRYPTOPP_INIT_PRIORITY + 50))) DetectArmFeatures()
|
|
#elif HAVE_GCC_CONSTRUCTOR0
|
|
void __attribute__ ((constructor)) DetectArmFeatures()
|
|
#else
|
|
void DetectArmFeatures()
|
|
#endif
|
|
{
|
|
g_hasNEON = TryNEON();
|
|
g_hasPMULL = TryPMULL();
|
|
g_hasCRC32 = TryCRC32();
|
|
g_hasAES = TryAES();
|
|
g_hasSHA1 = TrySHA1();
|
|
g_hasSHA2 = TrySHA2();
|
|
|
|
*((volatile bool*)&g_ArmDetectionDone) = true;
|
|
}
|
|
|
|
#endif
|
|
|
|
NAMESPACE_END
|
|
|
|
#endif
|