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https://github.com/shadps4-emu/shadPS4.git
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Patch insertq (#635)
* Patch `insertq` * Don't clobber flags, fix asserts a bit * Format code * Fixup some edge cases * A couple nits * Remove extraneous space
This commit is contained in:
Paris Oplopoios
GitHub
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7f9bc0abbd
commit
23bf8bf5e7
@ -620,9 +620,6 @@ static void GenerateEXTRQ(const ZydisDecodedOperand* operands, Xbyak::CodeGenera
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if (immediateForm) {
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u8 length = operands[1].imm.value.u & 0x3F;
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u8 index = operands[2].imm.value.u & 0x3F;
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if (length == 0) {
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length = 64;
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}
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LOG_DEBUG(Core, "Patching immediate form EXTRQ, length: {}, index: {}", length, index);
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@ -635,7 +632,15 @@ static void GenerateEXTRQ(const ZydisDecodedOperand* operands, Xbyak::CodeGenera
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c.push(scratch1);
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c.push(scratch2);
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u64 mask = (1ULL << length) - 1;
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u64 mask;
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if (length == 0) {
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length = 64; // for the check below
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mask = 0xFFFF'FFFF'FFFF'FFFF;
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} else {
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mask = (1ULL << length) - 1;
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}
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ASSERT_MSG(length + index <= 64, "length + index must be less than or equal to 64.");
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// Get lower qword from xmm register
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MAYBE_AVX(movq, scratch1, xmm_dst);
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@ -676,6 +681,8 @@ static void GenerateEXTRQ(const ZydisDecodedOperand* operands, Xbyak::CodeGenera
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const Xbyak::Reg64 scratch2 = rcx;
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const Xbyak::Reg64 mask = rdx;
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Xbyak::Label length_zero, end;
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c.lea(rsp, ptr[rsp - 128]);
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c.pushfq();
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c.push(scratch1);
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@ -686,9 +693,18 @@ static void GenerateEXTRQ(const ZydisDecodedOperand* operands, Xbyak::CodeGenera
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MAYBE_AVX(movq, scratch1, xmm_src);
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c.mov(scratch2, scratch1);
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c.and_(scratch2, 0x3F);
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c.jz(length_zero);
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// mask = (1ULL << length) - 1
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c.mov(mask, 1);
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c.shl(mask, cl);
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c.dec(mask);
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c.jmp(end);
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c.L(length_zero);
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c.mov(mask, 0xFFFF'FFFF'FFFF'FFFF);
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c.L(end);
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// Get the shift amount and store it in scratch2
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c.shr(scratch1, 8);
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@ -708,6 +724,149 @@ static void GenerateEXTRQ(const ZydisDecodedOperand* operands, Xbyak::CodeGenera
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}
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}
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static void GenerateINSERTQ(const ZydisDecodedOperand* operands, Xbyak::CodeGenerator& c) {
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bool immediateForm = operands[2].type == ZYDIS_OPERAND_TYPE_IMMEDIATE &&
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operands[3].type == ZYDIS_OPERAND_TYPE_IMMEDIATE;
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ASSERT_MSG(operands[0].type == ZYDIS_OPERAND_TYPE_REGISTER &&
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operands[1].type == ZYDIS_OPERAND_TYPE_REGISTER,
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"operands 0 and 1 must be registers.");
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const auto dst = ZydisToXbyakRegisterOperand(operands[0]);
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const auto src = ZydisToXbyakRegisterOperand(operands[1]);
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ASSERT_MSG(dst.isXMM() && src.isXMM(), "operands 0 and 1 must be xmm registers.");
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Xbyak::Xmm xmm_dst = *reinterpret_cast<const Xbyak::Xmm*>(&dst);
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Xbyak::Xmm xmm_src = *reinterpret_cast<const Xbyak::Xmm*>(&src);
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if (immediateForm) {
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u8 length = operands[2].imm.value.u & 0x3F;
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u8 index = operands[3].imm.value.u & 0x3F;
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const Xbyak::Reg64 scratch1 = rax;
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const Xbyak::Reg64 scratch2 = rcx;
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const Xbyak::Reg64 mask = rdx;
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// Set rsp to before red zone and save scratch registers
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c.lea(rsp, ptr[rsp - 128]);
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c.pushfq();
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c.push(scratch1);
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c.push(scratch2);
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c.push(mask);
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u64 mask_value;
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if (length == 0) {
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length = 64; // for the check below
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mask_value = 0xFFFF'FFFF'FFFF'FFFF;
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} else {
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mask_value = (1ULL << length) - 1;
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}
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ASSERT_MSG(length + index <= 64, "length + index must be less than or equal to 64.");
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MAYBE_AVX(movq, scratch1, xmm_src);
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MAYBE_AVX(movq, scratch2, xmm_dst);
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c.mov(mask, mask_value);
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// src &= mask
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c.and_(scratch1, mask);
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// src <<= index
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c.shl(scratch1, index);
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// dst &= ~(mask << index)
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mask_value = ~(mask_value << index);
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c.mov(mask, mask_value);
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c.and_(scratch2, mask);
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// dst |= src
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c.or_(scratch2, scratch1);
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// Insert scratch2 into low 64 bits of dst, upper 64 bits are unaffected
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Cpu cpu;
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if (cpu.has(Cpu::tAVX)) {
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c.vpinsrq(xmm_dst, xmm_dst, scratch2, 0);
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} else {
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c.pinsrq(xmm_dst, scratch2, 0);
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}
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c.pop(mask);
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c.pop(scratch2);
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c.pop(scratch1);
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c.popfq();
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c.lea(rsp, ptr[rsp + 128]);
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} else {
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ASSERT_MSG(operands[2].type == ZYDIS_OPERAND_TYPE_UNUSED &&
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operands[3].type == ZYDIS_OPERAND_TYPE_UNUSED,
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"operands 2 and 3 must be unused for register form.");
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const Xbyak::Reg64 scratch1 = rax;
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const Xbyak::Reg64 scratch2 = rcx;
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const Xbyak::Reg64 index = rdx;
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const Xbyak::Reg64 mask = rbx;
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Xbyak::Label length_zero, end;
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c.lea(rsp, ptr[rsp - 128]);
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c.pushfq();
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c.push(scratch1);
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c.push(scratch2);
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c.push(index);
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c.push(mask);
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// Get upper 64 bits of src and copy it to mask and index
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MAYBE_AVX(pextrq, index, xmm_src, 1);
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c.mov(mask, index);
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// When length is 0, set it to 64
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c.and_(mask, 0x3F); // mask now holds the length
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c.jz(length_zero); // Check if length is 0 and set mask to all 1s if it is
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// Create a mask out of the length
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c.mov(cl, mask.cvt8());
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c.mov(mask, 1);
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c.shl(mask, cl);
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c.dec(mask);
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c.jmp(end);
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c.L(length_zero);
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c.mov(mask, 0xFFFF'FFFF'FFFF'FFFF);
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c.L(end);
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// Get index to insert at
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c.shr(index, 8);
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c.and_(index, 0x3F);
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// src &= mask
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MAYBE_AVX(movq, scratch1, xmm_src);
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c.and_(scratch1, mask);
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// mask = ~(mask << index)
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c.mov(cl, index.cvt8());
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c.shl(mask, cl);
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c.not_(mask);
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// src <<= index
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c.shl(scratch1, cl);
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// dst = (dst & mask) | src
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MAYBE_AVX(movq, scratch2, xmm_dst);
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c.and_(scratch2, mask);
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c.or_(scratch2, scratch1);
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// Upper 64 bits are undefined in insertq
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MAYBE_AVX(movq, xmm_dst, scratch2);
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c.pop(mask);
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c.pop(index);
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c.pop(scratch2);
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c.pop(scratch1);
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c.popfq();
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c.lea(rsp, ptr[rsp + 128]);
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}
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}
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using PatchFilter = bool (*)(const ZydisDecodedOperand*);
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using InstructionGenerator = void (*)(const ZydisDecodedOperand*, Xbyak::CodeGenerator&);
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struct PatchInfo {
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@ -730,6 +889,7 @@ static const std::unordered_map<ZydisMnemonic, PatchInfo> Patches = {
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#endif
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{ZYDIS_MNEMONIC_EXTRQ, {FilterNoSSE4a, GenerateEXTRQ, true}},
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{ZYDIS_MNEMONIC_INSERTQ, {FilterNoSSE4a, GenerateINSERTQ, true}},
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#ifdef __APPLE__
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// Patches for instruction sets not supported by Rosetta 2.
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@ -859,8 +1019,8 @@ static bool TryExecuteIllegalInstruction(void* ctx, void* code_address) {
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bool immediateForm = operands[1].type == ZYDIS_OPERAND_TYPE_IMMEDIATE &&
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operands[2].type == ZYDIS_OPERAND_TYPE_IMMEDIATE;
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if (immediateForm) {
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LOG_ERROR(Core, "EXTRQ immediate form should have been patched at code address: {}",
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fmt::ptr(code_address));
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LOG_CRITICAL(Core, "EXTRQ immediate form should have been patched at code address: {}",
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fmt::ptr(code_address));
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return false;
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} else {
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ASSERT_MSG(operands[0].type == ZYDIS_OPERAND_TYPE_REGISTER &&
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@ -883,12 +1043,19 @@ static bool TryExecuteIllegalInstruction(void* ctx, void* code_address) {
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u64 lowQWordDst;
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memcpy(&lowQWordDst, dst, sizeof(lowQWordDst));
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u64 mask = lowQWordSrc & 0x3F;
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mask = (1ULL << mask) - 1;
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u64 length = lowQWordSrc & 0x3F;
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u64 mask;
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if (length == 0) {
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length = 64; // for the check below
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mask = 0xFFFF'FFFF'FFFF'FFFF;
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} else {
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mask = (1ULL << length) - 1;
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}
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u64 shift = (lowQWordSrc >> 8) & 0x3F;
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u64 index = (lowQWordSrc >> 8) & 0x3F;
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ASSERT_MSG(length + index <= 64, "length + index must be less than or equal to 64.");
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lowQWordDst >>= shift;
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lowQWordDst >>= index;
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lowQWordDst &= mask;
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memcpy(dst, &lowQWordDst, sizeof(lowQWordDst));
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@ -899,6 +1066,60 @@ static bool TryExecuteIllegalInstruction(void* ctx, void* code_address) {
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}
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break;
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}
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case ZYDIS_MNEMONIC_INSERTQ: {
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bool immediateForm = operands[2].type == ZYDIS_OPERAND_TYPE_IMMEDIATE &&
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operands[3].type == ZYDIS_OPERAND_TYPE_IMMEDIATE;
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if (immediateForm) {
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LOG_CRITICAL(Core,
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"INSERTQ immediate form should have been patched at code address: {}",
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fmt::ptr(code_address));
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return false;
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} else {
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ASSERT_MSG(operands[2].type == ZYDIS_OPERAND_TYPE_UNUSED &&
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operands[3].type == ZYDIS_OPERAND_TYPE_UNUSED,
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"operands 2 and 3 must be unused for register form.");
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ASSERT_MSG(operands[0].type == ZYDIS_OPERAND_TYPE_REGISTER &&
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operands[1].type == ZYDIS_OPERAND_TYPE_REGISTER,
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"operands 0 and 1 must be registers.");
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const auto dstIndex = operands[0].reg.value - ZYDIS_REGISTER_XMM0;
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const auto srcIndex = operands[1].reg.value - ZYDIS_REGISTER_XMM0;
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const auto dst = Common::GetXmmPointer(ctx, dstIndex);
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const auto src = Common::GetXmmPointer(ctx, srcIndex);
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u64 lowQWordSrc, highQWordSrc;
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memcpy(&lowQWordSrc, src, sizeof(lowQWordSrc));
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memcpy(&highQWordSrc, (u8*)src + 8, sizeof(highQWordSrc));
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u64 lowQWordDst;
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memcpy(&lowQWordDst, dst, sizeof(lowQWordDst));
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u64 length = highQWordSrc & 0x3F;
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u64 mask;
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if (length == 0) {
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length = 64; // for the check below
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mask = 0xFFFF'FFFF'FFFF'FFFF;
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} else {
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mask = (1ULL << length) - 1;
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}
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u64 index = (highQWordSrc >> 8) & 0x3F;
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ASSERT_MSG(length + index <= 64, "length + index must be less than or equal to 64.");
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lowQWordSrc &= mask;
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lowQWordDst &= ~(mask << index);
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lowQWordDst |= lowQWordSrc << index;
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memcpy(dst, &lowQWordDst, sizeof(lowQWordDst));
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Common::IncrementRip(ctx, instruction.length);
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return true;
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}
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break;
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}
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default: {
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LOG_ERROR(Core, "Unhandled illegal instruction at code address {}: {}",
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fmt::ptr(code_address), ZydisMnemonicGetString(instruction.mnemonic));
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