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https://github.com/shadps4-emu/shadPS4.git
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hotfix: Fix mipmap query for images
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654f85a4b1
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@ -164,13 +164,13 @@ Id EmitImageFetch(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, const
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return ctx.OpBitcast(ctx.F32[4], texel);
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}
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Id EmitImageQueryDimensions(EmitContext& ctx, IR::Inst* inst, u32 handle, Id lod, bool skip_mips) {
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Id EmitImageQueryDimensions(EmitContext& ctx, IR::Inst* inst, u32 handle, Id lod, bool has_mips) {
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const auto& texture = ctx.images[handle & 0xFFFF];
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const Id image = ctx.OpLoad(texture.image_type, texture.id);
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const auto type = ctx.info.images[handle & 0xFFFF].type;
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const Id zero = ctx.u32_zero_value;
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const auto mips{[&] { return skip_mips ? zero : ctx.OpImageQueryLevels(ctx.U32[1], image); }};
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const bool uses_lod{type != AmdGpu::ImageType::Color2DMsaa};
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const auto mips{[&] { return has_mips ? ctx.OpImageQueryLevels(ctx.U32[1], image) : zero; }};
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const bool uses_lod{type != AmdGpu::ImageType::Color2DMsaa && !texture.is_storage};
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const auto query{[&](Id type) {
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return uses_lod ? ctx.OpImageQuerySizeLod(type, image, lod)
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: ctx.OpImageQuerySize(type, image);
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@ -80,10 +80,10 @@ struct DefTable {
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}
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const IR::Value& Def(IR::Block* block, ThreadBitScalar variable) {
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return block->ssa_sreg_values[RegIndex(variable.sgpr)];
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return block->ssa_sbit_values[RegIndex(variable.sgpr)];
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}
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void SetDef(IR::Block* block, ThreadBitScalar variable, const IR::Value& value) {
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block->ssa_sreg_values[RegIndex(variable.sgpr)] = value;
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block->ssa_sbit_values[RegIndex(variable.sgpr)] = value;
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}
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const IR::Value& Def(IR::Block* block, SccFlagTag) {
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