2021-05-17 15:16:58 +00:00
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# See docs/devel/tracing.rst for syntax documentation.
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2017-12-21 07:32:57 +00:00
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2019-03-14 18:09:26 +00:00
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# sun4u.c
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2017-12-21 07:32:57 +00:00
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ebus_isa_irq_handler(int n, int level) "Set ISA IRQ %d level %d"
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2018-01-08 18:16:34 +00:00
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2019-03-14 18:09:26 +00:00
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# sun4u_iommu.c
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2018-01-08 18:16:34 +00:00
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sun4u_iommu_mem_read(uint64_t addr, uint64_t val, int size) "addr: 0x%"PRIx64" val: 0x%"PRIx64" size: %d"
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sun4u_iommu_mem_write(uint64_t addr, uint64_t val, int size) "addr: 0x%"PRIx64" val: 0x%"PRIx64" size: %d"
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2018-01-08 18:16:34 +00:00
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sun4u_iommu_translate(uint64_t addr, uint64_t trans_addr, uint64_t tte) "xlate 0x%"PRIx64" => pa 0x%"PRIx64" tte: 0x%"PRIx64
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2018-01-21 08:59:45 +00:00
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2019-03-14 18:09:26 +00:00
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# sparc64.c
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2018-01-21 08:59:45 +00:00
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sparc64_cpu_ivec_raise_irq(int irq) "Raise IVEC IRQ %d"
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sparc64_cpu_ivec_lower_irq(int irq) "Lower IVEC IRQ %d"
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sparc64_cpu_tick_irq_disabled(void) "tick_irq: softint disabled"
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sparc64_cpu_tick_irq_fire(void) "tick_irq: fire"
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sparc64_cpu_stick_irq_disabled(void) "stick_irq: softint disabled"
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sparc64_cpu_stick_irq_fire(void) "stick_irq: fire"
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sparc64_cpu_hstick_irq_disabled(void) "hstick_irq: softint disabled"
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sparc64_cpu_hstick_irq_fire(void) "hstick_irq: fire"
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sparc64_cpu_tick_set_count(const char *name, uint64_t real_count, const char *npt, void *p) "%s set_count count=0x%"PRIx64" (npt %s) p=%p"
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sparc64_cpu_tick_get_count(const char *name, uint64_t real_count, const char *npt, void *p) "%s get_count count=0x%"PRIx64" (npt %s) p=%p"
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sparc64_cpu_tick_set_limit(const char *name, uint64_t real_limit, const char *dis, void *p, uint64_t limit, uint64_t t, uint64_t dt) "%s set_limit limit=0x%"PRIx64 " (%s) p=%p called with limit=0x%"PRIx64" at 0x%"PRIx64" (delta=0x%"PRIx64")"
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sparc64_cpu_tick_set_limit_zero(const char *name) "%s set_limit limit=ZERO - not starting timer"
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