2008-05-13 18:27:16 +00:00
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Correctness issues:
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- rework eflags optimization (will be a consequence of TCG port)
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- SVM: rework the implementation: simplify code, move most intercept
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tests as dynamic, correct segment access, verify exception safety,
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2008-05-15 16:46:30 +00:00
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cpu save/restore, SMM save/restore.
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2008-05-13 18:27:16 +00:00
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- x86_64: fxsave/fxrestore intel/amd differences
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- x86_64: lcall/ljmp intel/amd differences ?
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- x86_64: cmpxchgl intel/amd differences ?
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2008-05-15 16:46:30 +00:00
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- x86_64: cmovl intel/amd differences ?
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- cmpxchg16b + cmpxchg8b cpuid test
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2008-05-13 18:27:16 +00:00
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- x86: monitor invalid
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- better code fetch (different exception handling + CS.limit support)
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- user/kernel PUSHL/POPL in helper.c
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- add missing cpuid tests
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- return UD exception if LOCK prefix incorrectly used
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- test ldt limit < 7 ?
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- fix some 16 bit sp push/pop overflow (pusha/popa, lcall lret)
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- full support of segment limit/rights
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- full x87 exception support
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- improve x87 bit exactness (use bochs code ?)
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2008-05-15 16:46:30 +00:00
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- DRx register support
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- CR0.AC emulation
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- SSE alignment checks
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- fix SSE min/max with nans
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2008-05-13 18:27:16 +00:00
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Optimizations/Features:
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- finish TCG port
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2008-05-15 16:46:30 +00:00
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- add SVM nested paging support
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- add VMX support
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- add AVX support
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- add SSE5 support
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2008-05-21 16:34:06 +00:00
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- faster EFLAGS update: consider SZAP, C, O can be updated separately
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with a bit field in CC_OP and more state variables.
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2008-05-13 18:27:16 +00:00
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- evaluate x87 stack pointer statically
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- find a way to avoid translating several time the same TB if CR0.TS
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is set or not.
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- move kqemu support outside target-i386.
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